Section 63-3622WW - IDAHO SEMICONDUCTORS FOR AMERICA ACT(1) This section shall be known and may be cited as the "Idaho Semiconductors for America Act."(2) It is the intent of the legislature that the Idaho semiconductors for America act will meet all criteria set forth in federal law and program guidelines from the United States department of commerce or other delegated agency of the federal government to implement the domestic fabrication, assembly, testing, advanced packaging, or research and development of semiconductors to mitigate domestic supply chain risks, increase economic competitiveness, protect intellectual property, and decrease national security risks.(3) On and after July 1, 2022, there is exempted from the taxes imposed by this chapter the purchase or use of construction and building materials directly used for a qualifying purpose by a qualifying covered entity for a qualifying project in Idaho during the project term. To qualify for the exemption in this section, an applicant must submit a project outline to the Idaho department of commerce on or before December 31, 2026. Modifications to an approved qualifying project outline must be submitted to the Idaho department of commerce on or before December 31, 2040.(4) As used in this section: (a) "Construction and building materials" means materials and supplies permanently installed or placed in or on a qualifying project. The term does not mean equipment, tools, and supplies used to construct or build the project.(b) "Covered contractor" means any contractor, including subcontractors, that incurs costs and taxes from work done for a qualifying covered entity for a qualifying project.(c) "Covered entity" means a private entity, a consortium of private entities, or a consortium of public and private entities with a demonstrated ability to engage in a qualifying project.(d) "Project term" means the time period beginning on July 1, 2022, and ending upon the completion of the construction of the qualifying project, but no later than December 31, 2040.(e) "Qualifying covered entity" means a covered entity that submits a qualifying project outline to the Idaho department of commerce that:(i) Qualifies for a new, meaningful semiconductor incentive offered by the federal government for the purpose of implementing the domestic fabrication, assembly, testing, advanced packaging, or research and development of semiconductors to mitigate domestic supply chain risks, increase economic competitiveness, protect intellectual property, decrease national security risks, and any other reasons deemed necessary by the federal government. Meaningful incentives by the federal government include but are not limited to funding the CHIPS for America act, 15 U.S.C. 4651 through 4658, or providing and funding other such semiconductor investment tax credits; and(ii) Qualifies for a meaningful incentive from the state of Idaho for a qualifying project for a qualifying purpose. Examples of meaningful incentives from the state of Idaho include but are not limited to the Idaho reimbursement incentive act, sections 67-4737 through 67-4744, Idaho Code; the Idaho small employer incentive act of 2005, chapter 44, title 63, Idaho Code; and the Idaho new capital investments incentives act of 2008, chapter 45, title 63, Idaho Code.(f) "Qualifying project" means a new project for a qualified purpose by a covered entity.(g) "Qualifying project outline" means a document submitted by a qualified covered entity to the Idaho department of commerce describing a new semiconductor project in Idaho that meets the definitions of a qualifying project in this section.(h) "Qualifying purpose" means activities conducted in Idaho to construct, expand, or modernize a facility for the fabrication, assembly, testing, advanced packaging, or research and development of semiconductors, including a facility used primarily for qualified research for such purposes based on the criteria in section 41 of the Internal Revenue Code, including:(i) A facility built for purposes of discovering information used for semiconductor fabrication, assembly, testing, or advanced packaging;(ii) A technological facility built for semiconductor fabrication, assembly, testing, or advanced packaging;(iii) A facility that is intended to be useful in the development of a new or improved business component of the qualifying covered entity used in semiconductor fabrication, assembly, testing, or advanced packaging; or(iv) A facility where substantially all of the activities occurring at or in it constitute elements of a process of experimentation for semiconductor fabrication, assembly, testing, or advanced packaging for a purpose described in 26 U.S.C. 41(d)(3).(5) The provisions of this section are contingent on the enactment and funding of a federal law providing a new and meaningful federal semiconductor incentive by December 31, 2026. If no such incentive is enacted and funded on or before December 31, 2026, no project or covered entity may qualify for an exemption under this section.Added by 2022 Session Laws, ch. 162, sec. 1, eff. 7/1/2022.