Yamazaki, Yu et al.

Patent Trials and Appeals Board

Jan 9, 2020

15482886 - (D) (P.T.A.B. Jan. 9, 2020)

UNITED STATES PATENT AND TRADEMARK OFFICE
UNITED STATES DEPARTMENT OF COMMERCE
United States Patent and Trademark Office
Address: COMMISSIONER FOR PATENTS
P.O. Box 1450
Alexandria, Virginia 22313-1450
www.uspto.gov
APPLICATION NO. FILING DATE FIRST NAMED INVENTOR ATTORNEY DOCKET NO. CONFIRMATION NO.
15/482,886 04/10/2017 Yu Yamazaki 12732-0236003 7109
26171 7590 01/09/2020
FISH & RICHARDSON P.C. (DC)
P.O. BOX 1022
MINNEAPOLIS, MN 55440-1022
EXAMINER
HARRIS, DOROTHY H
ART UNIT PAPER NUMBER
2625
NOTIFICATION DATE DELIVERY MODE
01/09/2020 ELECTRONIC
Please find below and/or attached an Office communication concerning this application or proceeding.
The time period for reply, if any, is set in the attached communication.
Notice of the Office communication was sent electronically on above-indicated "Notification Date" to the
following e-mail address(es):
PATDOCTC@fr.com
PTOL-90A (Rev. 04/07)

UNITED STATES PATENT AND TRADEMARK OFFICE
________________

BEFORE THE PATENT TRIAL AND APPEAL BOARD
________________

Ex parte YU YAMAZAKI, AYA ANZAI, and
MITSUAKI OSAME
________________

Appeal 2019-001109
Application 15/482,886
Technology Center 2600
________________

Before JASON V. MORGAN, JEREMY J. CURCURI, and
ADAM J. PYONIN, Administrative Patent Judges.

MORGAN, Administrative Patent Judge.

DECISION ON APPEAL
STATEMENT OF THE CASE
Introduction
Pursuant to 35 U.S.C. § 134(a), Appellant1 appeals from the
Examiner’s decision to reject claims 2–11. We have jurisdiction under 35
U.S.C. § 6(b).
We REVERSE.

1 We use the word “Appellant” to refer to “applicant” as defined in 37
C.F.R. § 1.42. Appellant identifies the real party-in-interest as
Semiconductor Energy Laboratory Co., Ltd. Appeal Br. 1.
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Summary of the disclosure
Appellant’s claimed subject matter relates to the use of a current
controlling transistor connected in series to a driving transistor as part of a
light emitting device that suppresses variations in luminance intensity.
Abstract.
Illustrative claim (key limitations emphasized)
2. A light emitting device comprising:
a first transistor;
a second transistor;
a light emitting element;
a power supply line; and
a first circuit,
wherein one of source and drain of the first transistor is
electrically connected to the light emitting element,
wherein another of source and drain of the first transistor is
connected to one of source and drain of the second transistor,
wherein another of source and drain of the second transistor is
connected to the power supply line,
wherein the first circuit is connected to a gate of the first
transistor,
wherein the first circuit is configured to control whether to tum
on the first transistor, and wherein a semiconductor layer of the
first transistor is curved so that a L/W (channel length / channel
width) of the first transistor is larger than a L/W (channel
length / channel width) of the second transistor.
The Examiner’s rejections and cited references
The Examiner rejects claims 2–6 under 35 U.S.C. § 103(a) as obvious
over Chen et al. (US 2003/0098829 A1; published May 29, 2003) (“Chen”),
Tsuchiya et al. (US 2003/0156084 A1; published Aug. 21, 2003)
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(“Tsuchiya”), and Udagawa et al. (US 2003/0089905 A1; published May 15,
2003) (“Udagawa”). Final Act. 3–8.
The Examiner rejects claims 7–11 under 35 U.S.C. § 103(a) as
obvious over Chen, Tsuchiya, Udagawa, and Nishitoba et al. (US
2002/0196212 A1; published Dec. 26, 2002) (“Nishitoba”). Final Act. 8–14.
ANALYSIS
In rejecting claim 2 as obvious, the Examiner relies on Chen’s Figure
4B to teach or suggest the claimed “first transistor” (i.e., element 44) and
“second transistor” (i.e., element 43), “wherein [one] of source and drain of
the first transistor is connected to one of source and drain of the second
transistor.” Final Act. 3–4 (citing Chen Fig. 4B). The Examiner further relies
on Chen’s transistors elements 41, 42, and 45 to teach or suggest the claimed
“first circuit, . . . wherein the first circuit is connected to a gate of the first
transistor.” Id. at 4–5 (citing Chen Fig. 4B, ¶ 10). The features the Examiner
relies on are illustrated in Chen’s Figure 4B, which is reproduced below.
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Chen’s Figure 4B is a diagram of current-driven pixel circuit in an
active matrix light emitting diode display. Chen ¶¶ 10, 19. Transistors 43
and 44 are connected in series, with the drain of transistor 43 connected to
power supply VDD, with the source of transistor 43 connected to the drain of
transistor 44, with the source of transistor 44 connected to light emitting
diode 46 and to capacitor 45, and with capacitor 45 further connected to the
gate of transistor 44 and to the source of transistor 42. The source of
transistor 43 is also connected to the source of transistor 42 and to the drain
of transistor 41. A scan signal turns transistors 43 and 42 alternatively on
and off.
The Examiner relies on Tsuchiya’s configuration of a “driving
transistor Tr2 . . . designed to have a smaller current driving capability than
that of . . . switching transistor Tr1” (Tsuchiya ¶ 41) to teach or suggest
“wherein . . . a[n] L/W (channel length / channel width) of the first transistor
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is larger than a[n] L/W (channel length / channel width) of the second
transistor.” See Final Act. 5–6 (citing Tsuchiya ¶¶ 34–47). The configuration
of Tsuchiya’s driving and switching transistors is illustrated in Tsuchiya’s
Figure 1, reproduced below.

Tsuchiya’s Figure 1 is a circuit diagram showing part of a display
apparatus. Tsuchiya ¶ 21. The source of switching transistor Tr1 is
connected to the gate of driving transistor Tr2. Id. ¶ 36. The drain of driving
transistor Tr2 is connected to power supply line 18 and the source of driving
transistor Tr2 is connected to diode 12. Id. ¶ 37.
The Examiner concludes it would have been obvious to an artisan of
ordinary skill to modify “Chen with the teachings of Tsuchiya to have a
smaller current driving capability so as to facilitate a wider saturation region
and a greater drive margin of luminance data as suggested by Tsuchiya.”
Final Act. 6. Specifically, the Examiner concludes that “[i]ncorporation of
the teachings of Tsuchiya to have W/L of a driving transistor smaller than
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W/L of a switching transistor would have resulted in L/W of a driving
transistor being larger than L/W of a switching transistor.” Id. As part of the
rejection, the Examiner finds that Chen’s second transistor 43 functions to
turn first transistor 44 on or off (i.e., that Chen’s second transistor 43 is a
switching transistor) because, e.g., “current is generated through transistor
44 by virtue of transistor 43 turning ON.” Ans. 8; see also id. at 7 (citing
Chen ¶ 10).
Appellant contends the Examiner erred because unlike Tsuchiya’s
switching transistor Tr1, Chen’s
second transistor 43 does not function to turn the first transistor
44 ON/OFF. Rather, it is the transistors 41 and 42 and the
capacitor 45 (which were equated with the recited “first circuit”)
that turn ON/OFF the first transistor 44. Accordingly, one of
ordinary skill in the art would have had no reason, in view of the
pixel circuit shown in FIG. 1 of Tsuchiya, to modify the first or
second transistors 44 or 43 in the current-driven pixel circuit
shown in FIG. 4B of Chen to possess features of the switching
transistor Trl shown in FIG. 1 of Tsuchiya.
Appeal Br. 3; see also Reply Br. 2 (“control of the ON/OFF conduction state
of transistor 44 is provided by the value of the voltage Vgs on the capacitor
45, and this voltage is not impacted by the conduction state of the transistor
43 or current through the transistor 43”). Therefore, Appellant argues the
Examiner provides insufficient support to show that it would have been
obvious to modify Chen—based on the teachings and suggestions of
Tsuchiya—to make an L/W (channel length / channel width) of Chen’s
transistor 44 larger than an L/W (channel length / channel width) of Chen’s
transistor 43. See Appeal Br. 5; Reply Br. 3.
Appellant’s arguments are consistent with and supported by the cited
teachings of Chen and Tsuchiya. As noted, Chen’s Figure 4B discloses that
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the source of transistor 43 is connected to the drain of transistor 44. The
source of transistor 43 is also connected to the source of transistor 42, while
the drain of transistor 42 is connected to the gate of transistor 44. The scan
signal alternatively turns transistors 43 and 42 on and off such that: (1) when
transistor 43 is turned on, its source does not have a closed connection to the
gate of transistor 44 and (2) when transistor 43 is turned off, the gate of
transistor 44 is controlled by transistors 41 and 42, and capacitor 45, not by
transistor 43. This configuration shows that unlike Tsuchiya’s transistor
Tr1—the source of which is connected to the gate of Tsuchiya’s transistor
Tr2—Chen’s transistor 43 is not a switching transistor. Chen Fig. 4B, ¶ 10;
Tsuchiya Fig. 1, ¶ 41.
These differences show that the Examiner’s conclusion that it would
have been obvious to modify Chen’s transistors 43 and 44 based on the
teachings and suggestions of Tsuchiya’s transistors Tr1 and Tr2 is based on
the unsupported premise that Tsuchiya’s switching transistor has a similar
function to Chen’s transistor 43. See Final Act. 5–7. Because the premise of
the Examiner’s conclusion is unsupported by the cited evidence, we agree
with Appellant that the Examiner does not show that it would have been
obvious to an artisan of ordinary skill to modify Chen in the claimed manner
based on the teachings and suggestions of Tsuchiya. See Appeal Br. 5.
The Examiner does not show that Udagawa or Nishitoba cure the
noted deficiency of Chen and Tsuchiya. Accordingly, we do not sustain the
Examiner’s 35 U.S.C. § 103(a) rejection of claim 2, and the Examiner’s 35
U.S.C. § 103(a) rejections of claims 3–11, which contain the same
recitations. Appeal Br. 6–11.
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CONCLUSION
Claims
Rejected 35 U.S.C. § References Affirmed Reversed
2–6 103(a) Chen, Tsuchiya, Udagawa 2–6
7–11 103(a) Chen, Tsuchiya,
Udagawa, Nishitoba
7–11
Overall Outcome 2–11

REVERSED