Xilinx, Inc.Download PDFPatent Trials and Appeals BoardAug 17, 20202019005786 (P.T.A.B. Aug. 17, 2020) Copy Citation UNITED STATES PATENT AND TRADEMARK OFFICE UNITED STATES DEPARTMENT OF COMMERCE United States Patent and Trademark Office Address: COMMISSIONER FOR PATENTS P.O. Box 1450 Alexandria, Virginia 22313-1450 www.uspto.gov APPLICATION NO. FILING DATE FIRST NAMED INVENTOR ATTORNEY DOCKET NO. CONFIRMATION NO. 15/285,786 10/05/2016 Jun Liu X-4951 US 4527 164051 7590 08/17/2020 PATTERSON & SHERIDAN, LLP - - XILINX 24 GREENWAY PLAZA SUITE 1600 HOUSTON, TX 77046 EXAMINER GARBOWSKI, LEIGH M ART UNIT PAPER NUMBER 2851 NOTIFICATION DATE DELIVERY MODE 08/17/2020 ELECTRONIC Please find below and/or attached an Office communication concerning this application or proceeding. The time period for reply, if any, is set in the attached communication. Notice of the Office communication was sent electronically on above-indicated "Notification Date" to the following e-mail address(es): Pair_Eofficeaction@pattersonsheridan.com psdocketing@pattersonsheridan.com xilinxipl@xilinx.com PTOL-90A (Rev. 04/07) UNITED STATES PATENT AND TRADEMARK OFFICE BEFORE THE PATENT TRIAL AND APPEAL BOARD Ex parteJUN LIU, HAO YU, RAYMOND KONG, and DAVID P. SCHULTZ Appeal 2019-005786 Application 15/285,786 Technology Center 2800 Before LARRY J. HUME, CARL L. SILVERMAN, and SCOTT B. HOWARD, Administrative Patent Judges. HOWARD, Administrative Patent Judge. DECISION ON APPEAL STATEMENT OF THE CASE Pursuant to 35 U.S.C. § 134(a), Appellant1 appeals from the Examiner’s decision to reject claims 1, 4–11, 13, 16, 17, and 20–27. Final Act. 1. Claims 2, 3, 12, 14, 15, 18, and 19 have been cancelled. Appeal Br. 19–22. We have jurisdiction under 35 U.S.C. § 6(b). We REVERSE. 1 We use the word Appellant to refer to “applicant” as defined in 37 C.F.R. § 1.42. Appellant identifies the real party in interest as Xilinx, Inc. Appeal Br. 2. Appeal 2019-005786 Application 15/285,786 2 CLAIMED SUBJECT MATTER The claims are directed “to electronic circuit design systems and, more particularly, to a design tool for providing dynamic partial reconfiguration of a circuit design.” Spec ¶ 1. Claim 1, reproduced below, is illustrative of the claimed subject matter: 1. A method comprising: using a processor-based system: reading a netlist for a design of a circuit comprising a reconfigurable module, the design of the circuit to be implemented on a programmable logic device; setting the reconfigurable module to a first region corresponding to a first physical region of the programmable logic device, static logic being outside of the first region; generating a second region corresponding to a second physical region of the programmable logic device, generating the second region comprising modifying the first region, said second region including at least some of said static logic; placing logic units of the reconfigurable module within the first region; routing connections of the reconfigurable module within the second region; and generating an electronic partial bitstream based on the placed logic units and routed connections of the reconfigurable module, the electronic partial bitstream being capable of being loaded onto the programmable logic device to implement the reconfigurable module of the design of the circuit on the programmable logic device. Appeal 2019-005786 Application 15/285,786 3 REFERENCE The prior art relied upon by the Examiner as evidence is: Name Reference Date Goldman US 8,671,377 B2 Mar. 11, 2014 REJECTION The Examiner rejected claims 1, 4–11, 13, 16, 17, and 20–27 under 35 U.S.C. §§ 102(a)(1) and (a)(2) as being anticipated by Goldman. Final Act. 4–5.2 OPINION We have reviewed the Examiner’s rejection in light of Appellant’s arguments that the Examiner erred. In reaching our decision, we have considered all evidence presented and all arguments made by Appellant. We are persuaded by Appellant’s arguments regarding the pending claims that the Examiner erred. The Examiner finds Goldman teaches “placing logic units of the reconfigurable module within the first region,” as recited in claim 1. Final Act. 5 (citing Goldman 5:16–20); see also Ans. 5 (citing Goldman 5:16–32, 7:50–54), 6–7. Specifically, the Examiner finds that Goldman discloses placing a PR (partial reconfiguration module) in sections B and D, either of which is a first region. See Ans. 5, 6–7. Appellant argues: Goldman discloses, as an example, expanding, in FIG. 7, floor plan region 311 assigned to PR module B in FIG. 3 to include 2 The Examiner also rejected the pending claims as directed to patent- ineligible subject matter. See Final Act. 2–4. In light of the 2019 Revised Patent Subject Matter Eligibility Guidance, the Examiner withdrew the rejection in the Answer. Ans. 3. Appeal 2019-005786 Application 15/285,786 4 floor plan regions previously assigned to static logic modules Top and E. For clarity, the floor plan region 311 of FIG. 3 is referred to as such herein, and the expanded floor plan region illustrated in FIG. 7 is referred to as “expanded floor plan region **311 **”. Goldman discloses that both the placing and routing of the PR module B occurs within the expanded floor plan region **311 **. Appeal Br. 17 (citation omitted); see also Reply Br. 3, 5. However, according to Appellant, “Goldman does not inherently (i.e., necessarily) disclose that logic units of the PR module B are placed within the floor plan region 311.” Reply Br. 5; see also Appeal Br. 17 (“Goldman does not disclose placing logic units of a reconfigurable module within a first region and routing connections of the reconfigurable module within a second region modified from the first region.”). We are persuade by Appellant’s argument that the Examiner erred. Goldman includes two embodiments, a first illustrated in Figure 2 and a second illustrated in Figure 5. See Goldman 2:28–31, 2:37–40. In the first embodiment, a floor plan is generated and the equipment placed. See Goldman Fig. 2. The Figure 2 embodiment does not involve modifying the floor plan. See id. In the second embodiment, an initial floor plan is generated and then, following the allocation of resources and other steps, a modified floor plan is generated. Goldman Fig. 5. Following the generation of the modified floor plan, the resources are reallocated and the PR module is placed. Id., Fig. 5, 5:8–24, 5:38–63. Appeal 2019-005786 Application 15/285,786 5 Goldman Figure 3 is reproduced below. Figure 3 “illustrates an exemplary floor plan of a design used for static resource allocation according to an embodiment of the present invention.” Goldman 2:32–34. Goldman Figure 3 represents the original floor plan shows a first region B that includes a PR module. Goldman 3:8–26. Region B is mapped to the first region. See Ans. 4. Goldman Figure 7 is reproduced below. Goldman Figure 7 “illustrates an exemplary modified floor plan of a design used for static resource allocation.” Goldman 2:43–44. Goldman Figure 7 Appeal 2019-005786 Application 15/285,786 6 shows the modified floor plan with additional space allocated for region B— which is mapped to the second region. In the Final Action, the Examiner relies on Goldman 5:16–20 for the placement of the PR module. See Final Act. 5. Although that section describes a PR module being placed in Module B, that section describes placement of the modules according to the Figure 2 embodiment, which does not involve generating a second region. See Goldman Fig. 2, 5:16–20 (describing Figure 2). The Examiner also relies on Goldman 7:50–54. Although that section discloses that the PR modules are placed after the floor plan is modified, it is silent as to the location of the PR modules. That is, the section does not specify whether the PR module is placed in the original module B (the first region) or the portions of the floor plan that were originally part of Section E or TOP but which have been reallocated to module B (which along with the original module B make up the second region). Because Goldman is silent on whether the PR module is placed in what has been mapped as the first region or the additional space allocated as part of the second region, based on the current record, we agree with Appellant that, based on the current record, the Examiner’s finding that Goldman discloses the disputed limitation is in error because it is not supported by a preponderance of the evidence. See In re Caveney, 761 F.2d 671, 674 (Fed. Cir. 1985) (Examiner’s burden of proving non-patentability is by a preponderance of the evidence); see also In re Warner, 379 F.2d 1011, 1017 (CCPA 1967) (“The Patent Office has the initial duty of supplying the factual basis for its rejection. It may not, because it may doubt that the invention is patentable, Appeal 2019-005786 Application 15/285,786 7 resort to speculation, unfounded assumptions or hindsight reconstruction to supply deficiencies in its factual basis.”).3 Accordingly, we are constrained on this record to reverse the Examiner’s rejection of claim 1, along with the rejections of claims 13 and 17, which recite limitations commensurate in scope to the disputed limitation discussed above, and dependent claims 4–11, 16, and 20–27.4 CONCLUSION We reverse the Examiner’s rejection of claims 1, 4–11, 13, 16, 17, and 20–27 as being anticipated. 3 Because we agree with at least one of the dispositive arguments advanced by Appellants, we need not reach the merits of Appellants’ other arguments. See Beloit Corp. v. Valmet Oy, 742 F.2d 1421, 1423 (Fed. Cir. 1984) (explaining that an administrative agency may render a decision based on “a single dispositive issue”). 4 In an anticipation rejection, “it is not enough that the prior art reference . . . includes multiple, distinct teachings that [an] artisan might somehow combine to achieve the claimed invention.” Net MoneyIN, Inc. v. VeriSign, Inc., 545 F.3d 1359, 1371 (Fed. Cir. 2008). Rather, the reference must “clearly and unequivocally disclose the claimed [invention] or direct those skilled in the art to the [invention] without any need for picking, choosing, and combining various disclosures not directly related to each other by the teachings of the cited reference.” Id. (quoting In re Arkley, 455 F.2d 586, 587 (CCPA 1972)). Thus, while “[s]uch picking and choosing may be entirely proper in the making of a 103, obviousness rejection . . . it has no place in the making of a 102, anticipation rejection.” Arkley, 455 F.2d at 587–88. Appeal 2019-005786 Application 15/285,786 8 DECISION SUMMARY In summary: Claims Rejected 35 U.S.C. § Reference(s)/Basis Affirmed Reversed 1, 4–11, 13, 16, 17, 20–27 102 Goldman 1, 4–11, 13, 16, 17, 20–27 REVERSED Copy with citationCopy as parenthetical citation