Xilinx, Inc.

Patent Trials and Appeals Board

Jul 23, 2021

2020002527 (P.T.A.B. Jul. 23, 2021)

UNITED STATES PATENT AND TRADEMARK OFFICE
UNITED STATES DEPARTMENT OF COMMERCE
United States Patent and Trademark Office
Address: COMMISSIONER FOR PATENTS
P.O. Box 1450
Alexandria, Virginia 22313-1450
www.uspto.gov
APPLICATION NO. FILING DATE FIRST NAMED INVENTOR ATTORNEY DOCKET NO. CONFIRMATION NO.
14/530,561 10/31/2014 Sagheer Ahmad X-4379 US 5290
165020 7590 07/23/2021
Crawford Maunu PLLC
1150 Northland Drive
Suite 100
Saint Paul, MN 55120
EXAMINER
IRADUKUNDA, HERVE
ART UNIT PAPER NUMBER
2185
NOTIFICATION DATE DELIVERY MODE
07/23/2021 ELECTRONIC
Please find below and/or attached an Office communication concerning this application or proceeding.
The time period for reply, if any, is set in the attached communication.
Notice of the Office communication was sent electronically on above-indicated "Notification Date" to the
following e-mail address(es):
USPTO-patent@ip-firm.com
maunu@ip-firm.com
xilinxipl@xilinx.com
PTOL-90A (Rev. 04/07)
UNITED STATES PATENT AND TRADEMARK OFFICE
____________

BEFORE THE PATENT TRIAL AND APPEAL BOARD
____________

Ex parte SAGHEER AHMAD and TOMAI KNOPP
_____________

Appeal 2020-002527
Application 14/530,561
Technology Center 2100
____________

Before ST. JOHN COURTENAY III, JAMES R. HUGHES, and
CATHERINE SHIANG, Administrative Patent Judges.

COURTENAY, Administrative Patent Judge.

DECISION ON APPEAL
Appellant1 appeals under 35 U.S.C. § 134(a) from a final rejection of
claims 1–9, 12–16, 18, and 19, which constitute all the claims pending in
this application. Claims 10, 11, 17, and 20 are canceled. See Amendment
entered December 5, 2018. We have jurisdiction over the pending claims
under 35 U.S.C. § 6(b).
We reverse.

1 We use the word “Appellant” to refer to “applicant” as defined in
37 C.F.R. § 1.42(a). According to Appellant, the real party in interest in this
appeal is Xilinx, Inc. See Appeal Br. 1.
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Application 14/530,561

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STATEMENT OF THE CASE 2
Introduction
Embodiments of Appellant’s claimed subject matter relate generally
to: “integrated circuits (ICs) and more particularly to data communication.”
Spec. 1.
Representative Claim 1
1. A system, comprising:
a first communication circuit configured to communicate
data over a first data port using a first communication protocol;
a second communication circuit configured to
communicate data over a second data port using a second
communication protocol that processes read and write requests
in an order that the read and write requests are received; and
a bridge circuit configured to communicate data between
the first data port of the first communication circuit and the
second data port of the second communication circuit, wherein
the bridge circuit is configured to communicate non-posted
write requests to the second communication circuit, and
communicate posted write requests to the second
communication circuit via a communication path that does not
buffer a plurality of posted write requests and bypasses a buffer
circuit while the plurality of non-posted write requests are
buffered;
wherein the first communication circuit transmits posted
write requests and non-posted write requests to the bridge
circuit and the bridge circuit includes a circuit configured to
determine that a non-posted write request from the first
communication circuit is a non-posted write request based on a

2 We herein refer to the Final Office Action, mailed April 1, 2019 (“Final
Act.”); Appeal Brief, filed August 28, 2019 (“Appeal Br.”); the Examiner’s
Answer, mailed December 12, 2019 (“Ans.”); and Reply Brief, filed
February 10, 2020 (“Reply Br.”).
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destination address, and determine that a posted write request
from the first communication circuit is a posted write request
based on a destination address.
Appeal Br. 15. Claims App. (disputed claim limitations emphasized).

Evidence Relied Upon by the Examiner
Name Reference Date
Duncan et al. (“Duncan”) US 5,953,538 Sept. 14, 1999
Gandhi et al. (“Gandhi”) US 6,243,781 B1 June 5, 2001
Cowan US 2003/0135685 A1 July 17, 2003
Potter et al. (“Potter”) US 6,757,768 B1 June 29, 2004
Solomon et al. (“Solomon”) US 2005/0030963 A1 Feb. 10, 2005
Davis et al. (“Davis”) US 9,996,484 B1 June 12, 2018

Table of Rejections
Rej. Claims Rejected 35 U.S.C. § Reference(s)/Basis
A 1, 5, 8, 9, 12, 18, 19 103 Gandhi, Solomon, Davis
B 2, 14 103 Gandhi, Solomon, Davis, Cowan
C 3, 4, 13, 15 103 Gandhi, Solomon, Davis, Potter
D 6, 7, 16 103 Gandhi, Solomon, Davis, Duncan

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ISSUES AND ANALYSIS
We have considered all of Appellant’s arguments and any evidence
presented. To the extent Appellant has not timely advanced separate,
substantive arguments for particular claims, or other issues, such arguments
are forfeited or waived.3 See, e.g., 37 C.F.R. § 41.37(c)(1)(iv). Throughout
this opinion, we give the claim limitations the broadest reasonable
interpretation (BRI) consistent with the Specification. See In re Morris, 127
F.3d 1048, 1054 (Fed. Cir. 1997). We highlight and address specific findings
and arguments for emphasis in our analysis below.

Rejection A under 35 U.S.C. § 103 of Representative Claim 1
We consider the following issue raised by Appellant’s arguments:
Issue: Under 35 U.S.C. § 103, did the Examiner err by finding that
the combination of Gandhi, Solomon, and Davis teaches or suggests the
following disputed limitation of independent claim 1?

3 See In re Google Technology Holdings LLC, 980 F.3d 858, 862 (Fed. Cir.
2020) (some internal citation omitted):
It is well established that “[w]aiver is different from forfeiture.”
United States v. Olano, 507 U.S. 725, 733 (1993). “Whereas
forfeiture is the failure to make the timely assertion of a right,
waiver is the ‘intentional relinquishment or abandonment of a
known right.’” Id. (quoting Johnson v. Zerbst, 304 U.S. 458,
464 (1938)) (additional citations omitted). The two scenarios
can have different consequences for challenges raised on
appeal, id. at 733–34, and for that reason, it is worth attending
to which label is the right one in a particular case.
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[T]he bridge circuit includes a circuit configured to determine
that a non-posted write request from the first communication
circuit is a non-posted write request based on a destination
address, and determine that a posted write request from the first
communication circuit is a posted write request based on a
destination address.
Claim 1 (emphasis added).
The Examiner finds the disputed limitation is taught by Davis’
disclosure of a communication packet comprising a header indicating a
destination address, identification of configuration read/write requests as
non-posted read/write requests, and communicating whether a
communication packet includes a configuration read/write request. See Final
Act. 6.
However, Appellant contends that “the cited teachings simply indicate
that both non-posted write requests and posted write requests specify a
destination address, which does not make obvious the claimed feature of
determining whether a request is a non-posted write request or a posted
write request based on a destination address in the request.” Appeal Br. 7
(emphasis added).
The Examiner disagrees with Appellant, and further explains the basis
for the rejection in the Answer, concluding that “[a] configuration read/write
request is a non-posted read/write wherein the destination is for
configuration address memory” and finding that Davis teaches “based on
which memory space a destination address in a request targets, the enhanced
PCIe endpoint 320 (i.e., a bridge circuit) is able to determine if a request is
non-posted or posted request.” See Ans. 6.
In the Reply Brief, Appellant responds: “Davis’ teachings do not
exclude the possibility that some other indicator in the request, such as a
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command code, could indicate whether a request is non-posted or posted”
and that “[t]he issue is not what Davis is ‘able’ or ‘could’ do.” Reply Br. 2.
Appellant also argues that, “Davis teaches that the header section of a packet
specifies a ‘transaction type’ in combination with a ‘target address’” and that
“[t]hese teachings of Davis indicate that non-posted and posted transactions
can be determined based on the type that is specified in the packet header.”
Reply Br. 2–3.
The courts guide that “[t]he inherent teaching of a prior art reference,
a question of fact, arises both in the context of anticipation and
obviousness.” In re Napier, 55 F.3d 610, 613 (Fed. Cir. 1995) (affirming a
section 103 rejection based in part on an inherent disclosure in one of the
references). The question of obviousness is “based on underlying factual
determinations including . . . what th[e] prior art teaches explicitly and
inherently.” In re Zurko, 258 F.3d 1379, 1383 (Fed. Cir. 2001) (citations
omitted). Accord PAR Pharmaceutical, Inc. v TWI Pharmaceuticals, Inc.
773 F.3d 1186, 1194–95 (Fed Cir. 2014) (“inherency may supply a missing
claim limitation in an obviousness analysis.”).
However, “[t]he mere fact that a certain thing may result from a given
set of circumstances is not sufficient. If, however, the disclosure is
sufficient to show that the natural result flowing from the operation as
taught would result in the performance of the questioned function, it seems
to be well settled that the disclosure should be regarded as sufficient.” In re
Oelrich, 666 F.2d 578, 581 (CCPA 1981) (emphasis added) (citations and
quotations omitted). “Thus, . . . the concept of inherency must be limited
when applied to obviousness, and is present only when the limitation at issue
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is the ‘natural result’ of the combination of prior art elements.” PAR
Pharmaceutical, Inc., 773 F.3d at 1195 (quoting Oelrich, 666 F.2d at 581).
Turning to the evidence, the Examiner finds that “the enhanced PCIe
endpoint 320 (i.e., a bridge circuit) is able to determine if a request is non-
posted or posted request.” Ans. 6 (emphasis added). As noted above,
Appellant urges that “Davis’ teachings do not exclude the possibility that
some other indicator in the request, such as a command code, could indicate
whether a request is non-posted or posted” and that “[t]he issue is not what
Davis is ‘able’ or ‘could’ do.” Reply Br. 2.
We reproduce the pertinent cited portions of Davis below:
An enhanced PCIe endpoint card may present itself as a native
PCIe endpoint that is presenting a configuration header type 0.
The enhanced PCIe endpoint card may 10 receive and process
transactions of different types.
...I/O and configuration writes may be non-posted, e.g., in order
to confirm that the write data has in fact made it to the
destination without error. 
Davis, Col. 7, lines 7–29.
As illustrated at 510, in this example, the method may include
an enhanced PCIe endpoint card receiving a transaction layer
packet. If the packet includes a configuration read/write request
(shown as the positive exit 25 from 520), the method may
include processing the request in hardware without any
software intervention, as in 525. If the packet includes another
non-posted request type (e.g., a memory read request, a
memory read lock request, a I/O read, or an I/O write), shown
as the positive exit from 530, the method may include notifying
the software of the transaction, in response to which the
software may perform any desired processing, and write an
indication of the completion of the transaction, as in 535.
Davis, Col. 16, lines 21–33.
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As illustrated in this example, if the packet does not include a
configuration request or transaction of another non-posted
request type (shown as the negative exit from 530), the method
may include processing a posted transaction request type as a
notification, without generating a completion response packet,
as in 540.
Davis, Col. 8, lines 53–58.
Although Davis discloses a packet header with a destination address
and differentiating between non-posted and posted writes, we find no
teaching or suggestion in the cited portions of Davis that the destination
address is used to differentiate between non-posted and posted writes. On
this record, we find the portions of Davis cited by the Examiner are
insufficient to show that determining whether a write request is a non-posted
or posted write request would be a natural result flowing from the set of
circumstances disclosed by Davis. See PAR Pharmaceutical, Inc., 773 F.3d
at 1195.
Therefore, in view of the controlling guidance noted supra, and based
upon a preponderance of the evidence, we agree with Appellant that the
Examiner’s underlying factual findings are insufficient to support a legal
conclusion of obviousness regarding the disputed limitations.
Accordingly, for essentially the same reasons argued by Appellant in
the Briefs, we are constrained on this record to reverse the Examiner’s
obviousness Rejection A of independent claim 1. For the same reasons, we
also reverse Rejection A of independent claims 12 and 19, which recite the
disputed limitations using similar language of commensurate scope.
Dependent claims 5, 8, 9, and 18 (not argued separately) stand with the
respective independent claim from which they depend.

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Rejections B, C, and D under 35 U.S.C. § 103
On this record, the Examiner has not fully developed the record to
show that any of the additionally cited references (Cowan, Potter, or Duncan
respectively) overcomes the aforementioned deficiencies of the base
combination of Gandhi, Solomon, and Davis. Accordingly, we are
constrained on this record to reverse the Examiner’s obviousness Rejections
B, C, and D of remaining dependent claims 2–4, 6, 7, and 13–16.
CONCLUSION
The Examiner erred in rejecting claims 1–9, 12–16, 18, and 19 as
being obvious under 35 U.S.C. § 103 over the cited combinations of
references.

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DECISION SUMMARY
Claims
Rejected
35 U.S.C.
§ Reference(s)/Basis Affirmed Reversed
1, 5, 8, 9, 12,
18, 19 103
Gandhi, Solomon,
Davis
1, 5, 8, 9, 12,
18, 19
2, 14 103 Gandhi, Solomon, Davis, Cowan 2, 14
3, 4, 13, 15 103 Gandhi, Solomon, Davis, Potter 3, 4, 13, 15
6, 7, 16 103 Gandhi, Solomon, Davis, Duncan 6, 7, 16
Overall
Outcome
1–9, 12–16,
18, 19

REVERSED