Takaomi Suzuki et al.

Patent Trials and Appeals Board

Feb 3, 2020

15254770 - (D) (P.T.A.B. Feb. 3, 2020)

UNITED STATES PATENT AND TRADEMARK OFFICE
UNITED STATES DEPARTMENT OF COMMERCE
United States Patent and Trademark Office
Address: COMMISSIONER FOR PATENTS
P.O. Box 1450
Alexandria, Virginia 22313-1450
www.uspto.gov
APPLICATION NO. FILING DATE FIRST NAMED INVENTOR ATTORNEY DOCKET NO. CONFIRMATION NO.
15/254,770 09/01/2016 Takaomi Suzuki 880635-0064-US00 3809
134795 7590 02/03/2020
MICHAEL BEST & FRIEDRICH LLP (DC)
100 E WISCONSIN AVENUE
Suite 3300
MILWAUKEE, WI 53202
EXAMINER
STARK, JARRETT J
ART UNIT PAPER NUMBER
2822
NOTIFICATION DATE DELIVERY MODE
02/03/2020 ELECTRONIC
Please find below and/or attached an Office communication concerning this application or proceeding.
The time period for reply, if any, is set in the attached communication.
Notice of the Office communication was sent electronically on above-indicated "Notification Date" to the
following e-mail address(es):
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PTOL-90A (Rev. 04/07)

UNITED STATES PATENT AND TRADEMARK OFFICE
____________

BEFORE THE PATENT TRIAL AND APPEAL BOARD
____________

Ex parte TAKAOMI SUZUKI and MASAKI SAKAMOTO

Appeal 2019-000041
Application 15/254,770
Technology Center 2800
____________

Before ROMULO H. DELMENDO, MICHAEL P. COLAIANNI, and
CHRISTOPHER C. KENNEDY, Administrative Patent Judges.

COLAIANNI, Administrative Patent Judge.

DECISION ON APPEAL

Pursuant to 35 U.S.C. § 134(a), Appellant1 appeals from the
Examiner’s decision to reject claims 1 to 5. We have jurisdiction under
35 U.S.C. § 6(b).
We AFFIRM.

Appellant’s invention is directed to method of manufacturing a
semiconductor device which is suitable for manufacturing a “revese [sic]

1 We use the word “Appellant” to refer to “applicant” as defined in 37
C.F.R. § 1.42. Appellant identifies the real party in interest as Sumitomo
Heavy Industries, Ltd. Appeal Br. 3.
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conducting IGBT (RC-IGBT)” in which an insulating gate bipolar transistor
(IGBT) and a diode are formed on one substrate (Spec. ¶ 1; Claim 1).
Claim 1 is representative of the subject matter on appeal:
1. A method of manufacturing a semiconductor device
comprising:
(a) a process of forming a first injection region by ion-
injecting a first conduction type of first dopant into a surface
layer portion of an IGBT section of a semiconductor substrate
including a surface in which the IGBT section and a diode
section are defined;
(b) a process of forming a second injection region by ion-
injecting a second dopant of a second conduction type which is
the opposite to the first conduction type into a shallower region
of the IGBT section of the semiconductor substrate than the
first injection region;
(c) a process of forming a third injection region by ion-
injecting the first conduction type of third dopant into a surface
layer portion of the diode section of the semiconductor
substrate at a concentration higher than the concentration of the
second dopant so that the injected region becomes amorphized;
(d) a process of scanning the IGBT section and the diode
section of the semiconductor substrate with a first pulse laser
beam under conditions in which the third injection region is
partially melted and the first dopant of the first injection region
is activated after the processes (a), (b), and (c); and
(e) a process of melting and crystallizing a surface layer
portion which is shallower than the second injection region in
the entire region of the IGBT section and the diode section of
the semiconductor substrate by scanning the IGBT section and
the diode section of the semiconductor substrate with a second
pulse laser beam having a pulse width shorter than the pulse
width of the first pulse laser beam after the process (d).

Appellant appeals the following rejection:
Claims 1 to 5 are rejected under 35 U.S.C. § 103 as
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unpatentable over Toshiba2 (JP2013-197122, published Sept.
30, 2013) in view of Kimura3 (JP2008-41868, published Feb.
21, 2008), Nagase (US 2007/0194346 A1, published Aug. 23,
2007) and Nakagawa (US 2002/0100934 A1, published Aug. 1,
2002).
Appellant argues the claims as a group (Appeal Br. 8–22). Therefore,
we select claim 1 as representative of the group. 37 C.F.R. § 41.37(c)(iv).

FINDINGS OF FACT & ANALYSIS
The Examiner’s findings and conclusions regarding the rejection of
claim 1 over Toshiba in view of Kimura, Nagase, and Nakagawa are located
on pages 5 to 10 of the Non-Final Action.
Appellant argues that Toshiba fails to disclose or suggest a second
pulse laser beam having a pulse width shorter than the pulse width of the
first laser beam (Appeal Br. 11). Appellant contends that Kimura teaches
that using a pulse laser to anneal a doped semiconductor wherein the second
pulse width of the laser is longer than the pulse width of the first pulse
(Appeal Br. 12). Appellant argues that Nagase and Nakagawa fail to teach
using a second laser pulse have a pulse width that is shorter than the first
laser pulse width (Appeal Br. 14). Appellant contends that the Examiner’s
findings and conclusions regarding the combined teachings of Toshiba,
Kimura, Nagase, and Nakagawa lack articulated reasoning with some

2 Our review is based upon Toshiba’s English-language equivalent, US
2013/0240947 A1 published September 19, 2013.
3 We refer to the machine translation of Kimura obtained from the Japan
Patent Office website: https://www.j-platpat.inpit.go.jp/p0200.
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rational underpinning to support the legal conclusion of obviousness (Appeal
Br. 15). Appellant contends that the Examiner provides no objective
evidence to support that it would have been obvious to use a second laser
pulse with a shorter pulse width than the first laser pulse width (Appeal Br.
15; Reply Br. 5, 7). Appellant argues that the Examiner’s analysis is based
upon conclusory statements and impermissible hindsight (Appeal Br. 15,
21). Appellant argues that the Examiner has not shown a relationship
between the variable (i.e., pulse width) and the affected property (i.e., dopant
activation depth), which precludes a determination that the particular
variable is a result-effective variable (Appeal Br. 16). Appellant contends
that Kimura provides no comparison between an activation depth of the first
pulse P1 and an activation depth of the second pulse P2 (Reply Br. 11).
The Examiner finds that Toshiba fails to teach, inter alia, using a
pulse laser to anneal a semiconductor, but the Examiner finds that Nagase
teaches using a pulse laser to anneal and Kimura teaches using a series of
pulses having different pulse widths (Non-Final Act. 5–10). The Examiner
relies on Nagase and Nakagawa to teach that particular dopant
concentrations would have yielded an amorphous structure when laser
annealed, which Appellant does not dispute (Non-Final Act. 6–8; Appeal Br.
generally). The Examiner finds that Kimura teaches that it was known at the
time of the invention to use pulsed laser annealing to target specifically
different depths of implanted dopants in a semiconductor while limiting the
melting, diffusion, and recrystallization of the region being targeted (Non-
Final Act. 9). The Examiner finds that Kimura teaches a pulsed laser anneal
that will specifically target the region at the greater depth, and a second
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pulsed laser anneal having a shorter width for targeting the surface regions
(Non-Final Act. 9).
Although Appellant argues that no objective evidence has been
provided to support the Examiner’s finding that the Kimura teaches a
relationship between the depth of impurity activation and the pulse width,
the Examiner finds that Kimura teaches that a pulsed laser targets different
depths of an implanted region (Non-Final Act. 9). Indeed, Kimura discloses
that the problem to be solved relates to “an impurity activating method
which increases the activation depth of a plurality of laser pulses each
irradiated in suitable conditions onto a substrate including a semiconductor
layer with an impurity added to its surface layer” (Kimura, Abstract, ¶ 6).
Kimura discloses that the first laser pulse (i.e., the shorter pulse width in the
particular embodiment) melts the surface of the region and the second laser
pulse (i.e., the longer pulse width in the embodiment) is applied to maintain
the melted portion at a high temperature to increase the impurity activation
depth (Kimura ¶¶ 8, 10). Kimura appears to teach a separate embodiment
where a first pulse width may be longer than the second pulse width (Kimura
¶ 9, 82). Kimura further teaches that a laser pulse having a pulse width is
suitable for impurity activation by controlling the temperature of the
wavelength conversion element included in the first pulse laser light source
(Kimura ¶ 11, 76). Kimura teaches that peak energy is directly related to
pulse width such that the peak energy increases when the pulse width
increases and peak energy decreases when the pulse width decreases4

4 Pulse energy = pulse width x peak power. Rearranging that equation
yields: Peak power = Pulse energy/Pulse width. In other words, Pulse
energy and Pulse width are directly related.
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(Kimura ¶ 47). Kimura teaches that the first and second pulse width may be
controlled with controller 100 to achieve a target pulse width (Kimura ¶¶ 39,
52, 56). Kimura further teaches that the pulse width of the first pulse (i.e.,
200 ns or less) and second pulse (i.e., 100 ns or more) overlap (¶¶ 78, 79,
83).
The Examiner’s finding that Kimura teaches a relationship between
laser annealing pulse width and the depth of impurity activation in the
implanted region is supported by Kimura’s disclosures. Objective evidence
has been provided by the Examiner. Therefore, we agree with the Examiner
that one of ordinary skill in the art would have determined the suitable pulse
width and pulse width order (i.e., short pulse width then longer pulse width
or vice versa) to affect the desired depth of activation for the dopant profile
based on the evidence of record. The Examiner’s findings are not based
upon impermissible hindsight, but rather the teachings and suggestions
provided by the references.
Appellant further argues that unexpected results support a conclusion
of nonobviousness (Appeal Br. 20–21). Appellant appears to contend that
paragraph 40 of the Specification provides a comparison of the invention
with prior art which shows that by using the claimed invention pulse width
order, “the surface layer portion of the second surface 14 can be annealed
without damaging the device structure of the IGBT formed on the first
surface 13.” (Appeal Br. 20–21) (emphasis omitted). Although Appellant
cites to paragraph 40 of the Specification, Appellant has not carried the
burden of explaining how the citation shows unexpected results as it is
Appellant’s burden to do. Ex parte Ishizaka, 24 USPQ2d 1621, 1624 (BPAI
1992) (citing In re Payne, 606 F.2d 303 (CCPA 1979)). Nevertheless,
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paragraph 40 of the Specification discloses that the shorter pulse width of
the second pulse width suppresses an increase in temperature of the first
surface 13 while the second surface 14 is heated to a melting temperature.
The use of a shorter pulse width to suppress an increase in temperature
seems to comport with Kimura’s disclosure that the shorter pulse width
melts the surface of the impurity implanted region while the longer pulse
width laser provides deeper impurity activation by maintaining the
temperature to a deeper region of the semiconductor structure (Kimura ¶¶ 8,
10). Appellant appears to achieve the same result with a shorter pulse width
laser pulse as Kimura does with a shorter pulse width laser pulse (i.e.,
melting at only the semiconductor surface). In other words, Appellant’s
allegation of evidence of non-obviousness does not appear to be non-
obvious or unexpected.
On this record, Appellant has not shown reversible error in the
Examiner’s § 103 rejection.
CONCLUSION
In summary:
Claims
Rejected
35 U.S.C.
§
Reference(s)/Basis Affirmed Reversed
1–5 103 Toshiba, Kimura,
Nagase, Nakagawa
1–5

No time period for taking any subsequent action in connection with
this appeal may be extended under 37 C.F.R. § 1.136(a). See 37 C.F.R.
§ 1.136(a)(1)(iv).

AFFIRMED