SHINKO ELECTRIC INDUSTRIES CO., LTD.Download PDFPatent Trials and Appeals BoardSep 28, 202014663921 - (D) (P.T.A.B. Sep. 28, 2020) Copy Citation UNITED STATES PATENT AND TRADEMARK OFFICE UNITED STATES DEPARTMENT OF COMMERCE United States Patent and Trademark Office Address: COMMISSIONER FOR PATENTS P.O. Box 1450 Alexandria, Virginia 22313-1450 www.uspto.gov APPLICATION NO. FILING DATE FIRST NAMED INVENTOR ATTORNEY DOCKET NO. CONFIRMATION NO. 14/663,921 03/20/2015 Noriyoshi Shimizu HKY-39330 2305 40854 7590 09/28/2020 RANKIN, HILL & CLARK LLP 38210 GLENN AVENUE WILLOUGHBY, OH 44094-7808 EXAMINER MILAKOVICH, NATHAN J ART UNIT PAPER NUMBER 2848 NOTIFICATION DATE DELIVERY MODE 09/28/2020 ELECTRONIC Please find below and/or attached an Office communication concerning this application or proceeding. The time period for reply, if any, is set in the attached communication. Notice of the Office communication was sent electronically on above-indicated "Notification Date" to the following e-mail address(es): 40854@rankinhill.com spaw@rankinhill.com PTOL-90A (Rev. 04/07) UNITED STATES PATENT AND TRADEMARK OFFICE ____________ BEFORE THE PATENT TRIAL AND APPEAL BOARD ____________ Ex parte NORIYOSHI SHIMIZU, WATARU KANEDA, and AKIO ROKUGAWA ____________ Appeal 2019-003207 Application 14/663,921 Technology Center 2800 ____________ Before MICHAEL P. COLAIANNI, JEFFREY B. ROBERTSON, and JEFFREY R. SNAY, Administrative Patent Judges. SNAY, Administrative Patent Judge. DECISION ON APPEAL STATEMENT OF THE CASE Pursuant to 35 U.S.C. § 134(a), Appellant1 appeals from the Examiner’s decision to reject claims 1, 3, 6–14, and 19–28. We have jurisdiction under 35 U.S.C. § 6(b). We AFFIRM-IN-PART. 1 We use the word Appellant to refer to “applicant” as defined in 37 C.F.R. § 1.42. Appellant identifies Shinko Electric Industries Co., Ltd. as the real party in interest. Appeal Br. 3. Appeal 2019-003207 Application 14/663,921 2 BACKGROUND The invention relates to a wiring board, such as for a semiconductor package. Spec. ¶¶ 1, 2. Claim 1 reads: 1. A wiring board comprising: a core layer; a first wiring layer formed on one surface of the core layer; a first insulating layer formed on the one surface of the core layer so as to cover the first wiring layer; a via wiring embedded in the first insulating layer, the via wiring being a metal layer filled in a via hole formed in the first insulating layer; a second wiring layer formed on a first surface of the first insulating layer, the first surface being an opposite surface of a surface in contact with the core layer, the second wiring layer having a structure where an electrolytic plating layer is formed on a seed layer; and a second insulating layer formed on the first surface of the first insulating layer so as to cover the second wiring layer, the second insulating layer being thinner than the first insulating layer, wherein the first wiring layer comprises a pad and a plane layer provided around the pad, one end surface of the via wiring is exposed from the first surface of the first insulating layer and flush with the first surface of the first insulating layer, an entirety of the one end surface of the via wiring is directly bonded to the seed layer constituting the second wiring layer, another end surface of the via wiring is directly bonded to the pad in the first insulating layer, and the first surface of the first insulating layer and the one end surface of the via wiring are polished surfaces, and a roughness of the first surface of the first insulating layer is less than a roughness of an inner wall surface of the via hole formed in the first insulating layer. Appeal Br. 22 (Claims Appendix) (emphasis provided to showcase a key recitation in dispute). Appeal 2019-003207 Application 14/663,921 3 Independent claim 19 similarly recites a wiring board which includes, inter alia, a second insulating layer that is thinner than a first insulating layer. Each remaining claim on appeal depends from claim 1 or 19. REJECTIONS I. Claim 23 stands rejected under 35 U.S.C. § 112(d) for failing to limit the subject matter of the claim from which it depends. II. Claims 1, 3, 6, 14, and 25–28 stand rejected under 35 U.S.C. § 103 as unpatentable over Shin,2 Peters,3 Maeda,4 and Funaya.5 III. Claims 7–11 stand rejected under 35 U.S.C. § 35 U.S.C. § 103 as unpatentable over Shin, Peters, Maeda, Funaya, and Mori.6 IV. Claims 12 and 13 stand rejected under 35 U.S.C. § 35 U.S.C. § 103 as unpatentable over Shin, Peters, Maeda, Funaya, Mori, and Shim.7 V. Claims 19–24 stand rejected under 35 U.S.C. § 35 U.S.C. § 103 as unpatentable over Shin, Peters, Maeda, Mori, and Shim. OPINION Rejection I: failure to satisfy 35 U.S.C. § 112(d) The Examiner finds claim 23 fails to recite any feature not already present in its parent claim 19, and rejects claim 23 under 35 U.S.C. § 112(d) on that basis. Final Act. 8. Appellant presents no argument against the 2 US 2014/0182889 A1, published July 3, 2014 (“Shin”). 3 US 6,521,530 B2, issued February 18, 2003 (“Peters”). 4 US 2014/0290997 A1, published October 2, 2014 (“Maeda”). 5 US 2011/0155433 A1, published June 30, 2011 (“Funaya”). 6 US 2012/0068359 A1, published March 22, 2012 (“Mori”). 7 US 2010/0224974 A1, published September 9, 2010 (“Shim”). Appeal 2019-003207 Application 14/663,921 4 Examiner’s rejection. Accordingly, Appellant does not identify reversible error. Rejection I is sustained. Rejections II–V: obviousness Each independent claim on appeal recites a wiring board which includes, inter alia, a second insulating layer formed on a surface of a first insulating layer, so as to cover a wiring layer, “the second insulating layer being thinner than the first insulating layer.” The Examiner finds Shin’s Figure 1 depicts a wiring board having first insulating layer 120, wiring layer 130, and second insulating layer 140 formed on first insulating layer 120 and covering wiring layer 130. Final Act. 10–11. We reproduce Shin’s Figure 1 below. Figure 1 is a cross-sectional schematic representation of a multilayered substrate. Shin ¶ 42. The Examiner acknowledges Shin does not disclose relative thicknesses of the first and second insulating layers, and finds Maeda would Appeal 2019-003207 Application 14/663,921 5 have provide one of ordinary skill with a reason to form Shin’s insulating layer 140 thinner than insulating layer 120. Final Act. 13. Particularly, the Examiner finds Maeda teaches that forming a relatively thin upper insulating layer provides “reduced thermal coefficient of lower insulating layers so as to manufacture a multilayer wiring board with little warpage and excellent connection reliability.” Id. (citing Maeda ¶¶ 37, 53). Appellant contends modifying Shin to include a relatively thin upper insulating layer would have been contrary to Shin’s teaching that second insulating layer 140 is configured to prevent warpage, and that Shin and Maeda, when read in their entireties, would not have lead one of ordinary skill in the art to modify Shin in the manner proposed by the Examiner. Appeal Br. 15. Shin is silent regarding thickness of insulating layers 120, 140. However, Shin teaches insulating layer 140 “may be made of a material capable of decreasing warpage of the multilayered substrate 100.” Shin ¶ 53. To that end, Shin teaches insulating layer 140 may exhibit a lesser thermal expansion rate relative to that of insulating layer 120. Id. That is, Shin states warpage is decreased when the upper (second) insulating layer is configured to have a lesser rate of thermal expansion. Id. Maeda, on the other hand, states “the lower insulating layer 51 has a smaller thermal expansion coefficient than the thermal expansion coefficient of the upper insulating layer 52. Maeda ¶ 37 (emphasis added). Maeda further states, “[t]he lower insulating layer 51 with the small thermal expansion coefficient is formed thicker than the upper insulating layer 52, so as to lower the thermal expansion coefficient as the overall insulating layer.” Id. Appeal 2019-003207 Application 14/663,921 6 Reading the collective teachings of Shin and Maeda, as summarized above, Shin discloses upper insulating layer 140 is configured to exhibit the lesser thermal expansion rate, and Maeda offers a reason to provide a greater relative thickness for the insulating layer configured to exhibit the lesser rate of thermal expansion. The Examiner’s opposite determination, that one skilled in the art would have had reason to provide Shin with a relatively thicker lower insulating layer 120, is not supported by a preponderance of the evidence presented. For the foregoing reasons, we are persuaded the Examiner does not identify evidence sufficient to support the obviousness determination. Accordingly, Rejections II–V are not sustained. CONCLUSION The Examiner’s decision rejecting claim 23 under 35 U.S.C. § 112(d) is affirmed. The Examiner’s decision rejecting claims 1, 3, 6–14, and 19–28 under 35 U.S.C. § 103 is reversed. Appeal 2019-003207 Application 14/663,921 7 DECISION SUMMARY In summary: Claim(s) Rejected 35 U.S.C. § Reference(s)/Basis Affirmed Reversed 23 112(d) 23 1, 3, 6, 14, 25–28 103 Shin, Peters, Maeda, Funaya 1, 3, 6, 14, 25–28 7–11 103 Shin, Peters, Maeda, Funaya, Mori 7–11 12, 13 103 Shin, Peters, Maeda, Funaya, Mori, Shim 12, 13 19–24 103 Shin, Peters, Maeda, Mori, Shim 19–24 Overall outcome 23 1, 3, 6–14, 19–22, 24– 28 AFFIRMED-IN-PART Copy with citationCopy as parenthetical citation