Semtech Corporation

Patent Trials and Appeals Board

Feb 8, 2022

2021002381 (P.T.A.B. Feb. 8, 2022)

UNITED STATES PATENT AND TRADEMARK OFFICE UNITED STATES DEPARTMENT OF COMMERCE United States Patent and Trademark Office Address: COMMISSIONER FOR PATENTS P.O. Box 1450 Alexandria, Virginia 22313-1450 www.uspto.gov APPLICATION NO. FILING DATE FIRST NAMED INVENTOR ATTORNEY DOCKET NO. CONFIRMATION NO. 15/431,528 02/13/2017 Changjun Huang 2153.0025 4589 84278 7590 02/08/2022 PATENT LAW GROUP: Atkins and Associates P.C. 123 W. Chandler Heights Road, Unit 12535 Chandler, AZ 85248 EXAMINER LI, MEIYA ART UNIT PAPER NUMBER 2811 NOTIFICATION DATE DELIVERY MODE 02/08/2022 ELECTRONIC Please find below and/or attached an Office communication concerning this application or proceeding. The time period for reply, if any, is set in the attached communication. Notice of the Office communication was sent electronically on above-indicated "Notification Date" to the following e-mail address(es): main@plgaz.com PTOL-90A (Rev. 04/07) UNITED STATES PATENT AND TRADEMARK OFFICE ____________ BEFORE THE PATENT TRIAL AND APPEAL BOARD ____________ Ex parte CHANGJUN HUANG and JONATHAN CLARK1 ____________ Appeal 2021-002381 Application 15/431,528 Technology Center 2800 ____________ Before BEVERLY A. FRANKLIN, GEORGE C. BEST, and CHRISTOPHER C. KENNEDY, Administrative Patent Judges. KENNEDY, Administrative Patent Judge. DECISION ON APPEAL This is an appeal under 35 U.S.C. § 134(a) from the Examiner’s decision rejecting claims 14, 16, 17, 19, 42-52, 55, and 56. We have jurisdiction under 35 U.S.C. § 6(b). We REVERSE. BACKGROUND The subject matter on appeal relates to methods of making semiconductors that include transient voltage suppression (TVS) diodes, which can be configured to provide electrical protection. E.g., Spec. ¶ 2; 1 “Appellant” refers to “applicant” as defined in 37 C.F.R. § 1.42. The Appellant identifies the real party in interest as SEMTECH CORPORATION. Appeal Br. 1. Appeal 2021-002381 Application 15/431,528 2 Claim 14. Claim 14 is reproduced below from page 19 (Claims Appendix) of the Appeal Brief: 14. A method of making a semiconductor device, comprising: providing a first semiconductor die comprising a first transient voltage suppression (TVS) diode; disposing a second semiconductor die comprising a second TVS diode over the first semiconductor die; disposing the first semiconductor die and the second semiconductor die over a leadframe, wherein a first terminal of the first TVS diode is directly electrically coupled to a first terminal of the second TVS diode, and wherein a second terminal of the first TVS diode is directly electrically coupled to a second terminal of the second TVS diode; depositing an encapsulant over the first semiconductor die, the second semiconductor die, and the leadframe; and singulating through the encapsulant to form a semiconductor package, wherein the semiconductor package is configured to protect a separate semiconductor package from a transient electrical signal by routing the transient electrical signal through the first TVS diode and the second TVS diode in parallel. REJECTIONS ON APPEAL The claims stand rejected under 35 U.S.C. § 103 as follows: 1. Claims 14, 16, 17, 42-47, and 56 over Lee (US 2012/0077312 A1, published Mar. 29, 2012), Nakamura (US 2014/0183758 A1, published July 3, 2014), and Shau (US 2011/0089557 A1, published Apr. 21, 2011). 2. Claims 48-52 over Lee and Shau. 3. Claim 19 over Lee, Shau, and Jeong (US 2012/0028412 A1, published Feb. 2, 2012). 4. Claim 55 over Butterworth (US 2016/0320689 A1, published Nov. 3, 2016), Lee, Nakamura, and Shau. Appeal 2021-002381 Application 15/431,528 3 ANALYSIS Claim 14 recites a method of making a semiconductor device that requires, inter alia, first and second semiconductor dice comprising first and second TVS diodes, and that the dice are configured in a semiconductor package such that a transient electric signal is routed through the first and second TVS diodes in parallel. Appeal Br. 19 (Claims Appendix). Of particular relevance to the issue raised by the Appellant in this case, the Examiner finds that Shau teaches or suggests a semiconductor package including TVS diode multichips, and that Shau’s semiconductor package is configured to protect a separate semiconductor package from a transient electrical signal by routing the transient electrical signal through a first TVS diode and a second TVS diode in parallel. Final Act. 7 (citing Shau Figs. 10, 11, 12, and ¶¶ 3-5, 57-59). The figures of Shau cited by the Examiner disclose embodiments with stacked dice in which the dice are not TVS diodes (e.g., Fig. 11), and an embodiment with a single TVS diode that is not stacked (e.g., Fig. 12(b)). The paragraphs of Shau cited by the Examiner indicate, in relevant part, (1) that the use of side-wall conductor leads is a known method of packaging chips with both singular die and multiple dice (¶ 57), (2) and that “side-wall conductor leads are applicable for wide varieties of integrated circuit chips,” including chips that include a TVS diode (¶ 59, referencing Figure 12(b)). The paragraphs of Shau cited by the Examiner also indicate that the embodiments specifically described by Shau are not limiting, and that “there are many other possible modifications and implementations.” E.g., ¶ 57. We understand the Examiner to be determining that, in view of those disclosures, it would have Appeal 2021-002381 Application 15/431,528 4 been obvious to stack two TVS diodes and package them using side-wall conductor leads. See Final Act. 7-8. In the Appeal Brief, the Appellant acknowledges that Shau discloses a single, unstacked TVS diode in Figure 12(b), and that Shau discloses non- TVS-diode stacked dice packaged using conductor leads in Figure 11. Appeal Br. 9. The Appellant argues, however, that “there is no suggestion in Shau to combine the two embodiments,” and that Shau’s stacked embodiments are “taught specifically only for memory chips,” not TVS diodes. Id. The Appellant argues that “Shau does not disclose any reason for stacking chips that would apply to TVS diodes.” Id. at 11. In the Answer, the Examiner responds by citing the same portions of Shau cited in the Final Action and emphasizing that Shau discloses that sidewall conductor leads can be used with TVS diodes. Ans. 4. The Examiner determines that “a person of ordinary skill in the art would know how to package multiple PNNP TVS dice . . . into one chip . . . in order to reduce the cost of the process and reduce size of the device.” Id. (emphasis added). The Examiner’s rationale is not persuasive. The fact that a person of ordinary skill in the art might “know how to” do something, Ans. 4, is not adequate to establish that a person of ordinary skill in the art would have had reason to do it. See Belden Inc. v. Berk-Tek LLC, 805 F.3d 1064, 1073 (Fed. Cir. 2015) (obviousness “concerns whether a skilled artisan not only could have made but would have been motivated to make the combinations or modifications of prior art to arrive at the claimed invention.” (emphases in original)). Shau teaches that sidewall semiconductor leads can be used both with single die embodiments and with multiple die embodiments. E.g., Shau Appeal 2021-002381 Application 15/431,528 5 ¶ 57. Thus, the fact that Shau associates the use of sidewall semiconductor leads with a single-die TVS diode, see id. ¶ 59, does not imply or suggest that two TVS diodes should be stacked or otherwise packaged into one chip. Similarly, Shau’s generic statements that skilled artisans may modify Shau’s specifically disclosed embodiments does not suggest the specific modification-i.e., an embodiment with multiple TVS diodes-that would be required to fall within the scope of claim 14. At most, the portions of Shau cited by the Examiner indicate that such a modification could be made, not that a person of ordinary skill in the art would have had reason to make it. Accordingly, on the record before us, the Examiner’s rejection appears to impermissibly be based on hindsight. We reverse the rejection of claim 14. All other claims on appeal, either directly or through claim dependency, also require at least two semiconductor die comprising TVS diodes, and the Examiner’s analysis of those claims does not remedy the error identified above. Accordingly, we likewise reverse the rejection of claims 16, 17, 19, 42-52, 55, and 56. Appeal 2021-002381 Application 15/431,528 6 CONCLUSION In summary: Claims Rejected 35 U.S.C. § References Affirmed Reversed 14, 16, 17, 42-47, 56 103 Lee, Nakamura, Shau 14, 16, 17, 42-47, 56 48-52 103 Lee, Shau 48-52 19 103 Lee, Shau, Jeong 19 55 103 Butterworth, Lee, Nakamura, Shau 55 Overall Outcome 14, 16, 17, 19, 42-52, 55, 56 REVERSED