SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

Patent Trials and Appeals Board

Apr 27, 2020

15410288 - (D) (P.T.A.B. Apr. 27, 2020)

UNITED STATES PATENT AND TRADEMARK OFFICE
UNITED STATES DEPARTMENT OF COMMERCE
United States Patent and Trademark Office
Address: COMMISSIONER FOR PATENTS
P.O. Box 1450
Alexandria, Virginia 22313-1450
www.uspto.gov
APPLICATION NO. FILING DATE FIRST NAMED INVENTOR ATTORNEY DOCKET NO. CONFIRMATION NO.
15/410,288 01/19/2017 Michael J. SEDDON ONS01769D01US 6024
132194 7590 04/27/2020
SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC (AS)
5005 E. McDowell Road
Maildrop A700
Phoenix, AZ 85008
EXAMINER
JUNG, MICHAEL
ART UNIT PAPER NUMBER
2895
NOTIFICATION DATE DELIVERY MODE
04/27/2020 ELECTRONIC
Please find below and/or attached an Office communication concerning this application or proceeding.
The time period for reply, if any, is set in the attached communication.
Notice of the Office communication was sent electronically on above-indicated "Notification Date" to the
following e-mail address(es):
ipdocket@iptech.law
patents@onsemi.com
PTOL-90A (Rev. 04/07)

UNITED STATES PATENT AND TRADEMARK OFFICE
____________

BEFORE THE PATENT TRIAL AND APPEAL BOARD
____________

Ex parte MICHAEL J. SEDDON and FRANCIS J. CARNEY

Appeal 2019-003363
Application 15/410,288
Technology Center 2800
____________

Before ROMULO H. DELMENDO, ELIZABETH M. ROESEL, and
MERRELL C. CASHION, JR., Administrative Patent Judges.

DELMENDO, Administrative Patent Judge.

DECISION ON APPEAL
The Appellant1 appeals under 35 U.S.C. § 134(a) from the Primary
Examiner’s final decision to reject claims 1–12 and 17–21.2 We have
jurisdiction under 35 U.S.C. § 6(b).
We affirm.

1 We use the word “Appellant” to refer to “applicant” as defined in 37
C.F.R. § 1.42—namely, Semiconductor Components Industries, LLC
(Application Data Sheet filed January 19, 2017 at 5), which is also identified
as the real party in interest (Appeal Brief filed October 3, 2018 (“Appeal
Br.”) at 3).
2 See Appeal Br. 11–37; Reply Brief filed March 22, 2019 (“Reply Br.”) at
2–13; Final Office Action entered June 13, 2018 (“Final Act.”) at 2–20;
Examiner’s Answer entered January 30, 2019 (“Ans.”) at 3–37.
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I. BACKGROUND
The subject matter on appeal relates to a semiconductor package
formed by mounting a semiconductor device onto a substrate by reflowing
metals (Specification filed January 19, 2017 (“Spec.”) ¶ 2; Abstract).
Figures 1 and 2 (annotated), which illustrate an embodiment of the claimed
subject matter, are reproduced from the Drawings filed January 19, 2017, as
follows:

Figures 1 and 2 above depicts mounting a die 14 provided with multiple
metallic layers onto a substrate 50 that includes a silver layer 52 and copper
layer 54 to produce a semiconductor device package 2 in which an
intermetallic layer 56 has been formed by interaction of a tin layer 48, the
substrate 50’s silver layer 52, a silver sublayer 44, and a copper sublayer 46,
wherein adhesion between the die 14 and substrate 50 is effected without a
solder paste or preforms (Spec. ¶¶ 29–30, 64).
Representative claim 1 is reproduced from the Claims Appendix to the
Appeal Brief, as follows:

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1. A semiconductor package, comprising:
a die comprising a plurality of layers arranged in the
following order:
a layer comprising titanium coupled to the die; and
an intermetallic layer comprising one of an intermetallic
consisting of silver and tin and an intermetallic consisting of
copper and tin, the one of silver and tin and copper and tin
derived from one of the die only and the die and the substrate
only; and
a substrate comprising a copper layer directly coupled to
the intermetallic layer;
wherein the intermetallic layer has a melting temperature
greater than 260 degrees Celsius;
wherein the intermetallic layer does not comprise a
solder; and
wherein the intermetallic layer does not comprise a
bonding material.
(Appeal Br. 38 (emphases added)).
II. REJECTIONS ON APPEAL
On appeal, the Examiner maintains several rejections, as follows:
A. Claims 1–12 and 18–21 under 35 U.S.C. § 112(a), as failing to
comply with the written description requirement;
B. Claims 1–12 and 18–21 under 35 U.S.C. § 112(b) as being
indefinite;3
C. Claims 1–5 and 18–21 under 35 U.S.C. § 103 as being
unpatentable over Lin et al.4 (“Lin”); and
D. Claim 17 under 35 U.S.C. § 102(a)(2) as being anticipated by

3 On appeal, the rejection under 35 U.S.C. § 112(b) of claim 17 has been
withdrawn (Ans. 19).
4 US 8,803,337 B1, issued August 12, 2014.
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or, in the alternative, as obvious over Hisazato et al.5
(“Hisazato”).
(Ans. 3–37; Final Act. 2–20).
III. DISCUSSION
Rejection A (Written Description). The Examiner finds that “claim
1 fails to comply with the written description requirement, because the last
two wherein clauses of claim 1 appear[] to overly constrain the metes and
bounds of claim 1 by introducing overly restrictive caveats” (Ans. 3).6 With
respect to the first “wherein” clause (“wherein the intermetallic layer does
not comprise a solder”), the Examiner points to (1) a description in the
Specification stating that “there may be some pure tin, some pure copper,
some pure silver, some pure nickel, and so forth, in solution, with some
intermetallics interspersed throughout” (Spec. ¶ 60) and (2) several prior art
documents (Williams, US 2013/0043595 A1, published Feb 21, 2013;
Syllaios et al. (“Syllaios”), US 2006/0128136 A1, published June 15, 2006;
and Choe et al. (“Choe”), US 2007/0152016 A1, published July 5, 2007)
disclosing soft metals such as pure tin (Sn) or pure silver (Ag) as suitable
solder materials (Ans. 3–4). Based on these findings, the Examiner states
that “a caveat that the intermetallic layer does not comprise a solder in the
first amended feature is not supported by the original disclosure” (Ans. 3–5).

5 US 2015/0076516 A1, published March 19, 2015.
6 The last two “wherein” clauses (i.e., “wherein the intermetallic layer does
not comprise a solder” and “wherein the intermetallic layer does not
comprise a bonding material”), which we refer to as the “first” and “second”
wherein clauses, respectively, were introduced into claim 1 during
examination via Amendments filed December 6, 2017 and September 6,
2017, respectively.
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With respect to the second “wherein” clause (“wherein the intermetallic
layer does not comprise a bonding material”), the Examiner finds that
Hisazato describes intermetallic compounds such as SnCu and Ag3Sn, which
appear to be included within the scope of the Appellant’s “intermetallic”
materials, as bonding materials (id. at 5). The Examiner then concludes that
“the caveat of the intermetallic layer not comprising a bonding material is
not supported by the original disclosure” (id.).
The Appellant contends that the Examiner’s rejection fails to satisfy
the initial burden of presenting evidence or reasons why a person having
ordinary skill in the art would not have recognized in the original disclosure
a description of the invention defined by the claims (Appeal Br. 11 (citing In
re Wertheim, 541 F.2d 257, 263 (CCPA 1976)). Regarding the first
“wherein” clause, the Appellant emphasizes that the broadest reasonable
interpretation standard does not include giving claims a legally incorrect
interpretation and faults the Examiner’s reliance on several prior art
documents showing that Sn, Ag, and Cu—in certain situations—can be
considered as solder materials (Appeal Br. 12–13). In support, the Appellant
points to examples in which copper, for example, is not being used as solder
(id. at 14). Regarding the second “wherein” clause, the Appellant faults the
Examiner’s reliance on Hisazato’s teaching that SnCu and Ag3Sn
intermetallics are solders or bonding materials and then “mak[ing] the jump
from Hisaz[a]to disclosing intermetallics which are bonding materials to the
conclusion that all intermetallics are therefore bonding materials” (id. at 14).
The Appellant argues that “though the substrate and the die are reflowed
together [in the current invention], there is no indication that the tin-copper
intermetallic or the silver-tin intermetallic ever reach the equilibrium
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necessary in the process . . . to actually form a SnCu or Ag3Sn phase” (id. at
15). According to the Appellant, the term “bonding material” is a term of art
in the semiconductor packaging industry that has “a scope more limited than
just any material that bonds” (id.).
We agree with the Appellant as to the first “wherein” clause
(“wherein the intermetallic layer does not comprise a solder”) but not the
second (“wherein the intermetallic layer does not comprise a bonding
material”). With respect to the first “wherein” clause, the Examiner relies
on paragraph 60 of the Specification (Ans. 3–4). That description, however,
discloses using silver, tin, and/or copper to form an intermetallic layer—not
solder per se. Indeed, paragraph 64 of the Specification provides explicit
support for the concept that the die may be adhered to the substrate without
the use of solder paste in addition to, e.g., the intermetallic layer. Therefore,
the Examiner’s rejection based on a lack of adequate written description for
the first “wherein” clause is not well-founded.
The Examiner’s rejection based on a lack of adequate written
description for the second “wherein” clause is another matter. Although
Hisazato states that “[s]older including tin (Sn) is used as [a] bonding
material” and that, alternatively, a “bonding material . . . may be an
intermetallic compound including silver (Ag) nanoparticles, a silver (Ag)
sintered material, tin copper (SnCu), silver tin (Ag3Sn), or the like”
(Hisazato ¶ 34), it is far from clear that “bonding material” is coextensive in
scope and meaning with “solder.” But regardless of what “bonding
material” would mean to one skilled in the relevant art, the Appellant fails to
direct us to any disclosure in the application, as originally filed, that
mentions or even hints at a semiconductor package that may be made
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without using a “bonding material.” The Appellant’s argument that, in the
claimed invention, “all of the materials used to form the intermetallic are
present as part of the die itself or the substrate” (Appeal Br. 16) is
misplaced. A disclosure in the originally-filed application showing the use
of only certain materials may provide support for a claim directed to a
semiconductor package that consists of the specifically-disclosed materials,
but not a semiconductor package that can include the specifically-disclosed
materials plus any unrecited material except for a “bonding material.” No
such concept is described in the application, as originally filed. Ex parte
Grasselli, 1983 WL 51855 *2 (Bd. App. 1983) (“Despite appellants’
arguments to the contrary, we agree with the examiner’s position of record
that the negative limitations recited in the present claims, which did not
appear in the specification as filed, introduce new concepts and violate the
description requirement of the first paragraph of 35 U.S.C. 112.”), aff’d sub
nom In re Graselli, 738 F.2d 453 (Fed. Cir. 1984).
Because we concur with the Examiner’s finding that the second
“wherein” clause in claim 1 lacks sufficient written description in the
application, as originally filed, we uphold Rejection A as to claim 1.
Independent claim 6 recites a similar wherein clause (“wherein the
intermetallic layer is not a bonding material”) and lacks sufficient written
description in the application, as originally filed, for the same reasons as
discussed above for independent claim 1. See Ans. 6. The Appellant does
not challenge the Examiner’s rejection of dependent claims 2–5, 7–12, and
18–21. The Examiner’s rejection is correct because each of these claims
depends from either rejected independent claim 1 or rejected independent
claim 6. Id.
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Rejection B (Indefiniteness). The Examiner states that claim 1 is
indefinite for two reasons (Ans. 7). First, regarding the first “wherein”
clause, the Examiner acknowledges that “there is nothing inherently
ambiguous or uncertain about a negative limitation” but states that in
“looking at the Appellant’s description of what is actually contained in the
intermetallic layer (para [0060]) and what is considered to be solder in the
semiconductor packaging art, it appears that the intermetallic layer of the
present application actually contains solder” (id. at 7–8). Second, regarding
the second “wherein” clause, the Examiner states that “it is unclear what is
actually being encompassed by an intermetallic layer with the second
negative limitation of the intermetallic layer not comprising a bonding
material” and that this ambiguity is even more pronounced given the
Appellant’s comments regarding Hisazato’s Ag3Sn and SnCu bonding
materials as being excluded from claim 1’s scope when they are necessarily
present (id. at 8).
Regarding the first “wherein” clause, the Appellant argues that “the
Examiner is making an unreasonably broad interpretation of ‘solder[]’”
because it is erroneously based on the notion that all uses of silver, tin, and
copper are as solder materials (Appeal Br. 20–21). Regarding the second
“wherein” clause, the Appellant contends that “[t]he Examiner is again
making [an] unreasonably broad interpretation that any intermetallic layer is
a bonding material as the intermetallic solders of Hisaz[a]to a[re] used as
physically separate bonding materials added to the system of the die and the
substrate” (id. at 22).
We agree with the Appellant as to the first “wherein” clause but not
the second “wherein” clause. As the Appellant points out, not every use of
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silver, tin, or copper is for solder. In the current Specification, these
elements are being used to form the intermetallic layer, which is described as
distinct from additional solder paste (Spec. ¶¶ 60, 64). Therefore, we
discern no basis to conclude that the negative limitations recited in the first
“wherein” clause would create any ambiguity in terms of claim scope.
As for the second “wherein” clause, we agree with the Examiner that
the negative limitations concerning the absence of a “bonding material”
renders claim 1 indefinite. The term “bonding material” does not even
appear in the Specification and, therefore, the Specification fails to
circumscribe with reasonable precision and clarity as to what the Inventors
mean by an “intermetallic layer does not comprise a bonding material.” This
ambiguity is even more pronounced given the Appellant’s unsubstantiated
argument that not “any material that bonds something is a bonding material”
but that, instead, “bonding material” has some unspecified art-recognized
meaning (Appeal Br. 22).
For these reasons, we sustain Rejection B as to claim 1. A similar
“wherein” clause in independent claim 6 makes that claim indefinite for the
same reasons. See Ans. 9. The Examiner does not err in rejecting claims 2–
5, 7–12, and 18–21 as depending from a claim that is indefinite. Id.
Rejection C (Obviousness in View of Lin). For the sake of
completeness and to avoid a piece meal appeal, we also address the prior art
rejections, which do not require us to rely on the scope of the second
“wherein” clause. Ex parte Tanksley, 26 USPQ2d 1384, 1387 (BPAI 1991)
(exercising discretion to reach art rejections despite indefiniteness where
nature of case permitted).
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The Appellant relies on the same arguments for all claims subject to
this rejection (Appeal Br. 25–31). Therefore, the rejected claims stand or
fall with claim 1, which we select as representative pursuant to 37 C.F.R.
§ 41.37(c)(1)(iv).
The Examiner finds that Lin describes a semiconductor package
having all the limitations recited in claim 1 except that it does not specify
that the second metal insertion layer 46, which may be considered as part of
a substrate and is directly coupled to an intermetallic layer 52B, is a copper
layer as required by claim 1 (i.e., “a substrate comprising a copper layer
directly coupled to the intermetallic layer”) (Ans. 10–11). The Examiner
finds, however, that Lin would have suggested making the second metal
insertion layer 46 of the same material as the first metal insertion layer 26,
which is disclosed as a copper layer (id. at 11). The Examiner concludes
that
it would have been obvious to one of ordinary skill in the art . . .
to have chosen the same material (copper) for the second metal
insertion layer as the first metal insertion layer as Lin named the
second metal insertion layer 46 as a metal insertion layer and
represented it in the drawings with the same geometry as the first
metal insertion layer 26
(id. at 11–12 (bolding added)).
The Appellant argues that the Examiner’s rejection does not identify
any rationale between the factual findings and the legal conclusion of
obviousness but acknowledges that “[i]t appears that the Examiner is using
[a] rational[e]” based on “[s]imple substitution of one known element for
another to obtain predictable results” (Appeal Br. 27). However, the
Appellant argues that Lin does not describe “a substrate comprising a copper
layer directly coupled to the intermetallic layer,” as recited in claim 1,
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because Lin’s substrate 30 does not include second metal insertion layer 46
(id. at 29). Furthermore, the Appellant argues that the Examiner incorrectly
treats the limitation “the one of silver and tin and copper and tin derived
from one of the die only and the die and the substrate only” as a product-by-
process limitation (id. at 29–31). According to the Appellant, “the [claimed]
semiconductor package has an intermetallic layer with a structure that
reflows a second time only at a temperature greater than the temperature
applied when the intermetallic layer was first reflowed” (id. at 30–31).
The Appellant’s arguments fail to identify reversible error in the
Examiner’s rejection. In re Jung, 637 F.3d 1356, 1365 (Fed. Cir. 2011).
The Examiner’s rejection includes an explicitly articulated reasoning
for making Lin’s second metal insertion layer 46 in the second die 120 to be
made of the same material as the first metal insertion layer 26 in the first die
110—namely, copper (Ans. 11–12). Indeed, consistent with the Examiner’s
position, Lin explicitly teaches that the “components on the second die 120
can be formed [of] the same or similarly as discussed with regard to
corresponding components on the first die 110” (Lin col. 5, ll. 1–5; Fig. 2).
KSR Int’l Co. v. Teleflex Inc., 550 U.S. 398, 416 (2007) (“[W]hen a patent
claims a structure already known in the prior art that is altered by the mere
substitution of one element for another known in the field, the combination
must do more than yield a predictable result.”). See also In re Fracalossi,
681 F.2d 792, 794 (CCPA 1982) (“[E]vidence establishing lack of all
novelty in the claimed invention necessarily evidences obviousness.”).
We also find no persuasive merit in the Appellant’s argument based
on the notion that Lin’s substrate 30 does not include the second metal
insertion layer 46 (Appeal Br. 29). The question whether Lin describes
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claim 1’s limitation “a substrate comprising a copper layer directly coupled
to the intermetallic layer” does not turn on how Lin defines “substrate 30”
but, rather, what the Inventors mean when they use the term “substrate” in
the context of the current Specification. Here, Lin uses the term “substrate”
to refer to a semiconductor substrate such as bulk silicon, a semiconductor
wafer, a silicon-on-insulator (SOI) substrate, or a silicon germanium
substrate (Lin col. 2, ll. 55–64). By contrast, the Appellant does not limit the
scope of what is meant by “substrate” other than to state that it is “a portion
of a ceramic board” and that it may be a multi-layer structure “including a
silver layer 52 atop a copper layer 54” (bolding added) that is to be adhered
by reflow to a die (Spec. ¶ 57; Figs. 1–2). Under these circumstances, we
find the Examiner’s proffered claim construction of the term “substrate” in
claim 1 to read on Lin’s multilayer structure inclusive of second substrate 30
and second metal insertion layer 46 to be adhered to first die 110 by reflow
to be reasonable (Lin Fig. 2). In re ICON Health & Fitness, Inc., 496 F.3d
1374, 1379 (Fed. Cir. 2007) (“[W]e look to the specification to see if it
provides a definition for claim terms, but otherwise apply a broad
interpretation. As this court has discussed, this methodology produces
claims with only justifiable breadth.”).
The Appellant’s argument (Appeal Br. 29–31) based on the limitation
“the one of silver and tin and copper and tin derived from one of the die only
and the die and the substrate only” is not persuasive because it appears to be
based on an argued feature (“the [claimed] semiconductor package has an
intermetallic layer with a structure that reflows a second time only at a
temperature greater than the temperature applied when the intermetallic
layer was first reflowed”) that is not recited in claim 1. See In re Hiniker
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Co., 150 F.3d 1362, 1369 (Fed. Cir. 1998) (The “name of the game is the
claim” and unclaimed features cannot impart patentability to claims). See
also In re Self, 671 F.2d 1344, 1348 (CCPA 1982) (“[A]ppellant’s
arguments fail from the outset because . . . they are not based on limitations
appearing in the claims.”).
Here, the Appellant does not direct us to evidence that distinguishes
Lin’s product from the claimed product based on features recited in the
claim.
For these reasons, we uphold Rejection C.
Rejection D (Anticipation over Hisazato). Claim 17 recites:
17. A semiconductor package, comprising:
a die comprising a plurality of layers arranged in the
following order:
a layer comprising titanium coupled to the die; and
an intermetallic layer comprising one of an intermetallic
consisting of silver and tin and an intermetallic consisting of
copper and tin; and
a substrate comprising a copper layer directly coupled to
the intermetallic layer;
wherein the intermetallic layer has a melting temperature
greater than 260 degrees Celsius; and
one of:
the intermetallic consisting of silver and tin is derived
from one of the die only and the die and the substrate only; and
the intermetallic consisting of copper and tin is derived
from one of the die only and the die and the substrate only.
(Appeal Br. 42 (emphasis added)).
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The Examiner finds that Hisazato describes every limitation recited in
claim 177 (Ans. 15–18). Regarding the limitations highlighted above in
reproduced claim 17, the Examiner explains that these are product-by-
process limitations that have not been shown to structurally distinguish the
claimed product over the prior art product (id. at 16–18).
The Appellant argues that the claim does not recite a process at all but
a specific semiconductor package that “has an intermetallic layer with a
structure that reflows a second time only at a temperature greater than the
temperature applied when the intermetallic layer was first reflowed” (Appeal
Br. 34). According to the Appellant, “[u]nlike the intermetallic in
Appellant’s disclosure, the solder of Hisaz[a]to has the same reflow
temperature every time it is reflowed” (id.).
The Appellant’s argument fails because it is based on limitations that
do not appear in claim 17. See Hiniker, 150 F.3d at 1369; Self, 671 F.2d at
1348.
Even if the highlighted claim recitations are not product-by-process
limitations as argued by the Appellant (Appeal Br. 34), the Appellant does
not direct us to evidence that distinguishes the structure recited in the claim
from the structure of Lin’s product.
Therefore, we also sustain Rejection D.
IV. CONCLUSION
In summary:

7 The Examiner’s reference to claim 1 (Ans. 16) appears to contain a
typographical error (id. at 34–36).
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Claims
Rejected
35 U.S.C. § Reference(s)/Basis Affirmed Reversed
1–12, 18–21 112(a) Lack of Written
Description
1–12, 18–21
1–12, 18–21 112(b) Indefiniteness 1–12, 18–21
1–5, 18–21 103 Lin 1–5, 18–21
17 102(a)(2) Hisazato 17
Overall
Outcome
1–12, 17–21

No time period for taking any subsequent action in connection with
this appeal may be extended under 37 C.F.R. § 1.136(a).

AFFIRMED