Po-Yen Hsu et al.

Patent Trials and Appeals Board

Aug 23, 2019

15064603 - (D) (P.T.A.B. Aug. 23, 2019)

UNITED STATES PATENT AND TRADEMARK OFFICE
UNITED STATES DEPARTMENT OF COMMERCE
United States Patent and Trademark Office
Address: COMMISSIONER FOR PATENTS
P.O. Box 1450
Alexandria, Virginia 22313-1450
www.uspto.gov
APPLICATION NO. FILING DATE FIRST NAMED INVENTOR ATTORNEY DOCKET NO. CONFIRMATION NO.
15/064,603 03/09/2016 Po-Yen Hsu 59111-US-PA 5463
31561 7590 08/23/2019
JCIPRNET
P.O. Box 600 Taipei Guting
Taipei City, 10099
TAIWAN
EXAMINER
CHOU, SHIH TSUN A
ART UNIT PAPER NUMBER
2811
NOTIFICATION DATE DELIVERY MODE
08/23/2019 ELECTRONIC
Please find below and/or attached an Office communication concerning this application or proceeding.
The time period for reply, if any, is set in the attached communication.
Notice of the Office communication was sent electronically on above-indicated "Notification Date" to the
following e-mail address(es):
Belinda@JCIPGROUP.COM
USA@JCIPGROUP.COM
PTOL-90A (Rev. 04/07)

UNITED STATES PATENT AND TRADEMARK OFFICE
________________

BEFORE THE PATENT TRIAL AND APPEAL BOARD
________________

Ex parte PO-YEN HSU,1
TING-YING SHEN, CHIA-HUA HO, CHIH-CHENG FU, and
FREDERICK CHEN
________________

Appeal 2018-008692
Application 15/064,603
Technology Center 2800
________________

Before ROMULO H. DELMENDO, MARK NAGUMO, and
MERRELL C. CASHION, JR., Administrative Patent Judges.

NAGUMO, Administrative Patent Judge.

DECISION ON APPEAL
Winbond (“Hsu”) timely appeals under 35 U.S.C. § 134(a) from the
Final Rejection2 of claims 1–3, 5, 7–10, and 21.3 We have jurisdiction.
35 U.S.C. § 6. We reverse.

1 The applicant under 37 C.F.R. § 1.46, and hence the appellant under
35 U.S.C. § 134, is identified as Winbond Electronics Corp. (“Windbond”).
(Application Data Sheet, filed 9 March 2016.) The real parties in interest are
named as the inventors and Winbond. (Appeal Brief, filed 9 March 2018
(“Br.”) 1.)
2 Office Action mailed 20 October 2017 (“Final Rejection”; cited as “FR”).
3 Remaining copending claims 11–20 have been withdrawn from
consideration by the Examiner (FR 1, § 5a), and are not before us.
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OPINION
A. Introduction4
The subject matter on appeal relates to resistive memories, which are
said to have the potential of being the next-generation non-volatile memory
devices due to their potential “low power consumption, fast operation speed,
high density, and compatibility with complementary metal oxide
semiconductor (CMOS) manufacturing technologies.” (Spec. 1 [0002].)
Resistive memories are said to include a dielectric material between
two electrodes, and they must be “formed” before use, by applying a
relatively high positive bias across the memory. (Id. at 2 [0003].) An
oxygen vacancy or oxygen ion is said to be formed in the dielectric layer,
leading to formation of a conductive filament. (Id.) During the resetting
process, a relatively high negative bias is applied to the memory cell, and the
process is reversed, such that oxygen vacancies adjacent to the upper
electrode are refilled, or oxygen ions move out of the path of the electric
current, and the conduction filament is broken off. (Id.)
Prior art resistive memories are said to have “dangling bonds” on the
sidewalls of the memory cell that are formed “in a plasma treatment step or a
wet cleansing step of the etching process.” (Id. at 2 [0004].) If present
“[d]uring the resetting process, the dangling bonds are combined with the
oxygen vacancy or the oxygen ion, thus resulting in reset failure.”

4 Application 15/064,603, Resistive memory and method of fabricating the
same, filed 9 March 2016, claiming the benefit of China 20150723998.2,
filed on 29 October 2015. We refer to the “′603 Specification,” which we
cite as “Spec.”
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(Id. at [0004].) Protecting the sidewalls of the memory cell, preventing reset
failure, and further enhancing the high-temperature data retention (HTDR)
properties of the cell are said to be “one of the crucial research topics in the
pertinent field.” (Id.)
Hsu seeks patent protection for resistive memories that are said to
resolve these issues. The structure of resistive memory 1005 and the
functions of the various components can be appreciated readily by
considering the process of making the cell, illustrated in Figures 1A–1I, of
which we reproduce only Figure 1I, on the following page. After forming
conductor-filled, barrier-lined via 104 in dielectric layer 102, first
electrode 1066 (e.g., tantalum nitride, platinum), variable resistance
layer 108 (e.g., hafnium oxide), and first dielectric layer 110 (e.g., silicon
oxide) are formed. (Spec. 4 [0014]–5 [0015]; Figure 1A.) A hole or
opening 10 (shown in, e.g., Figure 1B) is formed in first dielectric layer 110
that exposes a top surface of variable resistance layer 108. (Id. at 6 [0016];
Figure 1B.) Protection layer 112, which has a high dielectric constant (i.e.,
higher than first dielectric layer 110) is then formed conformally on first
dielectric layer 110, on the walls of hole 10, and on exposed first variable
resistive layer 108. (Id. at [0017]; Figure 1C.)

5 Throughout this Opinion, for clarity, labels to elements are presented in
bold font, regardless of their presentation in the original document.
6 The Roman letters “a” and “b” following certain layer labels in Figure 1I
indicate further processing steps have occurred that limit the lateral extent of
the layer.
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{Figure 1I is shown below}

{Figure 1I shows resistive memory 100 in cross-section}
Oxygen exchange layer 114 (e.g., titanium, tantalum) is then formed
on protective layer 112, filling opening 10. (Id. at 6–7 [0018]; Figure 1D.)
A planarization step (e.g., etch-back or chemical mechanical polishing) is
then performed to expose a top surface of protection layer 112.
(Id. at 7 [0019]; Figure 1E.) Barrier layer 116 (e.g., a metal oxide such as
titanium oxynitride [TiOxNy]) is then formed on oxygen exchange layer 114.
(Id. at 7 [0020]; Figure 1F.) Barrier layer 116 is said to be “able to prevent
non-uniformity of the filament that results from large current passing
through the oxygen exchange layer 114a.” (Id.) Second electrode 118
(e.g., TiN, Pt) is then formed on protection layer 112 and barrier layer 116.
(Id. at 7–8 [0021].)
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The structure is then patterned to remove portions of second
electrode 118, protective layer 112, first dielectric layer 110, variable
resistance layer 108, and first electrode 106, forming memory cell 120.
(Id. at 8 [0022]; Figure 1H.) Metal oxide layer 122 (e.g., hafnium oxide) is
then formed conformally on memory cell 120, and dielectric layer 124 (e.g.,
silicon oxide) blanket-covers metal oxide layer 122, and a planarization step
exposes top surface of second electrode 118a. (Id. at 8 [0023]; Figure 1I,
supra.)
Notably, the ′603 Specification reveals that protection
layer 112 [HfO2]
may serve to provide oxygen to the oxygen exchange
layer 114a [TiOxNy, Pt]. That is, during the setting process,
the density of the oxygen vacancy or oxygen ion can be
easily controlled, such that the oxygen vacancy or oxygen ion
can better stay at the center of the oxygen exchange
layer 114a, i.e., the filament is restrained from moving away
from the center of the oxygen exchange layer 114a, so as to
increase the current density and further enhance HDTR.
(Spec. 10 [0026].)
The Specification teaches further that
the first dielectric layer 110b . . . is also arranged adjacent to
the oxygen exchange layer 114a, such that electric field can
be concentrated at the center of the oxygen exchange
layer 114a; as such, the filament is able to stay at the center
of the oxygen exchange layer 114a, and HDTR can be
further improved.
(Id. at [0027].)
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Sole independent claim 1 is representative and reads:
A resistive memory [100] comprising:
a first electrode [106a] and a second electrode [118a]
arranged opposite to each other;
a variable resistance layer [108a] arranged between the
first electrode and the second electrode;
a first dielectric layer [110b]
sandwiched between the variable resistance layer [108a]
and the second electrode [118a] and
having an opening [10],
wherein a portion of a top surface of the variable
resistance layer [108a] is exposed by the opening [10]
of the first dielectric layer [110b], and
the first dielectric layer [110b] is in physical contact
with another portion of the top surface of the variable
resistance layer [108a];
a protection layer [112a] arranged
conformally on a bottom and sidewalls of the opening [10]
and
extending to a top surface of the first dielectric layer [110b],
such that the protection layer [112a] is sandwiched between
the top surface of the first dielectric layer [110b] and
a bottom surface of the second electrode [118a]; and
an oxygen exchange layer [114a] filled in the opening [10],
such that the protection layer [112a] is arranged
on sidewalls of the oxygen exchange layer [114a] and
sandwiched between the oxygen exchange layer [114a]
and the variable resistance layer [108a].
(Claims App., Br. 17; some formatting, emphasis, and bracketed labels to
elements shown in the Figures added.)
It may be noted that all the recitations in claim 1 refer to structures
associated with memory cell 120, in Figure 1I, supra.
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The Examiner maintains the following grounds of rejection:7, 8
A. Claims 1–3, 5, 7, 8, 10, and 21 stand rejected under
35 U.S.C. § 103(a) in view of the combined teachings of
Takagi9 and Kim.10
A1. Claim 9 stands rejected under 35 U.S.C. § 103(a) in view of
the combined teachings of Takagi, Kim, and Baek.11
B. Discussion
The Board’s findings of fact throughout this Opinion are supported by
a preponderance of the evidence of record.
The Examiner finds that Takagi describes, in Figure 8, a resistive
memory that meets most of the limitations recited in claim 1, but for the
sandwiching of the protection layer [112a] between the top surface of first
dielectric layer [110b] and a bottom surface of the second electrode [118a].
(FR 4, 3d para.) The Examiner finds that Kim teaches such a structure, and
concludes that because Takagi and Kim are in the same field of endeavor, a

7 Examiner’s Answer mailed 10 July 2018 (“Ans.”).
8 Because this application does not claim the benefit of any application filed
before 16 March 2013, the effective date of the America Invents Act, we
refer to the AIA version of the statute.
9 Takeshi Takagi, Nonvolatile memory element, method of manufacturing
the same, and nonvolatile memory device, U.S. Patent Application
Publication 2012/0280199 A1 (2012).
10 Ki-hwan Kim et al., Resistive random access memories and methods of
manufacturing the same, U.S. Patent Application Publication
2009/0184396 A1 (2009).
11 In-gyu Baek et al., Nonvolatile memory devices having cells with oxygen
diffusion barrier layers therein and methods of manufacturing the same,
U.S. Patent Application Publication 2011/0291066 A1 (2011).
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person having “ordinary skill in the art would have had a reasonable
expectation of success to modify Takagi with the features of Kim.” (FR 4,
5th para.) Takagi Figure 8 (annotations added) is shown below.

{Takagi Figure 8 shows a resistive memory cell 500 (annotations added)}
Hsu urges, inter alia, that the Examiner erred harmfully in
interpreting12 the combination of first variable resistance layer 117a and
barrier layer 115 of Takagi collectively as the protection layer 112a recited
in claim 1. (Br. 9, 3d para., through 11, l. 2.) More particularly, Hsu argues
that the properties of the materials suitable for variable resistance layer
materials are so different from one another that it makes no sense for the two
to be considered a single “protection layer.” (Br. 10–11.)
The weight of the evidence supports Hsu.
Barrier layer 115 is described as “being a semiconductor layer or an
insulating layer” (Takagi 1 [0010]) that “forms a Schottky barrier junction

12 FR 4, ll. 1–3.
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with at least one of the first electrode [113] and the second electrode [116]”
(Id. at 2 [0010]). As Hsu points out (Br. 10, ll. 9–10), Takagi teaches that
the insulator version of barrier 115 may be Ta2O5 (Takagi 5 [0078]). In
Takagi’s words, “[o]xides having a stoichiometric composition are usually
insulators, or have an extremely high resistance value.” (Id. at 6 [0079].)
In contrast, Takagi discloses that first and second variable resistance
layers 117a and 117b may be oxygen-deficient transition metal oxides, in
particular, tantalum (Ta) oxides, in which the ratio of Ta to O is greater
than 0 and less than 2.5. (Id.) More particularly, first variable resistance
layer 117a is preferably TaOx, where 0.8 ≤ x ≤ 1.9, and second variable
resistance layer 117b is preferably TaOy, where 2.1 ≤ y ≤ 2.5.
(Id. at [0080].)
Semiconductors, insulators, and conductive transition metal oxides are
well-known to be distinct materials having distinct properties. Moreover,
Takagi discloses that the function of the barrier layer13 is very different from
the function of the first and second variable resistance layers14.

13 If the barrier layer is an insulator, it forms a metal-insulator-metal (MIM)
diode with the first or second electrode. (Takagi 5 [0078].) If the barrier
layer is a semiconductor, it forms a metal-semiconductor-metal (MSM)
diode with those electrodes with which it makes contact. (Takagi 5 [0078].)
14 According to Takagi, as a result of the difference in oxygen content
atomic percentage of the two variable resistance layers 117a, 117b,
“a resistance changing phenomenon in response to oxidation and reduction
can occur more easily at the interface between the upper electrode (here the
third electrode 118) and the second variable resistance layer 117b.”
(Takagi 6 [0081].) As a result, a low programming voltage resistive
memory cell can be achieved. (Id.)
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The Examiner has not shown why a person having ordinary skill in
the art would have considered layers 115 and 117a to perform the same (or a
comparable) protective function in the variable resistive memory cell
described by Takagi. The Examiner makes no findings regarding the
teachings of Kim or of Baek that cure this deficiency.
The erroneous conclusion of the Examiner results in a failure to show
that each and every limitation recited in claim 1 is present in the prior art, or
that limitations not present in Takagi would have been obvious incorporate
based on the teachings of the other cited prior art.
Accordingly, we reverse.
C. Order
It is ORDERED that the rejection of claims 1–3, 5, 7–10, and 21 is
reversed.
REVERSED