Imagination Technologies Limited

Patent Trials and Appeals Board

Jul 30, 2020

2019002757 (P.T.A.B. Jul. 30, 2020)

UNITED STATES PATENT AND TRADEMARK OFFICE
UNITED STATES DEPARTMENT OF COMMERCE
United States Patent and Trademark Office
Address: COMMISSIONER FOR PATENTS
P.O. Box 1450
Alexandria, Virginia 22313-1450
www.uspto.gov
APPLICATION NO. FILING DATE FIRST NAMED INVENTOR ATTORNEY DOCKET NO. CONFIRMATION NO.
14/724,484 05/28/2015 Xile Yang 2645-0173US01 5295
125968 7590 07/30/2020
Potomac Law Group PLLC (IMGTEC)
8229 Boone Boulevard Suite 430
Vienna, VA 22182
EXAMINER
BEARD, CHARLES LLOYD
ART UNIT PAPER NUMBER
2616
NOTIFICATION DATE DELIVERY MODE
07/30/2020 ELECTRONIC
Please find below and/or attached an Office communication concerning this application or proceeding.
The time period for reply, if any, is set in the attached communication.
Notice of the Office communication was sent electronically on above-indicated "Notification Date" to the
following e-mail address(es):
Eofficeaction@appcoll.com
Patents@potomaclaw.com
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PTOL-90A (Rev. 04/07)
UNITED STATES PATENT AND TRADEMARK OFFICE
BEFORE THE PATENT TRIAL AND APPEAL BOARD
Ex parte XILE YANG, JOHN W. HOWSON, and JONATHAN
REDSHAW
Appeal 2019-002757
Application 14/724,484
Technology Center 2600
Before ST. JOHN COURTENAY III, LARRY J. HUME, and
PHILLIP A. BENNETT, Administrative Patent Judges.
BENNETT, Administrative Patent Judge.
DECISION ON APPEAL
STATEMENT OF THE CASE
Pursuant to 35 U.S.C. § 134(a), Appellant1 appeals from the
Examiner’s decision to reject claims 1–21. We have jurisdiction under
35 U.S.C. § 6(b).
We affirm in part.

1 We use the word “Appellant” to refer to “applicant” as defined in
37 C.F.R. § 1.42(a). Appellant identifies the real party in interest as
Imagination Technologies Limited. Appeal Br. 1.
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Application 14/724,484

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CLAIMED SUBJECT MATTER
Appellant describes the invention as relating to “allocation of
primitives to primitive blocks.” Spec., Title. The Specification states:
The inventors have realized that it may be beneficial to sort the
primitives into primitive blocks according to their spatial
positions, and that this is possible for non-overlapping primitives
without causing problems due to changes in the sequence order
of the primitives. That is, it is important to preserve the relative
sequence order of primitives which overlap with each other, but
it is not so important to preserve the relative sequence order of
primitives which do not overlap with each other, and this
flexibility in the relative ordering of non-overlapping primitives
allows the primitives to be sorted into primitive blocks according
to their spatial positions. As described in more detail below, by
grouping primitives together into primitive blocks in accordance
with their spatial positions, the performance of a HSR [hidden
surface removal] module and/or a texturing/shading module can
be improved.
Spec. 6.
Claim 9, reproduced below, is illustrative of the claimed subject
matter:
9. A computer graphics processing system, comprising:
a tiling module configured to determine which primitives
are present within each of a plurality of tiles; and
a primitive block allocation module for allocating
primitives to primitive blocks prior to tiling, the primitive block
allocation module being arranged to provide primitive blocks to
the tiling module, wherein a primitive block is arranged to store
primitive data, the primitive block allocation module
comprising:
a data store configured to store a set of primitive blocks to
which primitives can be allocated; and
allocation logic configured to:
(a) receive a sequence of primitives, and
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(b) for each of the received primitives, if at least one
primitive block is stored in the data store: (i) compare an
indication of a spatial position of the received primitive
with at least one indication of a spatial position of the at
least one primitive block stored in the data store, and (ii)
allocate the received primitive to a primitive block based
on a result of the comparison, to thereby allocate the
received primitive to a primitive block in accordance with
its spatial position, to thereby store primitive data for the
received primitive in the primitive block to which the
received primitive is allocated.
Appeal Br. 16–17 (Claims Appendix).
REFERENCES
The prior art relied upon by the Examiner as evidence is:
Name Reference Date
Duluk, Jr. US 5,572,634 Nov. 5, 1996
Huang US 2004/0201592 A1 Oct. 14, 2004
Shearer et al. US 2008/0088619 A1 April 17, 2008
Yang US 2011/0292032 A1 Dec. 1, 2011
Carr US 8,253,730 B1 Aug. 28, 2012
Moon et al. US 2013/0265298 A1 Oct. 10, 2013
Hakura et al. US 8,704,826 B1 April 22, 2014

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REJECTIONS2
Claims 1–4, 8, 9, 13, 17, and 18 stand rejected under 35 U.S.C.
§ 103(a) as being unpatentable over Yang and Moon. Final Act. 29.
Claims 10 and 11 stand rejected under 35 U.S.C. § 103(a) as being
unpatentable over Yang, Moon, Carr, and Shearer. Final Act. 43.
Claim 5 and 12 stands rejected under 35 U.S.C. § 103(a) as being
unpatentable over Yang, Moon, and Duluk. Final Act. 46.
Claims 15 and 16 stand rejected under 35 U.S.C. § 103(a) as being
unpatentable over Yang, Moon, and Hakura. Final Act. 51.
Claim 19 stands rejected under 35 U.S.C. § 103(a) as being
unpatentable over Yang, Moon, and Saul. Final Act. 53.
Claim 6 stands rejected under 35 U.S.C. § 103(a) as being
unpatentable over Yang, Moon, Duluk and Hakura. Final Act. 55.
Claim 7 stands rejected under 35 U.S.C. § 103(a) as being
unpatentable over Yang, Moon, Duluk, Hakura and Huang. Final Act. 56.
Claims 14, 20, and 21 stand rejected under 35 U.S.C. § 103(a) as
being unpatentable over Yang, Moon, and Carr. Final Act. 59.
STANDARD OF REVIEW
The Board conducts a limited de novo review of the appealed
rejections for error based upon the issues identified by Appellant and in light
of the arguments and evidence produced thereon. Ex parte Frye, 94
USPQ2d 1072, 1075 (BPAI 2010) (precedential).

2 The Examiner has also made 35 U.S.C. § 112(f) findings on interpretation
of claim limitations. Final Act. 3–5.
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ISSUE
We have reviewed Appellant’s arguments presented in the Appeal
Brief and the Reply Brief. Based on the presented arguments, we identify
the following issue for our review:
Issue: Has the Examiner erred in finding the cited references teach or
suggest “compare an indication of a spatial position of the received primitive
with at least one indication of a spatial position of the at least one primitive
block stored in the data store,” as recited in the independent claims?
ANALYSIS
Independent claim 9, recites allocation logic configured to (a) receive
a sequence of primitives, and (b) for each of the received primitives, if at
least one primitive block is stored in the date store: (i) compare an indication
of a spatial position of the received primitive with at least one indication of a
spatial position of the at least one primitive block store in the date store.”
Appeal Br. 16–17 (Claims Appendix). In rejecting claim 9, the Examiner
finds Yang’s checking each primitive block against each tile of a primitive
clock teaches or at least suggests “compar[ing] an indication of a spatial
position of the received primitive with at least one indication of a spatial
position of the at least one primitive block stored in the data store.” Final
Act. 31–32 (citing Yang ¶¶ 7, 9), Ans. 11–13 (citing Yang ¶¶ 7–9, 36).
Appellant argues the Examiner has erred because “‘the comparison’
refers to the previously recited ‘comparing an indication of a spatial position
of the received primitive with at least one indication of a spatial position of
the at least one primitive block stored in the data store.’ The [E]xaminer
alleges that Yang discloses this step (see Final rejection at 32), but this is
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incorrect.” Appeal Br. 9. Appellant further contends the cited passages are
deficient because:
Paragraph 0007 describes that the Macro Tiling Engine groups
primitives into primitive blocks with a fixed maximum number
of vertices and primitives, and sends the number of vertices and
primitives together with memory addresses of the primitive
blocks to a Tiling Engine. Paragraph 0009 further describes that
each primitive from a primitive block is checked against each tile
inside a bounding box, such that the primitive block is added to
a display list for a tile which is covered by any primitive in the
primitive block. This is simply the conventional operation
discussed in the Summary of the Claimed Subject Matter section
above. Thus, the rejection is improper and subject to reversal on
the present record for this reason alone, namely that Yang does
not disclose the claim limitations that the examiner alleges it
discloses.
Appeal Br. 10–11.
Appellant argues
Thus, [Yang’s] checking each primitive from a primitive block
against each tile inside a bounding box is done to determine
whether that primitive block should be added to the display list
for a tile. It is clear that what is being checked are primitives in
primitive blocks, i.e. the primitives have been already allocated
to the primitive blocks. For example, see paragraphs [0021] to
[0027] of the summary section of Yang. In particular, paragraphs
[0024] and [0025] clearly teach that image data is divided into
primitive blocks, and then each primitive block is assigned to a
grouping of tiles in dependence on the groupings of tiles it
intersects. It is the assigning of primitive blocks to groupings of
tiles, not the dividing of the image data into primitive blocks,
that is performed in dependence on the grouping of tiles that the
primitive block intersects. This simply does not correspond and
has no relation to comparing an indication of spatial position of
a received primitive with an indication of spatial position of a
primitive block in order allocate the received primitive to a
primitive block as a result of the comparison.
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Reply Br. 3.
We are persuaded by Appellant’s arguments that the Examiner has
erred in rejecting claim 9. Specifically, we agree that Yang’s primitive
block is not comparing an indication of a spatial position of the received
primitive with that of a primitive block stored in the data store as a step in
the process of allocating primitives to the primitive blocks. Reply Br. 2–3.
On this record, we do not find someone of ordinary skill in the art would
have considered Yang’s checking already-allocated primitives in the
primitive block as a teaching or suggestion to comparing an indication of the
spatial position of a primitive block in order to allocate the received
primitive to a primitive clock as a result of the comparison.
As such, we are persuaded the Examiner has erred in rejecting
independent claim 9 and independent claims 20 and 21 which recite this
limitation in commensurate form. For the same reasons, we also do not
sustain the rejections of dependent claims 10–19 under 35 U.S.C. § 103(a).
We do not, however, reverse the rejection of independent claim 1.
Claim 1 recites:
1. A method of processing primitives in a computer graphics
processing system in which primitives are allocated to primitive
blocks at a primitive block allocation module of a computer
graphics processing system, which includes a data store for
storing a set of primitive blocks to which primitives can be
allocated, wherein a primitive block is configured to store
primitive data, the method comprising:
receiving a sequence of primitives;
for each of the received primitives, if at least one primitive
block is stored in the data store:
(i) comparing an indication of a spatial position of
the received primitive with at least one indication of a
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spatial position of the at least one primitive block stored in
the data store; and
(ii) allocating the received primitive to a primitive
block based on the result of the comparison, such that the
received primitive is allocated to a primitive block in
accordance with its spatial position, wherein primitive
data for the received primitive is stored in the primitive
block to which the received primitive is allocated;
outputting primitive blocks including allocated primitives
from the primitive block allocation module;
receiving the outputted primitive blocks at a tiling module
of the computer graphics processing system; and
using the received primitive blocks at the tiling module to
determine which primitives are present within each of a plurality
of tiles.
Appeal Br. 14 (Claims Appendix) (emphasis added). Claim 1 is a method
claim, and it also recites the condition “if at least one primitive block is
stored in the data store.” We interpret this limitation in light of this Board's
precedential decision in Ex Parte Schulhauser, Appeal No. 2013-007848
(PTAB April 28, 2016) (“Schulhauser”). In Schulhauser, the Board held,
when construing a method claim according to its broadest reasonable
interpretation, conditional steps in process claims need not be carried out to
be within the scope of the claim. Schulhauser at 8.
Here, claim 1 is a method claim, and the claim limitations relied upon
by Appellant for patentability are conditional. That is, the recited
“comparing” and “allocating” steps in claim 1 are only performed “for each
of the received primitives if at least one primitive block is stored in the data
store.” Appeal Br. 14 (Claims Appendix). According to the broadest
reasonable interpretation under Schulhauser, in situations where this
condition is not met (i.e., the claim does not positively recite the occurrence
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of the condition), the “comparing” and “allocating” steps are not necessarily
performed. As Appellant’s argument for patentability of claim 1 is based on
the “comparing” and “allocating”3 limitations, Appellant’s argument is not
commensurate with the broadest reasonable interpretation of claim 1, and
therefore, unpersuasive. Accordingly, we sustain the rejection of
independent claim 1 under 35 U.S.C. § 103(a) together with the rejections of
dependent claim 2–8, which are not argued separately.
CONCLUSION
The Examiner’s rejection is affirmed in part. More specifically, we
reverse the Examiner’s rejections of claims 9–21 under 35 U.S.C. § 103(a),
and we affirm the Examiner’s rejections of claims 1–8 under 35 U.S.C.
§ 103(a).

3 Appellant also challenges the combination of Yang and Moon with respect
to the “allocating” limitation. Appeal Br. 9 (“The proposed modification is
improper, because it fails to make technological sense and also because the
modification would not result in the claimed invention.”). We need not
address this argument because the Examiner relies on Moon only for
teaching the “allocating” step, and under Schulhauser, the “allocating” step
need not be performed.
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DECISION SUMMARY
Claims
Rejected
35 U.S.C.
§
Reference(s)/Basis Affirmed Reversed
1–4, 8, 9,
13, 17, 18
103 Yang, Moon 1–4, 8 9, 13, 17, 18
10, 11 103 Yang, Moon, Carr,
Shearer
10, 11
5, 12 103 Yang, Moon,
Duluk
5 12
15, 16 103 Yang, Moon,
Hakura
15, 16
19 103 Yang, Moon, Saul 19
6 103 Yang, Moon,
Duluk and Hakura
6
7 103 Yang, Moon,
Duluk, Hakura
Huang
7
14, 20, 21 103 Yang, Moon, Carr 14, 20, 21
Overall
Outcome
1–8 9–21
TIME PERIOD FOR RESPONSE
No time period for taking any subsequent action in connection with
this appeal may be extended under 37 C.F.R. § 1.136(a)(1)(iv). See 37
C.F.R. § 41.50(f).
AFFIRMED IN PART