Ex Parte Zhang et al

Patent Trial and Appeal Board

Sep 25, 2018

14176290 (P.T.A.B. Sep. 25, 2018)

UNITED STA TES p A TENT AND TRADEMARK OFFICE
APPLICATION NO. FILING DATE
14/176,290 02/10/2014
102469 7590 09/27/2018
PARKER JUSTISS, P.C./Nvidia
14241 DALLAS PARKWAY
SUITE 620
DALLAS, TX 75254
FIRST NAMED INVENTOR
Frank Zhang
UNITED STATES DEPARTMENT OF COMMERCE
United States Patent and Trademark Office
Address: COMMISSIONER FOR PATENTS
P.O. Box 1450
Alexandria, Virginia 22313-1450
www .uspto.gov
ATTORNEY DOCKET NO. CONFIRMATION NO.
IR-13-0352-USOl 3721
EXAMINER
CHEN, PATRICK C
ART UNIT PAPER NUMBER
2842
NOTIFICATION DATE DELIVERY MODE
09/27/2018 ELECTRONIC
Please find below and/or attached an Office communication concerning this application or proceeding.
The time period for reply, if any, is set in the attached communication.
Notice of the Office communication was sent electronically on above-indicated "Notification Date" to the
following e-mail address(es):
docket@pj-iplaw.com
PTOL-90A (Rev. 04/07)
UNITED STATES PATENT AND TRADEMARK OFFICE
BEFORE THE PATENT TRIAL AND APPEAL BOARD
Ex parte FRANK ZHANG and MEHMET T. OZGUN
Appeal2017-008833 1
Application 14/176,290
Technology Center 2800
Before JEFFREY T. SMITH, N. WHITNEY WILSON,
and MICHAEL G. McMANUS, Administrative Patent Judges.
SMITH, Administrative Patent Judge.
DECISION ON APPEAL
This is an appeal under 35 U.S.C. § 134 from a final rejection of
claims 1-20. We have jurisdiction under 35 U.S.C. § 6.
1 Appellant is the Applicant, Nvidia Corporation, which is also identified as
the real party in interest. (App. Br. 3.)
Appeal2017-008833
Application 14/17 6,290
Appellant's invention is generally directed to "waveform stabilization
and, more specifically, to a gated divider circuit, a method of operating a
gated divider circuit and a frequency conversion system employing the
same." (Spec. ,r 1.) Claim 1 illustrates the subject matter on appeal and is
reproduced below:
1. A gated divider circuit, comprising:
a windowing unit configured to generate windowing
waveforms from an input oscillator waveform having a fixed
duty cycle; and
a gated output unit coupled to the windowing unit and
configured to provide a selected waveform portion of the input
oscillator waveform as framed by a corresponding selected one
of the windowing waveforms.
The Examiner maintains the following rejections from the final office
action for our review:
I. Claims 1-3, 5-9, 11-15, and 17-20 rejected under 35 U.S.C.
§ I02(a)(l) as anticipated by Leong et al. (EP 2363952 Al, pub.
Sept. 7, 2011).
II. Claims 1-20 rejected under 35 U.S.C. § I03(a) as unpatentable over
the combination ofBossu et al. (US 7,821,315 B2, issued Oct. 26,
2010) in view of Zhuo et al. (US 2008/0014896 Al, pub. Jan. 17,
2008).
2
Appeal2017-008833
Application 14/17 6,290
Rejection I
OPINION
The Examiner rejected claims 1-3, 5-9, 11-15, and 17-20 as
anticipated by Leong. Appellant limits its arguments to independent claims
1, 8, and 14, which are argued as a group. (See generally App. Br.)
After review of the respective positions provided by Appellant and the
Examiner, we AFFIRM the prior art rejection for the reasons presented by
the Examiner and add the following. 2
Appellant argues the Examiner failed to indicate where Leong
discloses that the circuitry 108 is "configured to provide a selected
waveform portion of the input oscillator waveform as framed by a
corresponding selected one of the windowing waveforms" as required by
claims 1 and 8. (App. Br. 6-7.) Appellant also argues the Examiner failed
to indicate where Leong discloses that the circuitry 108 "provides a selected
waveform portion of the local oscillator waveform as controlled by a
corresponding selected one of the windowing waveforms" as required by
claim 14. (App. Br. 7.)
Appellant's argument lacks persuasive merit for the reasons provided
by the Examiner. (Ans. 4---6; Final Act. 2-5.) The Examiner found that
Leong discloses frequency conversion system comprising a gate divider
circuit having windowing unit configured to generate windowing waveforms
from a input oscillator citing Figures 1 A and 2 as required by independent
claims 1 and 8. (Final Act. 2-3.) The Examiner also found that Leong
discloses the frequency conversion system comprising the circuitry, output
2 We limit our discussion to independent claims 1, 8, and 14.
3
Appeal2017-008833
Application 14/17 6,290
signal, and input oscillator waveform, which provides a selected waveform
portion of the local oscillator waveform as controlled by a corresponding
selected one of the windowing waveforms as required by claim 14. (Final
Act. 4.) The Examiner responded to Appellant's arguments by explaining
how Leong's Figures IA and 2 anticipate the claimed subject matter. (Ans.
4--5.) Appellant has failed to provide a persuasive explanation why the
Examiner's interpretation of Leong is in error.
Rejection II
The Examiner rejected claims 1-20 as obvious over Bossu and Zhuo.
Appellant limits its arguments to independent claims 1, 8, and 14, which are
argued as a group. (See generally App. Br.)
After review of the respective positions provided by Appellant and the
Examiner, we AFFIRM the prior art rejection for the reasons presented by
the Examiner and add the following. 3
Appellant argues the combination of Bossu and Zhuo fails to provide
a prima facie case of obviousness of "selecting a waveform portion of the
oscillator waveform framed by a corresponding one of the windowing
waveforms" as required by claims 1, 8, and 14. (App. Br. 8-13.) Appellant
argues the Examiner has not provided a rational basis for combining Zhou
with Bossu or that the combination would result in a gated divider circuit as
recited in claim 1. (App. Br. 12.)
Appellant's argument lacks persuasive merit for the reasons provided
by the Examiner. (Ans. 7-10; Final Act. 6-10.) The Examiner found Bossu
describes a divider circuit as required by the claimed invention, however,
3 We limit our discussion to independent claims 1, 8, and 14.
4
Appeal2017-008833
Application 14/17 6,290
does not disclose the detailed implementation of the divider circuit. (Final
Act. 6-10 (citing Bossu Figs. 1--4); Ans. 7-8 (same).) The Examiner turns
to Zhou for describing a detailed implementation of a divider circuit having
a window unit configured to generate windowing waveforms from an input
oscillator waveform. (Final Act. 6-10 (citing Zhou Figs. 8-9); Ans. 8
(same).) The Examiner concludes that it would have been obvious to
incorporate the divider circuit detailed implementation in the divider circuit
of Bossu because Bossu does not expressly provide the details of the divider
circuit. The teachings of Zhou would have given the skilled artisan a
reasonable expectation that it was obvious to provide detailed
implementation in the divider circuit of Bossu. See Pfizer, Inc. v. Apotex,
Inc., 480 F.3d 1348, 1364 (Fed. Cir. 2007) (the expectation of success need
only be reasonable, not absolute). Appellant has failed to explain why the
detailed implementation for a divider circuit such as described by Zhou
would have been incompatible and unsuitable for the divider circuit of
Bossu. Consequently, Appellant has failed to provide an adequate
explanation why the rejection over the combination of Bossu and Zhou is in
error.
Appellant has not directed us to evidence that establishes that the
claimed invention provides unexpected results.
Accordingly, we affirm the Examiner's 35 U.S.C. § 103(a) rejections
of claims 1-20 for the reasons given above and presented by the Examiner.
DECISION
5
Appeal2017-008833
Application 14/17 6,290
The Examiner's prior art rejections of claims 1-3, 5-9, 11-15, and
17-20 under 35 U.S.C. § 102(a)(l) and claims 1-20 under 35 U.S.C.
§ 103(a) are affirmed.
TIME PERIOD
No time period for taking any subsequent action in connection with
this appeal may be extended under 3 7 C.F .R. § 1.13 6( a)( 1 ).
AFFIRMED
6