Ex Parte Woodward et alDownload PDFPatent Trial and Appeal BoardMar 22, 201814579705 (P.T.A.B. Mar. 22, 2018) Copy Citation UNITED STA TES p A TENT AND TRADEMARK OFFICE APPLICATION NO. FILING DATE 14/579,705 12/22/2014 23505 7590 03/26/2018 CONLEY ROSE, P.C. 575 N. Dairy Ashford Road Suite 1102 HOUSTON, TX 77079 FIRST NAMED INVENTOR Robert A. Woodward UNITED STATES DEPARTMENT OF COMMERCE United States Patent and Trademark Office Address: COMMISSIONER FOR PATENTS P.O. Box 1450 Alexandria, Virginia 22313-1450 www .uspto.gov ATTORNEY DOCKET NO. CONFIRMATION NO. 7071-13400 4897 EXAMINER PEARSON, DAVID J ART UNIT PAPER NUMBER 2438 NOTIFICATION DATE DELIVERY MODE 03/26/2018 ELECTRONIC Please find below and/or attached an Office communication concerning this application or proceeding. The time period for reply, if any, is set in the attached communication. Notice of the Office communication was sent electronically on above-indicated "Notification Date" to the following e-mail address( es): pathou@conleyrose.com PTOL-90A (Rev. 04/07) UNITED STATES PATENT AND TRADEMARK OFFICE BEFORE THE PATENT TRIAL AND APPEAL BOARD Ex parte ROBERT A. WOODWARD, DANIEL M. HERRING, and ANDREW W. HULL Appeal2017-009542 Application 14/579,705 Technology Center 2400 Before ELENI MANTIS MERCADER, CATHERINE SHIANG, and JOHN P. PINKERTON, Administrative Patent Judges. SHIANG, Administrative Patent Judge. DECISION ON APPEAL Appellants appeal under 35 U.S.C. § 134(a) from the Examiner's rejection of claims 1-8 and 22-25, which are all the claims pending and rejected in the application. We have jurisdiction under 35 U.S.C. § 6(b ). We reverse. Appeal2017-009542 Application 14/579,705 STATEMENT OF THE CASE Introduction According to the Specification, the present invention relates to user interfaces in vehicle systems. See generally Spec. 1. Claim 1 is exemplary: 1. A system comprising: a first processor; a non-volatile random access memory coupled to the first processor, the non-volatile random access memory storing program instructions for execution by the first processor, the programming instructions stored only in encrypted form; an encryption engine coupled to the first processor and coupled to the non-volatile random access memory; a bridge logic device coupled to the first processor and configured to couple to an external peripheral network bus; and wherein the encryption engine is configured to decrypt software program instructions stored in the non-volatile random access memory for execution by the first processor. References and Rejections Claims 1, 2, 4, 6-8, and 22-25 are rejected under 35 U.S.C. § 103 as being unpatentable over Jauch (US 2012/0303177; Nov. 9, 2012) and Iguchi (US 2002/0169960; Nov. 14, 2002). Claim 3 is rejected under 35 U.S.C. § 103 as being unpatentable over Jauch, Iguchi, and Bertram (US 8,904,556 Bl; Dec. 2, 2014). Claim 5 is rejected under 35 U.S.C. § 103 as being unpatentable over Jauch, Iguchi, and Leebow (US 2012/0180507 Al; July 19, 2012). ANALYSIS We have reviewed the Examiner's rejection in light of Appellants' contentions and the evidence of record. We concur with Appellants' 2 Appeal2017-009542 Application 14/579,705 contention that the Examiner erred in finding the cited portions of Jauch and Iguchi collectively teach "an encryption engine coupled to the first processor and coupled to the non-volatile random access memory; ... wherein the encryption engine is configured to decrypt software program instructions stored in the non-volatile random access memory for execution by the first processor," as recited in independent claim 1 (emphases added). 1 See App. Br. 17-20; Reply Br. 7-10. The Examiner finds "Jauch differs from the claimed invention in that they fail to teach" the above limitations. Final Act. 3. The Examiner then cites Iguchi, and maps the claimed "encryption engine" to Iguchi's encryption processing circuit 126. See Final Act. 4; Ans. 9-10. Iguchi describes the encryption processing circuit 126 as follows: "the encryption processing circuit 126 in the storage device 120 generates KS5 by using a random number or the like[.]" Iguchi i-f 117; see also Iguchi i-f 124 ("the session key KS5 generated by the encryption processing circuit 126"); Iguchi i-f 41("The CPU 128 uses an encryption processing circuit 126 in order to perform an encryption processing inside the storage device 120."). The Examiner does not cite any Iguchi portion that teaches the encryption processing circuit 126 "is configured to decrypt software program instructions," as required by claim 1. Instead, Iguchi teaches "the CPU 128 decrypts the application program with the use of KM 151 and the KM-compliant encryption processing program 152 [. ]" Iguchi i-f 51. As shown in Iguchi's Figure 1, the encryption processing circuit 126 is separate 1 Appellants raise additional arguments. Because the identified issue is dispositive of the appeal, we do not reach the additional arguments. 3 Appeal2017-009542 Application 14/579,705 from any of CPU 128, KM 151, or the KM-compliant encryption processing program 152. See Iguchi, Fig. 1. Therefore, absent further explanation, the Examiner has not persuaded us that Iguchi teaches "an encryption engine coupled to the first processor and coupled to the non-volatile random access memory; ... wherein the encryption engine is configured to decrypt software program instructions stored in the non-volatile random access memory for execution by the first processor," as required by claim 1 (emphases added), based on the Examiner's mapping. Further, as applied by the Examiner, the teachings of Jauch do not remedy the deficiencies of Iguchi discussed above. See Final Act. 3--4. Because the Examiner fails to provide sufficient evidence or explanation to support the rejection, we are constrained by the record to reverse the Examiner's rejection of claim 1. We also reverse the Examiner's rejection of corresponding dependent claims 2-8 and 22-25. Although the Examiner cites additional references for rejecting some dependent claims, the Examiner has not shown the additional references overcome the deficiency discussed above regarding the rejection of claim 1. We note we reverse the rejection based on the Examiner's findings in the record. If the prosecution reopens, we leave it to the Examiner to determine whether the claimed "encryption engine" encompasses Iguchi' s CPU and Iguchi' s CPU "is configured to decrypt software program instructions," as required by claim 1. 4 Appeal2017-009542 Application 14/579,705 DECISION We reverse the Examiner's decision rejecting claims 1-8 and 22-25. REVERSED 5 Copy with citationCopy as parenthetical citation