Ex Parte Wilcox et al

Patent Trial and Appeal Board

Mar 26, 2018

13447583 (P.T.A.B. Mar. 26, 2018)

UNITED STA TES p A TENT AND TRADEMARK OFFICE
APPLICATION NO. FILING DATE
13/447,583 04/16/2012
47795 7590 03/28/2018
TROP, PRUNER & HU, P.C.
1616 S. VOSS RD., SUITE 750
HOUSTON, TX 77057-2631
FIRST NAMED INVENTOR
Jeffrey R. Wilcox
UNITED STATES DEPARTMENT OF COMMERCE
United States Patent and Trademark Office
Address: COMMISSIONER FOR PATENTS
P.O. Box 1450
Alexandria, Virginia 22313-1450
www .uspto.gov
ATTORNEY DOCKET NO.
ITL.0668C2US
(Pl2986C2)
CONFIRMATION NO.
6168
EXAMINER
MACKALL, LARRY T
ART UNIT PAPER NUMBER
2131
NOTIFICATION DATE DELIVERY MODE
03/28/2018 ELECTRONIC
Please find below and/or attached an Office communication concerning this application or proceeding.
The time period for reply, if any, is set in the attached communication.
Notice of the Office communication was sent electronically on above-indicated "Notification Date" to the
following e-mail address( es):
tphpto@tphm.com
Inteldocs _ docketing@cpaglobal.com
PTOL-90A (Rev. 04/07)
UNITED STATES PATENT AND TRADEMARK OFFICE
BEFORE THE PATENT TRIAL AND APPEAL BOARD
Ex parte JEFFREY R. WILCOX and NOAM YOSEF
Appeal2017-007188
Application 13/447,583 1
Technology Center 2100
Before BRADLEY W. BAUMEISTER, JASON V. MORGAN, and
AMBER L. HAGY, Administrative Patent Judges.
MORGAN, Administrative Patent Judge.
DECISION ON APPEAL
Introduction
This is an appeal under 35 U.S.C. § 134(a) from the Examiner's Final
Rejection of claims 2, 3, 5-10, and 12-25. Claims 1, 4, and 11 are canceled.
Amend. 2-3 (Dec. 28, 2015). We have jurisdiction under 35 U.S.C. § 6(b).
We REVERSE and enter a NEW GROUND OF REJECTION.
Invention
Appellants disclose a technique in which a data signal amplifier is
selectively disabled "in response to the absence of a predetermined operation
occurring over the memory bus." Abstract.
1 Appellants identify Intel Corporation as the real party in interest. App.
Br. 3.
Appeal2017-007188
Application 13/447 ,583
Exemplary Claim (key limitations emphasized)
2. An apparatus, comprising:
a semiconductor memory;
a sense amplifier coupled to read data from the semiconductor
memory; and
a circuit to save power when data is not being read from the
semiconductor memory, the circuit to:
maintain the sense amplifier enabled for a continuous time
interval including a first memory access, wherein the sense
amplifier is to sense data during the first memory access and is
to sense data during a second memory access; and
selectively disable the sense amplifier after the second access
based at least in part on a signal activity of a memory bus.
Rejections
The Examiner rejects claims 2, 3, 5-10, 12-21 2, and 2 5 under
35 U.S.C. § 103(a) as being unpatentable over Huang et al. (US 6,058,059;
issued May 2, 2000) and Cheng et al. (US 5,559,990; issued Sept. 24, 1996).
Final Act. 3-11.
The Examiner rejects claims 22-24 under 35 U.S.C. § 103(a) as being
unpatentable over Huang, Cheng, and Lee et al. (US 2006/0069458 Al;
published Mar. 30, 2006). Final Act. 11-12.
FINDINGS AND CONTENTIONS
In rejecting claim 2 under 35 U.S.C. § 103(a), the Examiner finds
Huang's sense amplifier activation and deactivation teaches or suggests the
claim language of "selectively disable[ing] the sense amplifier after the
second access based at least in part on a signal activity of a memory bus."
2 The Examiner omits claims 18-21 from the statement of the rejection
(Final Act. 3), but addresses them in the body of the rejection (id. at 9-11).
2
Appeal2017-007188
Application 13/447 ,583
Final Act. 4 (citing Huang col. 2, 11. 39--59, col. 5, 11. 48---65, and col. 6, 11.
17-22). Specifically, the Examiner interprets selectively disabling the sense
amplifier, in the claimed manner, as encompassing sense amplifiers that "are
only active during a read cycle" and thus "are disabled when there is no
active read request to initiate a read cycle." Ans. 4--5.
Appellants contend the Examiner erred because Huang immediately
switches off or disables its sense amplifiers after a read has completed, but
this "action is independent of any activity of a 'memory bus."' App. Br. 12;
see also Reply Br. 3. Appellants further note claim 2
Id.
does not recite a circuit to selectively disable the sense amplifiers
"when there is no active read request to initiate a read cycle," but
rather ... recites a circuit to[] "selectively disable the sense
amplifier . . . based at least in part on a signal activity of a
memory bus."
ANALYSIS
Appellants' arguments are persuasive because the Examiner's
interpretation of the disputed recitation as encompassing disabling or failing
to enable a sense amplifier based on memory bus inactivity does not fall
within a reasonably broad interpretation of the disputed recitation. The
disputed limitation requires that the sense amplifier be disabled based on
memory bus activity.
The Specification discloses embodiments directed to, for example,
"selectively disabling the amplification in response to the absence of a
predetermined operation occurring over the memory bus." Spec. 13; see
also Abstract; Spec. i-fi-120. However, these embodiments do not reveal a
special definition given to the claimed signal activity of a memory bus that
differs from the plain meaning of the recitation so as to encompass signal
3
Appeal2017-007188
Application 13/447 ,583
inactivity. See Phillips v. AWH Corp., 415 F.3d 1303, 1316 (Fed.
Cir. 2005). In giving claim recitations their "broadest reasonable
interpretation, words of the claim must be given their plain meaning, unless
such meaning is inconsistent with the specification and prosecution history."
Trivascular, Inc. v. Samuels, 812 F.3d 1056, 1062 (Fed. Cir. 2016) (citing
Straight Path IP Grp., Inc. v. Sipnet EU S.R.O., 806 F.3d 1356, 1362 (Fed.
Cir. 2015)).
The plain meaning of signal activity of a memory bus, as claimed,
does not encompass Huang's signal inactivity. Huang merely teaches using
activity (the beginning of a read cycle) to enable a sense amplifier, and then
using inactivity (the read ending) to disable the sense amplifier. See Huang
col. 1, 11. 23-25; Ans. 4--5.
Furthermore, the Examiner does not rely on Cheng to teach or suggest
the claimed reliance on signal activity of a memory. See Final Act. 4--5.
Therefore, we agree with Appellants that the Examiner's findings do not
show the combination of Huang and Cheng teaches or suggests "a circuit to
... selectively disable the sense amplifier after the second access based at
least in part on a signal activity of a memory bus," as claimed.
Accordingly, we do not sustain the Examiner's 35 U.S.C. § 103(a)
rejection of claim 1, or claims 3, 5-10, 12-21, and 25, which contain similar
recitations. The Examiner also does not rely on Lee to cure the noted
deficiency of Huang and Cheng. See Final Act. 11-12. Therefore, we
likewise do not sustain the Examiner's 35 U.S.C. § 103(a) rejection of
claims 22-24, which also contain similar recitations.
4
Appeal2017-007188
Application 13/447 ,583
NEW GROUND OF REJECTION
We are unable to find support in Appellants' originally filed
Specification for claim 2 's recitation of "a circuit to ... selectively disable
the sense amplifier after the second access based at least in part on a signal
activity of a memory bus" (emphasis added). Thus, pursuant to our
discretionary authority under 37 C.F.R. § 41.50(b ), we newly reject claim 2
as lacking adequate written description under 35 U.S.C. § 112(a) or (pre-
AIA § 112, first paragraph). "Adequate written description means that the
applicant, in the specification, must 'convey with reasonable clarity to those
skilled in the art that, as of the filing date sought, he or she was in possession
of the [claimed] invention."' Agilent Techs., Inc. v. Afjj;metrix, Inc., 567
F.3d 1366, 1379 (Fed. Cir. 2009) (citation omitted) (brackets in original).
Independent claim 2 was not included in the original submission of
the '583 Application on April 16, 2012. The claim language on appeal-"a
circuit to ... selectively disable the sense amplifier after the second access
based at least in part on a signal activity of a memory bus" (claim 2}-was
first entered by amendment during prosecution before the Examiner. See the
Claim Amendments section (at 2) associated with Appellants' Reply to
Office Action Dated May 6, 2014 (filed August 6, 2014).
Claim 1 of the application as originally filed (now canceled) included
a recitation that was instead directed to "selectively disabling the
amplification in response to the absence of a predetermined operation
occurring over the memory bus." Spec. 13 (emphasis added); see also
Abstract; Spec. i-fi-120. However, as discussed above, this disclosed
embodiment does not ascribe new meaning to a signal activity of a memory
bus. Rather, the disclosed embodiment is directed to memory bus signal
5
Appeal2017-007188
Application 13/447 ,583
inactivity, which does not teach or suggest the claimed use of signal activity
of a memory bus and does not reasonably convey to an artisan of ordinary
skill that Appellants had possession of the claimed invention.
Appellants cite to disclosures in the Specification directed to an end-
of-byte signal that is asserted to indicate the end of a read operation,
contending that this disclosure provides support for the amended claim
language "a circuit to ... selectively disable the sense amplifier after the
second access based at least in part on a signal activity of a memory bus."
See App. Br. 5 (citing, e.g., Spec. i-fi-131-32); see also Spec. Fig. 9. We
disagree that the cited passages provide adequate support for the claim
language.
It is not enough for Appellants' Specification to disclose merely
disabling the sense amplifier based on signal activity. Rather, claim 2
requires that the recited signal activity more specifically be "of a memory
bus" (emphasis added). We are unable to discern any disclosure showing
that the end-of-byte signal is asserted on a memory bus or asserted in
response to any other signal activity of a memory bus.
Therefore, we find Appellants' Specification fails to provide adequate
written description for "a circuit to ... selectively disable the sense amplifier
after the second access based at least in part on a signal activity of a memory
bus," as recited in amended claim 2. We similarly find the Specification
fails to provide adequate written description for a step of sensing data that
comprises "selectively disabling the sense amplifier after the second access
based at least in part on a signal activity of the memory bus," as recited in
claim 18.
6
Appeal2017-007188
Application 13/447 ,583
Accordingly, we newly reject independent claims 2 and 18, as well as
dependent claims 3, 5-10, and 12-25, under 35 U.S.C. § 112(a) (or pre-AIA
§ 112, first paragraph) as lacking adequate written description in the
originally filed Specification.
DECISION
We reverse the Examiner's decision rejecting claims 2, 3, 5-10, and
12-25.
We newly reject claims 2, 3, 5-10, and 12-25 under 35 U.S.C. § 112,
first paragraph (pre-AIA).
This Decision contains a new ground of rejection pursuant to
37 C.F.R. § 41.50(b). Section 41.50(b) provides "[a] new ground of
rejection pursuant to this paragraph shall not be considered final for judicial
review." Section 41.50(b) also provides:
When the Board enters such a non-final decision, the appellant,
within two months from the date of the decision, must exercise
one of the following two options with respect to the new ground
of rejection to avoid termination of the appeal as to the rejected
claims:
(1) Reopen prosecution. Submit an
appropriate amendment of the claims so rejected or
new Evidence relating to the claims so rejected, or
both, and have the matter reconsidered by the
examiner, in which event the prosecution will be
remanded to the examiner. The new ground of
rejection is binding upon the examiner unless an
amendment or new Evidence not previously of
Record is made which, in the opinion of the
examiner, overcomes the new ground of rejection
designated in the decision. Should the examiner
7
Appeal2017-007188
Application 13/447 ,583
reject the claims, appellant may again appeal to the
Board pursuant to this subpart.
(2) Request rehearing. Request that the
proceeding be reheard under §41.52 by the Board
upon the same Record. The request for rehearing
must address any new ground of rejection and state
with particularity the points believed to have been
misapprehended or overlooked in entering the new
ground of rejection and also state all other grounds
upon which rehearing is sought.
Further guidance on responding to a new ground of rejection can be
found in the Manual of Patent Examining Procedure§ 1214.01 (9th Ed.,
Rev. 08.2015, Jan. 2018).
No time period for taking any subsequent action in connection with
this appeal may be extended under 37 C.F.R. § 1.136(a). See 37 C.F.R.
§ 41.50(±).
REVERSED
37 C.F.R. § 41.50(b)
8