Ex Parte Weekamp et al

Board of Patent Appeals and Interferences

May 30, 2012

10539314 (B.P.A.I. May. 30, 2012)

UNITED STATES PATENT AND TRADEMARK OFFICE
____________

BEFORE THE BOARD OF PATENT APPEALS
AND INTERFERENCES
____________

Ex parte JOHANNUS WILHELMUS WEEKAMP,
MARC ANDRE DE SAMBLER and
ERIC CORNELIS EGBERTUS VAN GRUNSVEN
____________

Appeal 2009-015258
Application 10/539,314
Technology Center 2800
____________

Before ERIC S. FRAHM, KRISTEN L. DROESCH and
JEFFREY S. SMITH, Administrative Patent Judges.

DROESCH, Administrative Patent Judge.
DECISION ON APPEAL
Appeal 2009-015258
Application 10/539,314

2
STATEMENT OF THE CASE
Appellants seek review under 35 U.S.C. § 134(a) of a final rejection
of claims 1-10. We AFFIRM.
BACKGROUND
Appellants’ disclosed invention relates to an electronic device, and
corresponding method of manufacturing, that includes a semiconductor
element, a first connection element, a first patterned electrically conductive
layer and a second patterned electrically conductive layer. The device is
further provided with an encapsulation that encapsulates all except the first
conductive layer, which is part of the substrate. Abs.; see Spec. 1
Independent claim 1 is illustrative and is reproduced below (disputed
limitation in italics, material in [brackets] added):
1. A method of manufacturing an electronic device
comprising the steps of:
[a] providing a substrate having a first layer of an
electroconductive material, in which layer conductors are or
will be defined in accordance with a desired pattern;
[b] providing a foil having a second patterned layer of
electroconductive material, in which layer conductors are
defined in accordance with a desired pattern;
[c] providing elements, including a semiconductor
element and a first connection element, on a first side of the
substrate, thereby bringing at least two of the said elements, one
of which is the first connection element, and corresponding
conductors in the first layer into electric contact;
[d] providing the foil on either side of the elements,
thereby establishing electric contact between at least the two
elements and the corresponding conductors in the second layer;
[e] providing a passivating material from the second side
of the semiconductor element through the foil, which
passivating material forms an encapsulation of the elements;
and
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Application 10/539,314

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[f] separating the assembly of substrate, encapsulation
and second conductive layer, thereby forming the electronic
device.

Claims 1-3 and 5-9 stand rejected under 35 U.S.C. § 103(a) as
unpatentable over Lorentz (6,324,072; Nov. 27, 2001) and Nakatani
(2002/0117743; Aug. 29, 2001).
Claims 4 and 10 stand rejected under 35 U.S.C. § 103(a) as
unpatentable over Lorentz, Nakatani and Dubin (4,897,327; Jan. 30, 1990).
ISSUE
Did the Examiner err in finding that the combination of Lorentz and
Nakatani teach or suggest: “providing a passivating material from the second
side of the semiconductor element through the foil, which passivating
material forms an encapsulation of the elements,” as recited in independent
claim 1, and similarly recited in independent claim 8?
ANALYSIS
We have reviewed the Examiner’s rejection in light of Appellants’
arguments in the Appeal Brief1 presented in response to the Final Office
Action and Appellants’ arguments in the Reply Brief presented in response
to the Answer. We disagree with Appellants’ conclusions and highlight and
address specific findings and arguments for emphasis as follows.
The Examiner relies on Lorentz for teaching the claim limitations with
the exception of limitations [e] and [f]. Ans. 4-5. The Examiner finds that
Nakatani teaches limitations [e] and [f]. Ans. 5 (citing Nakatani Fig. 7H).
The Examiner further explains, referring to Figure 7H of Nakatani below,

1 Throughout this Decision, we refer to the Corrected Appeal Brief filed
June 23, 2009 as the Appeal Brief.
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Appeal 2009-015258
Application 10/539,314

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from examples given in the Specification into the claims unless they are
otherwise required by the claims. See Constant v. Advanced Micro-Devices,
Inc. 848 F.2d 1560, 1571 (Fed. Cir. 1988). Instead, the broadest reasonable
meaning is applied to claim terms according to their ordinary usage as they
would be understood by persons of ordinary skill in the art while accounting
for definitions found in the written description. In re Morris, 127 F.3d 1048,
1054 (Fed. Cir. 1997). Appellants do not direct us to an explicit definition in
the Specification for the passivating material. Appellants also do not
persuasively argue, nor direct us to objective evidence to demonstrate, that
the Examiner unreasonably interpreted Nakatani’s sheet material (704, 707,
shown shaded in gray), obtained by processing a mixture including an
inorganic filler and an uncured thermosetting resin into a sheet (see Nakatani
¶¶ 0067, 0072, 0073), as a passivating material.
Related to the previous arguments, Appellants assert that the
conductive paste through vias 705, 708 of the resin sheets 704, 707 provides
electric contact and teaches away from the disputed claim limitations. App.
Br. 5-6. Appellants’ arguments are unpersuasive since, as explained above,
isolation or electrical isolation of the elements is not required by the claims.
Furthermore, Appellants do not persuasively explain why Nakatani’s
teaching of vias (705, 708) providing electrical connections between the
wiring patterns (701, 709) (see Nakatani ¶¶ 0071, 0072), suggests that any
developments based on Nakatani’s disclosure would be unlikely to produce
the objective of Appellants’ invention. See Syntex (U.S.A.) v. Apotex, Inc.,
407 F.3d 1371, 1380 (Fed. Cir. 2005) (“Under the proper legal standard, a
reference will teach away when it suggests that the developments flowing
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Application 10/539,314

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from its disclosures are unlikely to produce the objective of the applicant’s
invention.” (citing In re Gurley, 27 F.3d 551, 553 (Fed Cir. 1994)))
Appellants further argue that Nakatani does not disclose or suggest
any foil through which a passivating material is provided to form an
encapsulation. Reply Br. 3. Appellants assert that Nakatani is completely
silent about any material passing through anything. Id.
Appellants’ arguments are unpersuasive. The Examiner finds that
Nakatani’s wiring pattern (701) corresponds to the claimed foil layer, and
Nakatani’s sheet material (704, 707, shown shaded in gray) corresponds to
the passivating material. As depicted in Nakatani’s Figure 7H, the sheet
material (704, 707) passes through the thickness of the wiring pattern (701)
(i.e., foil) and provides encapsulation of the semiconductor or chip elements
(702 or 703) (i.e., surrounds the semiconductor and chip elements).
For all these reasons we sustain the Examiner’s rejection of claims 1-3
and 5-7 as obvious over Lorentz and Nakatani.
Although Appellants present arguments under separate headings for
claims 4, and 8-10, Appellants’ arguments do not substantively address the
limitations of claims 4, and 8-10. App. Br. 7-10. Accordingly, for the same
reasons as claims 1-3 and 5-7, we sustain the rejections of claims 8 and 9 as
obvious over Lorentz and Nakatani, and claims 4 and 10 as obvious over
Lorentz, Nakatani and Dubin.
Appeal 2009-015258
Application 10/539,314

7
DECISION
We AFFIRM the rejection of claims 1-3 and 5-9 under
35 U.S.C. § 103(a) as unpatentable over Lorentz and Nakatani.
We AFFIRM the rejection of claims 4 and 10 under
35 U.S.C. § 103(a) as unpatentable over Lorentz, Nakatani and Dubin.
TIME PERIOD
No time period for taking any subsequent action in connection with
this appeal may be extended under 37 C.F.R. § 1.136(a).
AFFIRMED

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