Ex Parte Wang et al

Board of Patent Appeals and Interferences

Jun 26, 2009

11089580 (B.P.A.I. Jun. 26, 2009)

UNITED STATES PATENT AND TRADEMARK OFFICE
____________

BEFORE THE BOARD OF PATENT APPEALS
AND INTERFERENCES
____________

Ex parte LEI WANG, RANDALL J. NETTLETON,
and THOMAS J. SULLIVAN
____________

Appeal 2009-001603
Application 11/089,580
Technology Center 2800
____________

Decided: 1 June 26, 2009
____________

Before JOSEPH F. RUGGIERO, CARLA M. KRIVAK, and ELENI
MANTIS MERCADER, Administrative Patent Judges.

RUGGIERO, Administrative Patent Judge.

DECISION ON APPEAL

1 The two-month time period for filing an appeal or commencing a civil
action, as recited in 37 C.F.R. § 1.304, begins to run from the decided date
shown on this page of the decision. The time period does not run from the
Mail Date (paper delivery) or Notification Date (electronic delivery).

Appeal 2009-001603
Application 11/089,580

STATEMENT OF THE CASE
Appellants appeal under 35 U.S.C. § 134(a) from the Final Rejection
of claims 1-10, 12, 16-24, and 26-28. Claims 11 and 25 have been allowed
and claims 13-15 have been cancelled. We have jurisdiction under 35
U.S.C. § 6(b).
We reverse.
Rather than reiterate the arguments of Appellants and the Examiner,
reference is made to the Brief (filed January 28, 2008), the Answer (mailed
April 28, 2008), and the Reply Brief (filed June 5, 2008) for the respective
details. Only those arguments actually made by Appellants have been
considered in this decision. Arguments which Appellants could have made
but chose not to make in the Briefs have not been considered and are
deemed to be waived [see 37 C.F.R. § 41.37(c)(1)(vii)].

Appellants’ Invention
Appellants’ invention relates to a system and method in which a delay
circuit receives a first signal and provides a time separated copy of the first
signal. A first set of interconnects provides the first signal to a first receiver
and a second set of interconnects provides the time separated copy of the
first signal to a second receiver. At least one of the sets of interconnects is
arranged so that it acts as a shield for another set of interconnects. A
clocked deracer circuit is connected to at least one of the sets of
interconnects and operates to delay delivery of a signal carried by at least
one of the sets of interconnects. (See generally Spec. ¶¶ [0014]-[0018]).

2
Appeal 2009-001603
Application 11/089,580

Claim 1 is illustrative of the invention and reads as follows:
1. A system, comprising:
a delay circuit configured to receive a first signal and to provide a
time separated copy of the first signal;
two or more sets of interconnects, a first set being configured to
provide the first signal to a first receiver and a second set being
configured to provide the time separated copy to a second
receiver, at least one of the sets of interconnects being operably
connected to the delay circuit, at least one of the sets of
interconnects being arranged as a shield for another set of
interconnects; and
a clocked deracer circuit operably connected to at least one of the
interconnects and being configured to delay delivery of a signal
carried by at least one of the interconnects.

The Examiner’s Rejections
The Examiner relies on the following prior art references to show
unpatentability:
Masleid US 2004/0098630 A1 May 20, 2004
Amekawa US 2004/0098684 A1 May 20, 2004
Park US 2005/0233573 A1 Oct. 20, 2005
(filed Jun. 29, 2004)
Foreman US 2005/0246116 A1 Nov. 3, 2005
(filed Apr. 29, 2004)
Broyde US 2006/0192429 A1 Aug. 31, 2006
(filed Feb. 18, 2004)

Claims 1-3, 6-8, 12, and 16-21 stand rejected under 35 U.S.C.
§ 102(e) as being anticipated by Masleid.
3
Appeal 2009-001603
Application 11/089,580

Claims 1-3, 6-10, 22-24, and 26-28 stand rejected under 35 U.S.C.
§ 102(e) as being anticipated by Foreman.
Claims 4 and 5 stand rejected under 35 U.S.C. § 103(a) as being
unpatentable over Masleid and/or Foreman, further in view of “one or more
of” Amekawa, Broyde, and Park.

ISSUES
(i) Under 35 U.S.C § 102(e), does Masleid have a disclosure
which anticipates the invention set forth in claims 1-3, 6-8, 12,
and 16-21, and does Foreman have a disclosure which
anticipates the invention set forth in claims 1-3, 6-10, 22-24,
and 26-28?

A pivotal issue before us is whether Appellants have demonstrated
that the Examiner erred in finding that the race prevention features disclosed
by Masleid and Foreman correspond to the claimed set of interconnects
arranged as a shield. A further pivotal issue is whether Foreman discloses
first and second sets of interconnects connected, respectively, to near end
and far end receivers and a clock deracer circuit which is arranged to reduce
slack associated with hold timing at the near and far end receivers.

(ii) Under 35 U.S.C § 103(a), with respect to appealed claims 4
and 5, would one of ordinary skill in the art at the time of the
invention have found it obvious to combine any one of
Amekawa, Broyde, or Park with either Masleid or Foreman to
render the claimed invention unpatentable?

FINDINGS OF FACT
The record supports the following findings of fact (FF) by a
preponderance of the evidence:
4
Appeal 2009-001603
Application 11/089,580

1. Appellants’ disclosed invention (Fig. 1 and ¶ [0027]) is directed
to a system in which a second set of interconnects is arranged as a “shield”
for a first set of interconnects. The shielding arrangement prevents an
undesirable signal from being induced on the first set of interconnects and
prevents the first set of interconnects from experiencing a cross-talk induced
delay.
2. Masleid discloses (Fig. 1 and ¶ [0005]) a transparent latch
timing circuit in which, during a first portion of a clock cycle, a first latch L1
is transparent allowing an input to enter the latch L1 and a second latch L2 is
closed. During the second portion of the clock cycle, the L1 latch closes and
the L2 latch becomes transparent.
3. Masleid also discloses (¶ [0005]) that the non-overlapping
clock phases prevent a race condition from occurring in outputs fed back
from latch L2 through the second logic path 150.
4. Foreman discloses (¶ [0008]) a method of adjusting timing
slack for a set of racing paths by grouping delay elements and cancelling
delay contributions from grouped elements having similar characteristics.
5. Foreman also discloses (Figs. 3A and 3B and ¶ [00027]) a set of
racing paths in which partial delays caused by similar cell types in early and
late paths are removed.

5
Appeal 2009-001603
Application 11/089,580

PRINCIPLES OF LAW

1. ANTICIPATION
It is axiomatic that anticipation of a claim under § 102 can be found if
the prior art reference discloses every element of the claim. See In re King,
801 F.2d 1324, 1326 (Fed. Cir. 1986) and Lindemann Maschinenfabrik
GMBH v. American Hoist & Derrick Co., 730 F.2d 1452, 1458 (Fed. Cir.
1984).
In rejecting claims under 35 U.S.C. § 102, “[a] single prior art
reference that discloses, either expressly or inherently, each limitation of a
claim invalidates that claim by anticipation.” Perricone v. Medicis
Pharmaceutical Corp., 432 F.3d 1368, 1375-76 (Fed. Cir. 2005), citing
Minn. Mining & Mfg. Co. v. Johnson & Johnson Orthopaedics, Inc., 976
F.2d 1559, 1565 (Fed. Cir. 1992). “Anticipation of a patent claim requires a
finding that the claim at issue ‘reads on’ a prior art reference.” Atlas Powder
Co. v. IRECO, Inc., 190 F.3d 1342, 1346 (Fed Cir. 1999) (“In other words, if
granting patent protection on the disputed claim would allow the patentee to
exclude the public from practicing the prior art, then that claim is
anticipated, regardless of whether it also covers subject matter not in the
prior art.”) (internal citations omitted).

2. OBVIOUSNESS

In rejecting claims under 35 U.S.C. § 103, it is incumbent upon the
Examiner to establish a factual basis to support the legal conclusion of
obviousness. See In re Fine, 837 F.2d 1071, 1073 (Fed. Cir. 1988). In so
6
Appeal 2009-001603
Application 11/089,580

doing, the Examiner must make the factual determinations set forth in
Graham v. John Deere Co., 383 U.S. 1, 17 (1966). “[T]he examiner bears
the initial burden, on review of the prior art or on any other ground, of
presenting a prima facie case of unpatentability.” In re Oetiker, 977 F.2d
1443, 1445 (Fed. Cir. 1992). Furthermore,
‘there must be some articulated reasoning with some rational
underpinning to support the legal conclusion of obviousness’ . . .
[H]owever, the analysis need not seek out precise teachings
directed to the specific subject matter of the challenged claim, for
a court can take account of the inferences and creative steps that
a person of ordinary skill in the art would employ.

KSR Int’l Co. v. Teleflex Inc., 550 U.S. 398, 418 (2007) (quoting In re
Kahn, 441 F.3d 977, 988 (Fed. Cir. 2006)).

ANALYSIS

35 U.S.C. § 102(e) REJECTIONS

I. The rejection of claims 1-3, 6-8, 12, and 16-21 based on Masleid.

Appellants’ arguments in response to the Examiner’s anticipation
rejection, based on Masleid, of independent claims 1, 12, 16, 20, and 21,
assert that the Examiner has not shown how each of the claimed features is
present in the disclosure of Masleid so as to establish a prima facie case of
anticipation. Appellants’ arguments (App. Br. 13-16; Reply Br. 2-5) focus
on the contention that, in contrast to the requirements of each of the rejected
independent claims 1, 12, 16, 20, and 21, Masleid does not disclose at least
one set of interconnects which is arranged as a shield for another set of
interconnects.
7
Appeal 2009-001603
Application 11/089,580

We agree with Appellants. Our interpretation of the disclosure of
Masleid coincides with that of Appellants, i.e., Masleid, at best, discloses
(Fig. 1; ¶ [0005]) clock circuitry which acts to prevent a race condition from
occurring by delaying delivery of signals carried over interconnects to
receiver latches.
In addressing the language of the appealed independent claims, the
Examiner has taken the position (Ans. 3, 10, and 11) that, since Masleid
discloses a configuration and placement of interconnects that prevents a race
condition from occurring, such a race prevention feature is synonymous with
the claimed shield. According to the Examiner (id.), the race prevention
feature disclosed by Masleid satisfies the language of the appealed
independent claims since an undesirable signal that arrives too quickly is
prevented, i.e., shielded, from occurring.
We simply find, however, no basis on the record before us for the
Examiner interpreting the claim language in this manner. While it is true
that limitations may not be imported into the claims from the specification, it
is equally true that claim language must not be read in isolation but, rather,
must be interpreted in light of the disclosure in the specification. See, e.g.,
Phillips v. AWH Corp., 415 F.3d 1303, 1319 (Fed. Cir. 2005) (en banc)
where the court reaffirmed the view that the specification “is always highly
relevant to the claim construction analysis. Usually, it is dispositive; it is the
single best guide to the meaning of a disputed term.”
It is clear to us from a reading of Appellants’ Specification that a fair
and reasonable interpretation of the “shield” language of the appealed claims
requires, not simply that circuit interconnects are arranged so that a signal is
delayed to prevent it from arriving prematurely at a receiver location but,
8
Appeal 2009-001603
Application 11/089,580

rather, that a set of interconnects is configured as a protection, i.e., as a
“shield,” for another set of interconnects to protect each other from signal
interference. We agree with Appellants that the ordinarily skilled artisan
would recognize, in the context of Appellants’ Specification and claims, that
the term “shield” must be interpreted as an arrangement which acts to
prevent signal interference such as undesirable induced signals and
crosstalk-induced delays as described in detail at paragraph [0024] of
Appellants’ Specification.
In view of the above discussion, since all of the claim limitations are
not present in the disclosure of Masleid, we do not sustain the Examiner’s 35
U.S.C. § 102(e) rejection of appealed independent claims 1, 12, 16, 20, and
21, nor of claims 2, 3, 6-8, and 17-19 dependent thereon.

II. The rejection of claims 1-3, 6-10, 22-24, and 26-28 based on
Foreman.

With respect to the anticipation rejection, based on Foreman, of
independent claim 1, and its dependent claims 2, 3, and 6-10, we do not
sustain this rejection as well. As with Masleid, we find that the Examiner
has improperly interpreted the race condition preventing disclosure of
Foreman as satisfying the claimed interconnect “shield” feature.
Foreman discloses (Figs. 3A and 3B; ¶ [0027]) a race condition
preventing system which eliminates racing paths by grouping and cancelling
the delay contributions of elements having similar delays. We find no
support in the disclosure of Foreman, however, to support the Examiner’s
conclusion (Ans. 7, 17, and 18) that the racing path elimination feature of
Foreman corresponds to the signal interference prevention feature required
9
Appeal 2009-001603
Application 11/089,580

by the claimed interconnect “shield” when that term is properly interpreted
when read in light of Appellants’ Specification.
We also do not sustain the Examiner’s anticipation rejection, based on
Foreman of independent claim 22, and its dependent claims 23, 24, and 26-
28. Independent claim 22 differs from the other appealed independent
claims in that it does not include a recitation of any “shielding” feature. The
language of independent claim 22 does, however, require first and second
sets of interconnects connected, respectively, to near end and far end
receivers and a clock deracer circuit which is arranged to reduce slack
associated with hold timing at the near and far end receivers. While the
Examiner has directed attention to the disclosure of timing slack adjustment
in Foreman (¶¶ [0008] and [0027]), we find no disclosure, in these
paragraphs or elsewhere in Foreman, which would satisfy the particular
near-end and far-end receiver and clocked deracer requirements of
independent claim 22.

35 U.S.C. § 103(a) REJECTION
We also do not sustain the Examiner’s obviousness rejection of
dependent claims 4 and 5 based on the combination of Masleid or Foreman
in view of any one of Amekawa, Broyde, or Park. The Examiner has
applied the Amekawa, Broyde, and Park references, in the alternative, to
either Masleid or Foreman to address the cross-talk induced delay features of
dependent claims 4 and 5. We find nothing in the disclosure of any of
Amekawa, Broyde, or Park, however, which overcomes the innate
deficiencies of either Masleid or Foreman discussed supra.

10
Appeal 2009-001603
Application 11/089,580

CONCLUSION OF LAW
Based on the findings of facts and analysis above, we conclude that
Appellants have shown that the Examiner erred in rejecting claims 1-3, 6-10,
12, 16-24, and 26-28 for anticipation under 35 U.S.C. § 102(b), and in
rejecting claims 4 and 5 for obviousness under 35 U.S.C. § 103(a).

DECISION
The Examiner’s decision rejecting claims 1-3, 6-10, 12, 16-24, and
26-28 under 35 U.S.C. § 102(e) and claims 4 and 5 under 35 U.S.C. § 103(a)
is reversed.

REVERSED

ELD

HEWLETT PACKARD COMPANY
P O BOX 272400, 3404 E. HARMONY ROAD
INTELLECTUAL PROPERTY ADMINISTRATION
FORT COLLINS, CO 80527-2400
11