Ex Parte Tirumalai et alDownload PDFPatent Trial and Appeal BoardNov 6, 201311081984 (P.T.A.B. Nov. 6, 2013) Copy Citation UNITED STATES PATENT AND TRADEMARK OFFICE ________________ BEFORE THE PATENT TRIAL AND APPEAL BOARD ________________ Ex parte PARTHA P. TIRUMALAI, YONGHONG SONG, and SPIROS KALOGEROPULOS ________________ Appeal 2011-006754 Application 11/081,984 Technology Center 2100 ________________ Before JOSEPH F. RUGGIERO, JOHNNY A. KUMAR, and MICHAEL J. STRAUSS, Administrative Patent Judges. KUMAR, Administrative Patent Judge. DECISION ON APPEAL Appeal 2011-006754 Application 11/081,984 2 STATEMENT OF THE CASE Introduction Appellants appeal under 35 U.S.C. § 134(a) from the Examiner’s final rejection of claims 1-4, 6-14, and 16-21. Claims 5 and 15 have been cancelled. We have jurisdiction under 35 U.S.C. § 6(b). We affirm. Invention Appellants’ invention relates to a system that generates code for a scout thread to prefetch data values for a main thread. Spec., ¶ [0012] Independent claim 1 further illustrates the invention as follows: 1. A method for generating code for a scout thread to prefetch data values for a main thread, comprising: receiving source code for a program; and compiling the source code to produce executable code for the program by: performing reuse analysis to identify prefetch candidates which are likely to be touched during execution of the program; conditionally replacing loads and stores from the prefetch candidates with prefetch instructions for the scout thread; and producing executable code for the scout thread which contains prefetch instructions to prefetch the identified prefetch candidates for the main thread, wherein when executed, a prefetch instruction prefetches a data item from a main memory to a cache memory for the corresponding replaced load or store before the data item is used by the main thread as Appeal 2011-006754 Application 11/081,984 3 the main thread executes the corresponding load or store; whereby the scout thread can subsequently be executed in parallel with the main thread and separately from the main thread in advance of where the main thread is executing. Rejection The Examiner rejected claims 1-4, 6-14, and 16-21 under 35 U.S.C. § 103(a) as being unpatentable over Wu (US 2005/0149915 A1, Jul. 7, 2005) in view of Tian (US 2005/0086652 A1, Apr. 21, 2005). Ans. 4-21. ISSUE AND ANALYSIS Based on Appellants’ arguments in the Appeal Brief (Br. 16-20), the principal and dispositive issues of whether the Examiner erred in rejecting exemplary claim 1 turn on whether the combination of Wu and Tian teaches or suggests “conditionally replacing loads and stores from the prefetch candidates with prefetch instructions for the scout thread” (hereinafter the prefetch instructions feature), and “the scout thread can subsequently be executed in parallel with the main thread,” (hereinafter the parallel execution feature), as recited in claim 1. Independent claims 11 and 21 recite similar subject matter and Appellants rely on similar arguments as those presented in support of claim 1 (Br. 16). We have reviewed the Examiner’s rejections in light of Appellants’ arguments that the Examiner has erred. We disagree with Appellants’ conclusions. We adopt as our own (1) the findings and reasons set forth by the Examiner in the action from which this appeal is taken and (2) the reasons set forth by the Examiner in the Examiner’s Answer in response to Appeal 2011-006754 Application 11/081,984 4 Appellants’ Appeal Brief. We concur with the conclusions reached by the Examiner. We highlight and address specific findings and arguments for emphasis as follows. In rejecting independent claim 1 over the combination of Wu and Tian, the Examiner finds that Wu discloses the disputed prefetch instructions feature as explained on pages 22-27 of the Answer in response to Appellants’ arguments that the Examiner erred. In particular, as shown in Wu’s annotated Fig. 20 (Ans. 23), the Examiner finds that Wu's Use Translation Module meets the prefetch instructions feature because Wu discloses “conditionally (1202 analyze profile information to identify load types) replacing loads and stores from the prefetch candidates with prefetch instructions (1204 Eliminate redundant prefetching loads, 1206 insert prefetching instructions for the selected loads).” Id. at 24. We agree with the Examiner. As to the disputed parallel execution feature, Appellants’ arguments (Br. 19-20) are not persuasive as our interpretation of the disclosure of Wu coincides with that of the Examiner. In particular, we agree with the Examiner that Wu explicitly teaches parallel processing (Wu ¶[0095]. Ans. 28-29.) We observe that no Reply Brief is of record to rebut such findings including the Examiner’s responses to Appellants’ arguments. Therefore, in the absence of sufficient rebuttal evidence or argument to persuade us otherwise, we adopt the Examiner’s findings and underlying reasoning (Ans. 21-29), which are incorporated herein by reference. Consequently, we find no error in the Examiner’s rejection of claims 1 (11 and 21) and dependent Appeal 2011-006754 Application 11/081,984 5 claims 2-4, 6-10, 12-14, and 16-20, not separately argued, fall with claims 1 and 11, respectively. See 37 C.F.R. § 41.37(c)(1)(vii). CONCLUSION The Examiner did not err in rejecting claims 1-4, 6-14, and 16-21 under 35 U.S.C. § 103(a) as being unpatentable over Wu and Tian. DECISION We affirm the Examiner’s decision to reject claims 1-4, 6-14, and 16- 21. No time period for taking any subsequent action in connection with this appeal may be extended under 37 C.F.R. § 1.136(a)(1)(iv). AFFIRMED tj Copy with citationCopy as parenthetical citation