Ex Parte Tichy et al

Patent Trial and Appeal Board

Jun 14, 2018

14265575 (P.T.A.B. Jun. 14, 2018)

UNITED STA TES p A TENT AND TRADEMARK OFFICE
APPLICATION NO. FILING DATE FIRST NAMED INVENTOR
14/265,575 04/30/2014 TOMAS TICHY
132240 7590 06/18/2018
SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC (RH)
5005 E. MCDOWELL ROAD, Maildrop A 700
Phoenix, AZ 85008
UNITED STATES DEPARTMENT OF COMMERCE
United States Patent and Trademark Office
Address: COMMISSIONER FOR PATENTS
P.O. Box 1450
Alexandria, Virginia 22313-1450
www .uspto.gov
ATTORNEY DOCKET NO. CONFIRMATION NO.
ONS01675US 9850
EXAMINER
JAMAL!, ISHRAT F
ART UNIT PAPER NUMBER
2838
NOTIFICATION DATE DELIVERY MODE
06/18/2018 ELECTRONIC
Please find below and/or attached an Office communication concerning this application or proceeding.
The time period for reply, if any, is set in the attached communication.
Notice of the Office communication was sent electronically on above-indicated "Notification Date" to the
following e-mail address(es):
patents@onsemi.com
PTOL-90A (Rev. 04/07)
UNITED STATES PATENT AND TRADEMARK OFFICE
BEFORE THE PATENT TRIAL AND APPEAL BOARD
Ex parte TOMAS TICHY and KAREL PTACEK
Appeal2017-007144
Application 14/265,575
Technology Center 2800
Before KAREN M. HASTINGS, JEFFREY R. SNAY and
MERRELL C. CASHION, JR., Administrative Patent Judges.
HASTINGS, Administrative Patent Judge.
DECISION ON APPEAL
Appellants 1 seek our review under 35 U.S.C. § 134 of the Examiner's
final decision rejecting2 claims 1-20. We have jurisdiction over the appeal
under 35 U.S.C. § 6(b ).
We REVERSE.
1 Semiconductor Components Industries, LLC (SCI) is stated to be the real
parties in interest (App. Br. 1 ).
2 We refer to the Appeal Brief, filed Nov. 15, 2016 ("Appeal Br.); Final
Office Action, mailed Jun. 16, 2016 ("Final Action"); Examiner's Answer,
mailed Feb. 7, 2017 ("Ans.); and the Reply Brief, filed Apr. 4, 2017 ("Reply
Br.").
Appeal2017-007144
Application 14/265,575
Claim 1 is illustrative of the appealed subject matter:
1. A method for self-synchronization in a synchronous rectifier
controller (SRC), comprising:
sensing a current sense signal;
comparing the current sense signal to a RESET
threshold;
commencing a minimum off time timer when the current
sense signal exceeds the RESET threshold; and
resetting the minimum off time timer when the current
sense voltage falls below the RESET threshold before the
minimum off time timer has lapsed.
Appeal Br. 28 (Claims Appendix).
Independent claims 8 and 16 are directed to synchronous rectifier
controllers that include control logic that commences a minimum off time
timer when the current sense signal "is above" (i.e., exceeds) the "RESET
threshold" and resetting the minimum off time timer "otherwise" ( claims 8,
16), corresponding to the disputed limitation of "resetting the minimum off
time timer when the current sense voltage falls below the RESET threshold"
in claim 1 .
The Examiner rejected claims 1--4, 6, 8-10, 12, 14, 16-17, and 19
under 35 U.S.C. § I02(a)(l) as being anticipated by Soldano et al., (U.S.
2009/0016083 Al, published Jan. 15, 2009; hereinafter "Soldano"). The
Examiner also maintains the grounds of rejection under 35 U.S.C.
§ I03(a)(l) as listed on page 2 of the Examiner's Answer; however, the only
dispute in this case is whether the claim language "resetting the minimum
off time timer when the current sense voltage falls below the RESET
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Application 14/265,575
threshold" as required by claim 1 (and likewise the comparable limitation
required in each of the independent claims 8, and 16) is anticipated by
Soldano.
ANALYSIS
Appellants argue that the Examiner has not shown how Soldano
teaches "resetting the minimum off time timer when the current sense
voltage falls below the RESET threshold" as required by the disputed
claims. A preponderance of the evidence supports Appellants' position.
Appellants urge that Soldano clearly discloses a manner opposite to
the claimed limitation by resetting the minimum off time circuit when the
current sense signal (VDs) is equal to or above a reset threshold (VTm)
(Appeal Br. 13-14). Appellants point out that paragraph [0055] of Soldano
discloses resetting the minimum off time circuit when V Ds equals V Tm or
when VDs is above VTm (id.). The Examiner relies on a control circuit
diagram bubble that is not described in Soldano to indicate a "NOT gate"
signal inversion (Ans. 4, see also Examiner's annotated Fig. 5 of Soldano at
Ans. 5) and argues that "if the current sense signal 'VD' goes into non-
inverting input of comparator 32 and reset threshold 'VTH3' into inverting
input of comparator 32 then the comparison signal would be [the] same as
[the] RESET signal as claimed" (Final Action 2-3, Ans. 3-4). Appellants
provide evidence to support their understanding of Soldano' s disputed
control logic circuit bubble, and state that the Examiner's argument
constitutes speculation and would require modification of Soldano because
"regardless of whether or not the signal from comparator 32 is inverted
inside timer 24, one [of ordinary skill] in the art would understand that the
bubble on the input of timer 24 indicates that the Reset input responds to a
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Application 14/265,575
logic low signal and is reset by such a logic low signal" (Reply Br. 5-6, see
also Appeal Br. 14-16).
Inherency "may not be established by probabilities or possibilities.
The mere fact that a certain thing may result from a given set of
circumstances is not sufficient." Continental Can Co. USA, Inc. v.
Monsanto Co., 948 F.2d 1264, 1269 (Fed. Cir. 1991) (quoting In re Oelrich,
666 F.2d 578, 581 (CCPA 1981)). An inherent characteristic must be
inevitable. See Oelrich, 666 F .2d at 5 81. The Examiner has not met the
initial burden of establishing a prima facie case of anticipation based on an
inherent or explicit disclosure of the claimed subject matter under 35 U.S.C.
§§ 102. In re Oetiker, 977 F.2d 1443, 1445 (Fed. Cir. 1992) ("[T]he
examiner bears the initial burden, on review of the prior art or on any other
ground, of presenting a prima facie case ofunpatentability.").
Contrary to the Examiner's position, Appellants have provided
persuasive argument and evidence to establish that it is not inherent in
Soldano that the bubble on time circuit 24 would invert the signal from
comparator 32 to result in "resetting the minimum off time timer when the
current sense voltage falls below the RESET threshold" (Ans. 3-7; Reply Br.
5-6).). Specifically, the Examiner has not adequately shown that Soldano's
bubble of time circuit 24 would necessarily have meant an inverse effect on
the signal from the comparator 32. Although the Examiner discusses two
NPL documents (NPLl and NPL2) (Ans. 5-7), those references are not
included in the statement of the rejection and, therefore, are not properly
before us. See In re Hoch, 428 F.2d 1341, 1342 n.3 (CCPA 1970).
Nonetheless, Soldano does not describe that the bubble/circle on the time
circuit 24 has an inverse effect, and Appellants provided evidence of a
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Appeal2017-007144
Application 14/265,575
different possible meaning for the bubble attached to the time circuit 24
(Reply Br. 7-8). Thus, on this record, Soldano falls short of disclosing
"resetting the minimum off time timer when the current sense voltage falls
below the RESET threshold" as required by claim 1, and de facto required in
each independent claim 8 and 16. Net MoneyIN, Inc. v. VeriSign, Inc., 545
F.3d 1359, 1371 (Fed. Cir. 2008) (If a reference does not disclose within the
four comers of the document all of the limitations arranged or combined in
the same way as recited in the claim, it cannot anticipate under 35 U.S.C. §
102).
Thus, in view of Appellants' arguments and evidence, we conclude
that the Examiner has not met the burden of establishing inherency of the
effect of the bubble attached to the time circuit 24 in Figure 5 of Soldano on
the signal from comparator 32. Consequently, a preponderance of the
evidence supports Appellants' position that the Examiner erred in finding
that Soldano anticipates the claimed subject matter of "resetting the
minimum off time timer when the current sense voltage falls below the
RESET threshold" as required in claim 1 and the comparable limitation as
recited in claims 8 and 16. As such, we cannot sustain the anticipation
rejection based on Soldano as applied to independent claims 1, 8 and 16.
Accordingly, the Examiner's 35 U.S.C. § 102(a)(l) rejection of claims
1, 8 and 16 is reversed.
The Examiner fails to rely upon any evidence that the other applied
prior art teaches or suggests the use of "resetting the minimum off time timer
when the current sense voltage falls below the RESET threshold" as
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Application 14/265,575
claimed. 3 Thus, the Examiner's 35 U.S.C. § 103(a)(l) rejections of the
remaining claims are also reversed.
DECISION
The Examiner's decision is reversed.
ORDER
REVERSED
3 The Board relies on the involved parties to focus the issues and decides
those issues based on facts and arguments presented by the involved parties.
See Ex Parte Frye, 293 F. 1013 (BPAI 2010 (precedential)). While the
Board is authorized to enter a new ground of rejection, this authority is
discretionary. See 3 7 C.F .R. § 41. 77 (b ). We decline to consider the
obviousness of resetting the minimum off time circuit when the current
sense voltage falls below the reset threshold of Soldano since the issue is not
before us.
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