Ex Parte Tan et al

Patent Trial and Appeal Board

Oct 31, 2016

11682544 (P.T.A.B. Oct. 31, 2016)

UNITED STATES PATENT AND TRADEMARK OFFICE
UNITED STATES DEPARTMENT OF COMMERCE
United States Patent and Trademark Office
Address: COMMISSIONER FOR PATENTS
P.O. Box 1450
Alexandria, Virginia 22313-1450
www.uspto.gov
APPLICATION NO. FILING DATE FIRST NAMED INVENTOR ATTORNEY DOCKET NO. CONFIRMATION NO.
11/682,544 03/06/2007 Shee-Yen Tan 3875.1260002 9290
26111 7590 11/01/2016
STERNE, KESSLER, GOLDSTEIN & FOX P.L.L.C.
1100 NEW YORK AVENUE, N.W.
WASHINGTON, DC 20005
EXAMINER
LAGOR, ALEXANDER
ART UNIT PAPER NUMBER
2491
MAIL DATE DELIVERY MODE
11/01/2016 PAPER
Please find below and/or attached an Office communication concerning this application or proceeding.
The time period for reply, if any, is set in the attached communication.
PTOL-90A (Rev. 04/07)

UNITED STATES PATENT AND TRADEMARK OFFICE
____________________

BEFORE THE PATENT TRIAL AND APPEAL BOARD
____________________

Ex parte SHEE-YEN TAN, XUEMIN CHEN,
IUE-SHUENN CHEN, and QIANG YE
____________________

Appeal 2015-008168
Application 11/682,544
Technology Center 2400
____________________

Before JOSEPH L. DIXON, JAMES R. HUGHES, and ERIC S. FRAHM,
Administrative Patent Judges.

HUGHES, Administrative Patent Judge.

DECISION ON APPEAL

Appeal 2015-008168
Application 11/682,544

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STATEMENT OF THE CASE
Appellants appeal under 35 U.S.C. § 134 from a rejection of claims 1,
2, 4–9, 11–16, and 18–24. We have jurisdiction under 35 U.S.C. § 6(b).
We reverse.

The invention relates to multi-level initialization and configuration of
security components in a processing environment (Spec. ¶¶ 8, 24). Claim 1,
reproduced below, is illustrative of the claimed subject matter:
1. A method for system initialization, the method
comprising:

enabling a security component in a security system based
on a value of an enable bit stored within a non-volatile memory
integrated within a security processor in said security system;
and

activating, by said security processor, said security
component in response to a configuration command
communicated to said security processor by a host processor in
said security system if said security component is enabled,

wherein said host processor is prevented from modifying
the enable bit stored within the non-volatile memory to enable
the security component.

REFERENCES
The prior art relied upon by the Examiner in rejecting the claims on
appeal is:
Leporini US 7,590,860 B2 Sept. 15, 2009
Koguchi
Porter
Candelore
US 2002/0138749 A1
US 2003/0226029 A1
US 2004/0088558 A1
Sept. 26, 2002
Dec. 4, 2003
May 6, 2004
Appeal 2015-008168
Application 11/682,544

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REJECTIONS
The Examiner made the following rejections:
Claims 1, 4, 7, 8, 11, 14, 15, 18, 21, 22, and 24 stand rejected under
35 U.S.C. § 103(a) as being unpatentable over Candelore and Koguchi.
Claims 2, 9, 16, and 23 stand rejected under 35 U.S.C. § 103(a) as
being unpatentable over Candelore, Koguchi, and Porter.
Claims 5, 6, 12, 13, 19, and 20 stand rejected under 35 U.S.C.
§ 103(a) as being unpatentable over Candelore, Koguchi, and Leporini.

ANALYSIS
Claim 1 recites the following limitation: “activating, by said security
processor, said security component in response to a configuration command
communicated to said security processor by a host processor in said security
system if said security component is enabled” (emphasis added).
In the Final Action, the Examiner finds Candelore’s processor 230
discloses the claimed host processor (Final Act. 7). In the Examiner’s
Answer, the Examiner relies on both Candelore’s processor 430 and
Koguchi’s video processor 4 for disclosing the claimed host processor (Ans.
3, 5). Appellants contend “the Examiner has failed to identify where the
combination of Candelore and Koguchi teaches or suggests that the
processor 430 communicates a configuration command like the one claimed,
which triggers the claimed ‘security processor’ to activate the claimed
‘security component’” (Reply Br. 4). We agree with Appellants.
The Examiner has not specifically identified where either Candelore
or Koguchi teaches a host processor that sends a configuration command to
a security processor to activate a security component. More specifically, the
Appeal 2015-008168
Application 11/682,544

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Examiner has not shown that Candelore’s processor 230 in Figure 2 or
processor 430 in Figure 4 sends a configuration command to a security
processor. Nor has the Examiner shown Koguchi’s video processor 4 sends
a configuration command to a security processor. Rather, Koguchi’s Figure
1 shows all the communication lines between the authentication/decryption
unit 2 and the video processor 4 operate in the direction toward the video
processor. This teaches against the video processor sending a command in
the reverse direction to the microcontroller 6, which the Examiner appears to
identify as the claimed security processor (see Ans. 4–5).
We are, therefore, constrained by the record to find the Examiner
erred in rejecting independent claim 1, independent claims 8, 15, and 22
which recite commensurate limitations, and dependent claims 4, 7, 11, 14,
18, 21, and 24 for similar reasons.
Further, the Examiner has not shown the additional references applied
to claims 2, 5, 6, 9, 12, 13, 16, 19, 20, and 23 cure the deficiency of
Candelore and Koguchi discussed above. Therefore, we also find the
Examiner erred in rejecting claims 2, 5, 6, 9, 12, 13, 16, 19, 20, and 23.

CONCLUSION
The Examiner erred in rejecting claims 1, 2, 4–9, 11–16, and 18–24
under 35 U.S.C. § 103(a).

DECISION
For the above reasons, the Examiner’s rejections of claims 1, 2, 4–9,
11–16, and 18–24 are reversed.

Appeal 2015-008168
Application 11/682,544

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REVERSED