11119466 (B.P.A.I. Mar. 21, 2012)

Ex Parte Takano

Board of Patent Appeals and InterferencesMar 21, 2012

11119466 (B.P.A.I. Mar. 21, 2012)

UNITED STATES PATENT AND TRADEMARKOFFICE UNITED STATES DEPARTMENT OF COMMERCE United States Patent and Trademark Office Address: COMMISSIONER FOR PATENTS P.O. Box 1450 Alexandria, Virginia 22313-1450 www.uspto.gov APPLICATION NO. FILING DATE FIRST NAMED INVENTOR ATTORNEY DOCKET NO. CONFIRMATION NO. 11/119,466 05/02/2005 Tamae Takano 0756-7527 1595 31780 7590 03/28/2012 Robinson Intellectual Property Law Office, P.C. 3975 Fair Ridge Drive Suite 20 North Fairfax, VA 22033 EXAMINER KIM, SUN M ART UNIT PAPER NUMBER 2813 MAIL DATE DELIVERY MODE 03/28/2012 PAPER Please find below and/or attached an Office communication concerning this application or proceeding. The time period for reply, if any, is set in the attached communication. PTOL-90A (Rev. 04/07) UNITED STATES PATENT AND TRADEMARK OFFICE ____________________ BEFORE THE BOARD OF PATENT APPEALS AND INTERFERENCES ____________________ Ex parte TAMAE TAKANO ____________________ Appeal 2010-008065 Application 11/119,466 Technology Center 2800 ____________________ Before DEBRA K. STEPHENS, KRISTEN L. DROESCH, and MICHAEL R. ZECHER, Administrative Patent Judges. STEPHENS, Administrative Patent Judge. ERRATA The Decision mailed on March 22, 2012, stated that, “[t]he Examiner’s rejection of claims 2-20 under 35 U.S.C. § 103(a) as being obvious over Hasegawa and Matsui is affirmed. AFFIRMED” (Decision 5). That is to be deleted and replaced with, -- The Examiner’s rejection of claims 2-20 under 35 U.S.C. § 103(a) as being obvious over Hasegawa and Matsui is reversed. REVERSED -- Appeal 2010-008065 Application 11/119,466 2 msc UNITED STAlES P A lENT AND TRADEMARK OFFICE APPLICATION NO. FILING DATE 111119,466 05/0212005 31780 7590 03/22/2012 Robinson Intellectual Property Law Office, P.e. 3975 Fair Ridge Drive Suite 20 North Fairfax, VA 22033 FIRST NAMED INVENTOR Tamae Takano UNITED STATES DEPARTMENT OF COMMERCE United States Patent and Trademark Office Address: COMMISSIONER FOR PATENTS P.o. Box 1450 Alexandria, Virginia 22313-1450 www.uspto.gov ATTORNEY DOCKET NO. CONFIRMATION NO. 0756-7527 1595 EXAMINER KIM,SUNM ART UNIT PAPER NUMBER 2813 MAIL DATE DELIVERY MODE 03/22/2012 PAPER Please find below and/or attached an Office communication concerning this application or proceeding. The time period for reply, if any, is set in the attached communication. PTOL-90A (Rev. 04/07) UNITED STATES PATENT AND TRADEMARK OFFICE BEFORE THE BOARD OF PATENT APPEALS AND INTERFERENCES Ex parte T AMAE T AKANO Appeal 2010-008065 Application 111119,466 Technology Center 2800 Before DEBRA K. STEPHENS, KRISTEN L. DROESCH, and l'vHCHAEL R. ZECHER, Administrative Patent Judges. STEPHENS, Administrative Patent Judge. DECISION ON APPEAL Appeal 2010-008065 Application 111119,466 Appellant appeals under 35 U.S.C. § 134(a) (2002) from a final rejection of claims 2-20. Claim 1 has been cancelled. We have jurisdiction under 35 U.S.C. § 6(b). An Oral Hearing was held on March 6, 2012. We REVERSE. Introduction According to Appellant, the invention relates to a manufacturing method for semiconductor devices. The method comprises the steps of adding a catalytic element to a semiconductor film and heating the semiconductor film to form a more crystalized first region and a less crystalized second region. Irradiating first laser light is applied to the first region to form a more crystalized third region and irradiating second laser light is applied to the second region to form a more crystalized fourth region. The third region is then patterned to form a first island-shaped region and the fourth region is patterned to form a second island-shaped region. (Abstract). STATEMENT OF THE CASE Exemplary Claim Claim 2 is an exemplary claim and is reproduced below: 2. A semiconductor device comprising: at least one N -channel thin film transistor and at least one P-channel thin film transistor formed over a glass substrate, each of said N-channel thin film transistor and said P-channel thin film transistor comprising a polycrystal semiconductor film, 2 Appeal 2010-008065 Application 111119,466 Hasegawa Matsui wherein the polycrystal semiconductor film of said N- channel thin film transistor has a higher orientation ratio of {100} than the polycrystal semiconductor film of said P- channel thin film transistor. Prior Art US 4,993,298 EP 0043691 A2 Rejections June 12, 1990 Jan. 13, 1982 Claims 2-20 stand rejected under 35 U.S.C. § 103(a) as being unpatentable over Hasegawa and Matsui. ISSUE 35 Us.c. § 103(a): claims 2-20 Appellant asserts the present invention is not obvious over Hasegawa and Matsui because one of ordinary skill in the art would not have been motivated to combine the teachings and the combination would not have been operable for its intended function (App. Br. 5-10; Reply Br. 2-3). Issue: Has the Examiner improperly combined the teachings of Matsui into the method of Hasegawa? ANALYSIS 3 Appeal 2010-008065 Application 111119,466 Specifically, Appellant argues Hasegawa teaches an N -channel MOSFET on a single crystal island having a {100} plane and a P-channel MOSFET on a single crystal island having a {110} plane over a silicon substrate (App. Br. 6). Appellant next contends Matsui teaches a semiconductor device can be produced on a substrate made of glass and that a polycrystalline semiconductor film of the < 1 00> preferred orientation is more preferable although both the <110> preferred orientation and mixed <100> and <110> orientation are useful (App. Br. 6-7). However, Appellant asserts Matsui does not teach or suggest that a silicon substrate should be replaced with a glass substrate or that Hasegawa teaches or suggests using a glass substrate (App. Br. 7). According to Appellant, Hasegawa would be rendered unsatisfactory for its intended purpose if modified with the glass substrate of Matsui (App. Br. 8; Reply Br. 5). We agree with Appellant that the Examiner has not shown how the teachings of Matsui would work with the teachings of Hasegawa. Each of the teachings forms the semiconductor device in a different manner using different substrates. The Examiner has not explained how the two different teachings would work together, and which steps of each would be used to create a semiconductor device as recited in claim 2. Accordingly, the Examiner erred in finding the combination of Hasegawa and Matsui would have taught or suggested the invention as recited in independent claim 2, and commensurately recited in independent claims 5,8, 10, 14, and 18, and claims 3, 4,6,7,9, 11-13, and 15-17, 19, and 20 which depend therefrom. Therefore, the Examiner erred in rejecting 4 Appeal 2010-008065 Application 111119,466 claims 2-20 under 35 U.S.C. § 103(a) for obviousness over Hasegawa and Matsui. DECISION The Examiner's rejection of claims 2-20 under 35 U.S.C. § 103(a) as being obvious over Hasegawa and Matsui is affirmed. AFFIRMED dw 5