Ex Parte Sun et alDownload PDFPatent Trial and Appeal BoardOct 27, 201713340679 (P.T.A.B. Oct. 27, 2017) Copy Citation United States Patent and Trademark Office UNITED STATES DEPARTMENT OF COMMERCE United States Patent and Trademark Office Address: COMMISSIONER FOR PATENTS P.O.Box 1450 Alexandria, Virginia 22313-1450 www.uspto.gov APPLICATION NO. FILING DATE FIRST NAMED INVENTOR ATTORNEY DOCKET NO. CONFIRMATION NO. 13/340,679 12/30/2011 Hong Xia SUN 09-BJ-004US01 (5220039) 4095 30432 7590 10/31/2017 SLATER MATSIL, LLP/ST- US c/o SLATER MATSIL, LLP 17950 Preston Rd. Suite 1000 Dallas, TX 75252 EXAMINER MEHTA, JYOTI ART UNIT PAPER NUMBER 2182 NOTIFICATION DATE DELIVERY MODE 10/31/2017 ELECTRONIC Please find below and/or attached an Office communication concerning this application or proceeding. The time period for reply, if any, is set in the attached communication. Notice of the Office communication was sent electronically on above-indicated "Notification Date" to the following e-mail address(es): docketing @ slatermatsil. com PTOL-90A (Rev. 04/07) UNITED STATES PATENT AND TRADEMARK OFFICE BEFORE THE PATENT TRIAL AND APPEAL BOARD Ex parte HONG XIA SUN, YONG QIANG WU, KAI FENG WANG, and PENG FEI ZHU Appeal 2017-003903 Application 13/340,679 Technology Center 2100 Before MAHSHID D. SAADAT, DENISE M. POTHIER, and JASON M. REPKO, Administrative Patent Judges. REPKO, Administrative Patent Judge. DECISION ON APPEAL Appeal 2017-003903 Application 13/340,679 STATEMENT OF THE CASE Appellants1 appeal under 35 U.S.C. § 134(a) from the Examiner’s rejection of claims 1—22 and 30—37. App. Br. 2.2 Claims 23—29 have been canceled. Id. We have jurisdiction under 35 U.S.C. § 6(b). We affirm and designate the affirmance of the decision to reject claim 16 as a new ground of rejection under 37 C.F.R. § 41.50(b). THE INVENTION Appellants’ invention relates to a pipeline flush for a processor that may execute instructions out of order. Spec. 14. For example, a superscalar processor may include an instruction pipeline that simultaneously executes instructions out of order. Id. 116. Although this out-of-order execution improves performance, an instruction to load from a memory location may execute before an instruction to store to that memory location. Id. 14. In response to this “mis-speculative load instruction,” the system may flush the entire pipeline. Id. But flushing the entire pipeline requires additional processing time and energy. See id. So, Appellants’ invention flushes only part of the pipeline. Id. This partial flush requires less processing time and energy than flushing the entire pipeline. See id. Claim 1 is reproduced below with our emphasis: 1. An instruction pipeline, comprising: 1 Appellants identify the real party in interest as STMicroelectronics R&D (Beijing) Co. LTD. App. Br. 1. 2 Throughout this opinion, we refer to (1) the Final Rejection (“Final Act.”) mailed August 25, 2015, (2) Advisory Action (“Adv. Act.”) mailed December 3, 2015, (3) the Appeal Brief (“App. Br.”) filed March 21, 2016, and (4) the Examiner’s Answer (“Ans.”) mailed August 24, 2016. 2 Appeal 2017-003903 Application 13/340,679 a first processing section operable to provide first and second ordered instructions; and a second processing section operable: in response to the second instruction, to read first data from a data-storage location, in response to the first instruction, to write second data to the data-storage location after reading the first data, and in response to the writing the second data after reading the first data, to cause the flushing of some, but not all, of the pipeline. THE REJECTIONS The Examiner relies on the following as evidence: Klein US 2004/0073774 A1 Apr. 15,2004 Elmer et al. US 2009/0259708 A1 Oct. 15, 2009 Alexander et al. US 2011/0185158 Al July 28, 2011 John L. Hennessy & David A. Patterson, Computer Architecture: A Quantitative Approach 231-235, 278-282 (3d ed. 2003) (“Hennessy”). Claims 1—6, 8, 12—15, 22, and 30—36 stand rejected under 35 U.S.C. § 103(a) as unpatentable over Hennessy and Elmer.3 Final Act. 4—12. Claims 7, 9—11, and 37 stand rejected under 35 U.S.C. § 103(a) as unpatentable over Hennessy, Elmer, and Alexander. Final Act. 12—17. 3 The Examiner omits claim 12 from the heading of the rejection but includes it in the substantive portion of the rejection. See Final Act. 4, 7—8. We, therefore, treat claim 12 as rejected over Hennessey and Elmer. Furthermore, although Examiner includes claims 23—29 in the heading, Appellants subsequently canceled these claims in later-filed amendment entered by the Examiner. See id. at 4; Amendment After-Final, filed December 3, 2015. 3 Appeal 2017-003903 Application 13/340,679 Claims 17—21 stand rejected under 35 U.S.C. § 103(a) as unpatentable over Hennessy, Elmer, and Klein. Final Act. 17—20. THE OBVIOUSNESS REJECTION OVER HENNESSY AND ELMER The Examiner’s Rejection The Examiner finds that Hennessy teaches every limitation recited in claim 1 except for flushing some, but not all, of the pipeline. Final Act. 4—5. In concluding that the subject matter would have been obvious, the Examiner cites Elmer as teaching this feature. Id. at 5. Appellants ’ Contentions Appellants argue that the Examiner has not shown that it would have been obvious to flush some, but not all, of the pipeline. Br. 14. According to Appellants, Elmer optimizes the performance of a microprocessor’s X87 floating-point addition instructions. Id. Appellants contend that Elmer flushes all unretired instructions to avoid an issue with an incorrect source operand value. Id. at 14—15. Appellants, however, argue that Elmer’s flushing is not in response to the condition recited in the claim—i.e., writing the second data after reading the first. Id. at 15—16. According to Appellants, Elmer’s flushing is in response to a reply-request signal, which signals that a floating-point addition instruction needs to be replayed. Id. at 16. Dependent claims 2—6, 8, 12—14, and 30-36 and independent claims 15 and 22 are not argued separately. See id. at 18. We select claim 1 as representative. 4 Appeal 2017-003903 Application 13/340,679 Issues Appellants’ arguments for representative claim 1 (see id. at 13—18) present us with the following issues: I. Under § 103, has the Examiner erred in rejecting independent claim 1 by finding that Hennessy and Elmer would have collectively taught or suggested the recited processing section that, in response to the writing the second data after reading the first data, causes the flushing of some, but not all, of the pipeline? II. Has the Examiner supported the obviousness conclusion with articulated reasoning with some rational underpinning? Analysis I The first issue turns on the interpretation of “flushing of some, but not all, of the pipeline.” “[Cjlaims in an application are to be given their broadest reasonable interpretation consistent with the specification, [ ] and that claim language should be read in light of the specification as it would be interpreted by one of ordinary skill in the art.” In re Sneed, 710 F.2d 1544, 1548 (Fed. Cir. 1983). Here, the Specification discloses that “[t]he processor may perform such a partial pipeline flush by reloading the instruction-issue queue from the reorder buffer such that a fetch-decode section of the pipeline need not be and, therefore, is not, flushed.” Spec. 1:28—30. We emphasize the term “may” here because it indicates that Appellants do not intend to limit the recited flushing to this particular embodiment. Furthermore, the Specification emphasizes that the described embodiments are only illustrative. Id. at 17:7—11. And processor 8 can perform the flush “in any suitable manner.” Id. at 15:9—10. Accordingly, a 5 Appeal 2017-003903 Application 13/340,679 broad, but reasonable, interpretation of the claimed pipeline flush does not require flushing of specific sections, only that “some, but not all,” of the pipeline is flushed. Notably, claim 1 uses the term “comprising” in defining those sections that are in the pipeline. “Comprising” is a term of art that means additional, unrecited elements are not excluded from the claim. So, the recited pipeline is not limited to only the first and second sections. Rather, claim l’s pipeline encompasses additional, unrecited sections. Therefore, consistent with the examples from the Specification (see, e.g., id. at 1:28— 30), the limitation at issue encompasses flushing the recited sections and not flushing some unrecited sections. The Examiner finds that some, but not all, of Elmer’s microprocessor 100 pipeline is flushed. Ans. 3. We agree. Elmer flushes execution unit 124’s pipelines of all unretired instructions. Elmer | 62. But execution unit 124 is only one section of Elmer’s microprocessor pipeline. See id., Fig. 1. Specifically, Elmer’s microprocessor pipeline includes a series of connected sections: translator 108, register allocation table (RAT) 116, instruction dispatcher 120, execution units 124, and retire unit 126. Id., Fig. 1; see also id. 27—29. The Examiner finds that other sections, e.g., the retire unit, is not flushed. Adv. Act. 2. Even if some of the sections in Elmer’s microprocessor pipeline do not correspond to the recited first and second sections, the claim’s open language does not limit the pipeline to only the recited sections, as discussed above. Because Elmer’s execution unit 124 pipeline accounts for some, but not all, of microprocessor 100’s pipeline, we are unpersuaded that the 6 Appeal 2017-003903 Application 13/340,679 Examiner erred in finding that Elmer teaches flushing some, but not all, of the pipeline. See id. II We are also unpersuaded that the Examiner’s obviousness conclusion is undermined by Elmer’s teachings of optimizing the performance of a microprocessor’s X87 floating-point addition instructions (Br. 14) or a reply-request signal {id. at 15—16). The Examiner does not propose bodily incorporation of all Elmer’s teachings. See Ans. 3^4; see also Final Act. 5. Nor does the standard for obviousness require doing so. Here, the Examiner finds that both Elmer and Hennessy teach different approaches to read-after-write (RAW) hazards. Ans. 4. Although Elmer’s flush is in response to a replay-request signal (Br. 15—16), the Examiner finds that Hennessy teaches that the RAW hazard stalls the pipeline, instead of flushing it. Final Act. 5. The Examiner then proposes to substitute Elmer’s approach for resolving a RAW hazard—i.e., a flush of some of the pipeline. Id.', see also Ans. 4 (explaining Elmer’s hazard). In concluding that the claimed subject matter would have been obvious, the Examiner finds that one of ordinary skill in the art would have looked to Elmer’s approach to obtain certain performance characteristics in Hennessy’s pipeline. See Final Act. 5. In this way, the Examiner’s proposed enhancement uses prior art elements predictably according to their established functions—an obvious improvement. See KSR Int 7 Co. v. Teleflex, Inc., 550 U.S. 398, 417 (2007). On this record, the Examiner has supported the obviousness conclusion with articulated reasoning with some rational underpinning. 7 Appeal 2017-003903 Application 13/340,679 Accordingly, we sustain the Examiner’s rejection of claim 1 and dependent claims 2—6, 8, 12—14, and 30-36 and independent claims 15 and 22, which are not argued separately. See Br. 18. THE REMAINING OBVIOUSNESS REJECTIONS CLAIMS 7, 9-11, 18-21, and 37 Although the Examiner rejects claim 17 over the additional reference of Klein, Appellants argue independent claim 17 together with claim 1. See Br. 18. Accordingly, we sustain the Examiner’s rejection for the same reasons discussed above. Claims 7, 9—11, 18—21, and 37 depend from independent claims 1,17, and 22. In arguing the patentability of the dependent claims, Appellants refer to the arguments presented for the independent claims. See id. at 18— 19. Therefore, for the reasons discussed in connection with claims 1,17, and 22, we also sustain the rejections of claims 7, 9—11, 18—21, and 37. CLAIM 16 Claim 16 recites, in part, “memory coupled to the pipeline and operable to store the first and second instructions.” Appellants and the Examiner treat claim 16 as rejected. See Br. 2; Adv. Act 1. But apart from the claim status found in the Office Action Summary and Advisory Action, the Final Action does not contain a substantive rejection for claim 16. See Final Act. Office Action Summary (“Claim(s) 1-37 is/are rejected.”); Adv. Act. 1 (providing the status of the claims in item 15). 8 Appeal 2017-003903 Application 13/340,679 The Examiner, however, rejects claim 20, which recites limitations similar to those found in claim 16: “The system of claim 17 wherein the integrated circuit comprises a memory.” Final Act. 20. Because the Examiner has not articulated, expressly, that these findings apply to claim 16 (see id. at 4—20), we affirm the Examiner’s decision to reject claim 16 but designate the affirmance a new ground of rejection. For clarity, we summarize the Examiner’s findings regarding claim 20 and explain how they apply to claim 16. In particular, the Examiner finds that Klein teaches a memory coupled to a processor. See id. 19—20 (citing Klein 131). For example, Klein teaches that memory control interface 40 stores instructions in instruction register 58. See Klein Fig. 4, discussed in Klein 131. Register 58 can be a multi-instruction buffer. Id. 130. The Examiner concludes that it would have been obvious to use Klein’s processor-coupled memory for Hennessy’s processor with a pipeline to facilitate memory access. Final Act. 19. This proposed enhancement uses Klein’s memory predictably according to its established function (e.g., storing instructions), which is an obvious improvement to Hennessy’s system. SeeKSR Inti Co., 550 U.S. at 417. Therefore, claim 16 is unpatentable over Hennessy, Elmer, and Klein under 35 U.S.C. § 103. DECISION We affirm the Examiner’s rejection of claims 1—22 and 30—37. We designate our affirmance of the decision to reject claim 16 as a new ground of rejection under 35 U.S.C. § 103. 9 Appeal 2017-003903 Application 13/340,679 No time period for taking any subsequent action in connection with this appeal may be extended under 37 C.F.R. § 1.136(a)(l)(iv). This decision contains a new ground of rejection under 37 C.F.R. § 41.50(b), which provides “[a] new ground of rejection pursuant to this paragraph shall not be considered final for judicial review.” This section also provides: When the Board enters such a non-final decision, the appellant, within two months from the date of the decision, must exercise one of the following two options with respect to the new ground of rejection to avoid termination of the appeal as to the rejected claims: (1) Reopen prosecution. Submit an appropriate amendment of the claims so rejected or new Evidence relating to the claims so rejected, or both, and have the matter reconsidered by the examiner, in which event the prosecution will be remanded to the examiner. The new ground of rejection is binding upon the examiner unless an amendment or new Evidence not previously of Record is made which, in the opinion of the examiner, overcomes the new ground of rejection designated in the decision. Should the examiner reject the claims, appellant may again appeal to the Board pursuant to this subpart. (2) Request rehearing. Request that the proceeding be reheard under § 41.52 by the Board upon the same Record. The request for rehearing must address any new ground of rejection and state with particularity the points believed to have been misapprehended or overlooked in entering the new ground of rejection and also state all other grounds upon which rehearing is sought. Further guidance on responding to a new ground of rejection can be found in the MPEP § 1214.01 (9th ed. Rev. 07.2015, Nov. 2015). AFFIRMED 37 C.F.R, $ 41.50(b) 10 Copy with citationCopy as parenthetical citation