Ex Parte Stribley et alDownload PDFPatent Trial and Appeal BoardSep 26, 201712306935 (P.T.A.B. Sep. 26, 2017) Copy Citation United States Patent and Trademark Office UNITED STATES DEPARTMENT OF COMMERCE United States Patent and Trademark Office Address: COMMISSIONER FOR PATENTS P.O.Box 1450 Alexandria, Virginia 22313-1450 www.uspto.gov APPLICATION NO. FILING DATE FIRST NAMED INVENTOR ATTORNEY DOCKET NO. CONFIRMATION NO. 12/306,935 02/09/2009 Paul Ronald Stribley 534334-00083US 8169 27805 7590 09/28/2017 THOMPSON HTNF T T P EXAMINER 10050 Innovation Drive LIN, JOHN Suite 400 DAYTON, OH 45342-4934 ART UNIT PAPER NUMBER 2815 NOTIFICATION DATE DELIVERY MODE 09/28/2017 ELECTRONIC Please find below and/or attached an Office communication concerning this application or proceeding. The time period for reply, if any, is set in the attached communication. Notice of the Office communication was sent electronically on above-indicated "Notification Date" to the following e-mail address(es): ipdocket @ thompsonhine. com PTOL-90A (Rev. 04/07) UNITED STATES PATENT AND TRADEMARK OFFICE BEFORE THE PATENT TRIAL AND APPEAL BOARD Ex parte PAUL RONALD STRIBLEY and JOHN NIGEL ELLIS Appeal 2015-001856 Application 12/306,935 Technology Center 2800 Before ST. JOHN COURTENAY III, KEN B. BARRETT, and NORMAN H. BEAMER, Administrative Patent Judges. BARRETT, Administrative Patent Judge. DECISION ON APPEAL STATEMENT OF CASE Appellants Paul Ronald Stribley and John Nigel Ellis appeal under 35 U.S.C. § 134 from the Examiner’s decision rejecting claims 1 and 4—151 mailed August 22, 2013. We have jurisdiction under 35 U.S.C. § 6(b). We AFFIRM-IN-PART. THE INVENTION The claimed invention relates generally to a CMOS circuit suitable for low noise RF applications. Spec. 1. Figure 1 is reproduced below. 1 Claims 2 and 3 were previously canceled. App. Br. 19. Appeal 2015-001856 Application 12/306,935 ‘Noisy" digital ‘Quiet' analogue/RF CMOS Semiconductor P- substrate 12 Figure 1 illustrates two CMOS devices: a first noisy digital CMOS device 2 and a second RF CMOS device 14. Spec. 3:17—22. Regarding the RF CMOS device 14, the Specification explains: “[t]he PMOS 16 and NMOS 18 devices are provided with a shallow n-well 22 and a shallow p-well 24 respectively, and these shallow wells are contained within a deep n-well 26 formed in the substrate 12.” Id. at 3:22—24. The Specification further explains: “[t]he deep n-well 26 may be surrounded by a deep p-well 28, which may form a ring around the deep n-well 26 in order to electrically isolate the deep n-well 26.” Id. at 3:24—26. Independent claim 1 and dependent claims 12 and 13 are illustrative of the claimed subject matter on appeal: 1. CMOS circuit structure comprising a plurality of CMOS MOSFETs on a single substrate, wherein the substrate is divided into regions of n-type and p-type diffusions, and those diffusions are contained within a deeper n-type diffusion, used to junction isolate components within the deeper n-type diffusion 2 Appeal 2015-001856 Application 12/306,935 from components outside of the deeper n-type diffusion, wherein the plurality of CMOS MOSFETs comprise at least one PMOS buried channel MOSFET contained within said deeper n-type diffusion and at least one PMOS surface channel MOSFET contained within said deeper n-type diffusion. 12. A CMOS circuit structure as claimed in claim 1, wherein the CMOS circuit structure further comprises a p-type diffusion surrounding the deeper n-type diffusion, and the p-type diffusion comprises a deep p-well. 13. A CMOS circuit structure as claimed in claim 1, wherein the CMOS circuit structure further comprises a p-type diffusion surrounding the deeper n-type diffusion, and the p-type diffusion surrounding the deeper n-type diffusion is arranged to isolate the deeper n-type diffusion. App. Br. 19 and 20 (Claims Appendix). THE REJECTIONS The following Examiner’s rejections are before us for review: 1. Claims 1 and 4—6, 8, 9, 11—15 are rejected under 35 U.S.C. § 103(a) as being unpatentable over Imai (US 6,337,248 Bl, iss. Jan. 8, 2002, hereafter “Imai”) in view of Wong et al. (US 6,917,095 Bl, iss. July 12, 2005, hereafter “Wong”); 2. Claim 7 is rejected under 35 U.S.C. § 103(a) as being unpatentable over Imai, Wong, and Tohyama (US 5,907,767, iss. May 25, 1999, hereafter “Tohyama”); and 3. Claim 10 is rejected under 35 U.S.C. § 103(a) as being unpatentable over Imai, Wong, and Cha et al. (US 6,303,418 Bl, iss. Oct. 16, 2001, hereafter “Cha”). 3 Appeal 2015-001856 Application 12/306,935 ANALYSIS Appellants contend that the combination of Imai and Wong fails to teach the claimed “deeper n-well” such that the combination of references does not teach “the n-type and p-type diffusions are contained within a deeper n-type diffusion” and “at least one PMOS buried channel MOSFET contained within said deeper n-type diffusion and at least one PMOS surface channel MOSFET contained within said deeper n-type diffusion,” as recited in independent claim 1. App. Br. 8—10. Specifically, Appellants assert that Wong’s n-well 420 cannot be relied upon as teaching the claimed deeper n-type diffusion because it is a continuous n-well that contains a PMOS therein, but also forms part of a NMOS 418 and thus would not have an n-type diffusion contained therein as claimed. Id. The Examiner finds that Imai discloses much of the claimed invention but fails to disclose the disputed limitations quoted above. Final Act. 2, 3. The Examiner finds that Wong teaches a deeper n-type diffusion, considered to be Wong’s n-well 420, that surrounds PMOS 416 and NMOS 418. Id. at 3 (citing Wong, Fig. 23). The Examiner’s proposed modification involves the addition of Wong’s n-well 420 to surround the n-well 5 and p-well 4 of Imai’s CMOS. Id. The Examiner finds that one of ordinary skill in the art would have made the combination of Imai and Wong “[t]o reduce coupling between elements.” Id. at 3. The Examiner finds that the addition of Wong’s n-well 420 to Imai’s CMOS would result in a device as depicted in Imai’s Figure 2F as annotated by the Examiner. Ans. 4. Figure 2F, as annotated by the Examiner, is reproduced below. 4 Appeal 2015-001856 Application 12/306,935 F I F twm ■M Annotated Figure 2F illustrates a cross sectional view of a substrate 1 having thereon a buried channel pMOS 2D and surface channel pMOS 2E. Imai, 4:14—25. The Examiner has annotated Figure 2F to illustrate the addition of Wong’s n-well 420, represented by the dashed line labeled as “deeper n-well.” Ans. 4. The Examiner finds that the addition of the deeper n-well as shown in annotated Figure 2F would teach the disputed limitation noted above by providing a deeper n-type diffusion absent from Imai. Final Act. 2, 3. Appellants argue that the Examiner’s finding is flawed because “the teachings of Wong is that the n-well 420 is part of the NMOS 418; thus it does not “surround” a NMOS.” App. Br. 8. In other words, Appellants argue that the Examiner’s proffered combination would not result in the claimed CMOS because Imai’s n-wells would not be “contained within” the added deeper n-well 420. Id. at 9. Appellants illustrate their argument through Imai’s Figure 2F as annotated by Appellants, reproduced below. 5 Appeal 2015-001856 Application 12/306,935 F f 6, 2F nMOS n-wells ! 8 now one continuous novel: as p&tt ot t well 5 No seed for p-’well (4); substrate is p-%pe Figure 2F as annotated by Appellants illustrates the addition of Wong’s n-well 420 in light of Appellants argument, represented by the dashed line noted as “deeper n-well.” App. Br. 9. As drawn by Appellants, the deeper n-well rises to include Imai’s n-wells labeled as element 18 such that n-wells 18 become part of a single continuous n-well. Id. Further, Appellants argue that the Examiner, in the Final Office Action, impermissibly relies on a single teaching of Wong, the n-well 420, rather than its teachings as a whole. App. Br. 10-12. Appellants assert that, if the Wong reference is considered as a whole, taking into account its disclosed doping levels, the effect of its resistors, and potentials connected to and applied to the various wells, “the proposed modification of Imai based on the teachings of Wong as a whole would be detrimental to the CMOS of Imai.” Id. We are not persuaded by Appellants’ argument because the test for obviousness is not bodily incorporation. In re Keller, 642 F.2d 413, 425 (CCPA 1981) (“The test for obviousness is not whether the features of a secondary reference may be bodily incorporated into the structure of the primary reference .... Rather, the test is what the combined teachings of those references would have suggested to those of ordinary skill in the art.”). 6 Appeal 2015-001856 Application 12/306,935 Here, the Examiner’s obviousness rejection is based on the collective teachings of Imai and Wong and specifically proposes that modification of Imai to include only Wong’s n-well 420 and not additional elements such as NMOS 418 as argued by Appellants. Ans. 3, 4. That is, one with ordinary skill in the art would have recognized that Imai’s CMOS circuit including such elements as n-type diffusions, p-type diffusions, a PMOS buried channel MOSFET, and a PMOS surface channel MOSFET could be modified to be contained within a deep n-well as taught by Wong and that it would have been obvious to make the modification because it would offer the advantage of reducing coupling between elements. Final Act. 3, 4 (citing Wong 3:27-35). Further, although the particular doping levels and resistor and potential effects detailed in Wong may be detrimental as alleged by Appellants and noted in the declaration of Dr. Nevin (App. Br. 10-12; Reply Br. 4; Nevin Decl. 5—7), the Examiner’s proposed combination does not bodily incorporate a deep n-well with the particular doping levels disclosed in Wong. Instead, we recognize that “if a technique has been used to improve one device, and a person of ordinary skill in the art would recognize that it would improve similar devices in the same way, using the technique is obvious unless its actual application is beyond his or her skill.” KSR Int 7 Co. v. Teleflex Inc., 550 U.S. 398, 417 (2007). Applying this reasoning here, we find Wong’s teaching would have at least suggested to one of ordinary skill in the art to incorporate a deep n-well into Imai to provide similar benefits, including reduced coupling. Ans. 5, 6. We are not persuaded that one of ordinary skill in the art would not have 7 Appeal 2015-001856 Application 12/306,935 understood how to implement a deep n-well as presented in Wong into the CMOS of Imai with an appropriate doping level. Appellants further argue that the Final Office Action impermissibly relies on hindsight in combining the Imai and Wong references. App. Br. 12—13. Specifically, Appellants argue that Imai and Wong have different goals because Imai does not consider any radio frequency CMOS applications in contrast to Wong that specifically aims to reduce coupling noise or other unwanted signals in RF circuits. Id. at 12. Appellants further contend: Imai does not suffer from the noise of an RF circuit because it simply is not one, so why would one of skill in the art wish to introduce a feature meant to reduce noise in an RF circuit, especially when Imai already introduced a buried channel to address the noise problem? Id. Further, Appellants assert that Wong clearly understood their n-well 420 not to be a “deep n-well” because as Appellants state: “Wong compares the ‘n-well’ used in the triple well against a ‘single deep n-well’ and describes how the two are different in impedance and capacitance.” Id. at 13. We are not persuaded by Appellants’ arguments because Appellants have not sufficiently identified any knowledge relied upon by the Examiner that was gleaned only from Appellants’ disclosure and that was not otherwise within the level of ordinary skill in the art at the time of invention. See In re McLaughlin, 443 F.2d 1392, 1395 (CCPA 1971). Instead, Appellants assert that the Imai and Wong references have different goals such that a personal of ordinary skill in the art would not plausibly consider combining the references. App. Br. 12. 8 Appeal 2015-001856 Application 12/306,935 We do not agree with Appellants’ assertion because both Imai and Wong are directed to CMOS circuits that share a similar goal, the reduction of noise, including noise reduction in digital circuits (Imai) and reduced coupling noise in radio frequency circuit elements (Wong). Ans. 7, 8; see App. Br. 12. Further, as noted above, the Examiner has articulated reasoning for combining the Imai and Wong references, with that reasoning based on the references themselves. Namely, that the modification of Imai with Wong would offer the advantage of reducing coupling between elements. Final Act. 3, 4 (citing Wong 3:27—35). Therefore, in light of the above, we find the Examiner provided sufficient articulated reasoning with rational underpinning to establish why an artisan would have been motivated to combine the references. Final Act. 2-3. Further, Appellants argue that one of ordinary skill in the art would not modify the CMOS in Imai with the teachings of Wong because this would lead to an undesirable product. App. Br. 13. Specifically, Appellants argue that the modification of Imai with Wong would result in “a com mon n-well, which in Imai combines the source and drain together . . . [and] [t]his would be undesirable because the source and drain need to remain isolated from one another within the substrate (connected only by the gate) for proper functioning of the circuit.” Id. We are not persuaded by Appellants’ argument because, as discussed above, Appellants’ argument is erroneously premised on the bodily incorporation of Wong into Imai. The Examiner’s obviousness rejection is based on the collective teachings and suggestions of Imai and Wong, and the Examiner specifically proposes a modification of Imai that includes only 9 Appeal 2015-001856 Application 12/306,935 Wong’s n-well 420, and not additional elements such as NMOS 418, as urged by Appellants. Finally, Appellants argue, “one of skill in the art would not look to the teachings of Wong in solving the problem Appellants were concerned with.” App. Br. 14. Specifically, Appellants argue that “[t]he structure of Wong ... is not desirable to solve the problem of flicker noise present from a surface channel PMOS, which was Appellants’ concern.” Id. However, we are not persuaded by Appellants’ argument because “neither the particular motivation nor the avowed purpose of the [Appellants] controls” when performing an obviousness analysis. KSR, 550 U.S.at419. For these reasons, we sustain the rejection of independent claim 1. We similarly sustain the rejections of claims 4—11, 14, and 15, which depend therefrom and are not separately argued. Appellants further argue that the combination of Imai and Wong fails to teach “a p-type diffusion surrounding the deeper n-type diffusion, and the p-type diffusion comprises a deep p-well,” as recited in claim 12 and similarly recited in claim 13. See App. Br. 14—17. The Examiner finds that Imai teaches the claimed p-type diffusion surrounding the deeper n-type diffusion because portions of Imai’s “p-type substrate 1 would inherently surround n-well 5 and p-well 4.” Ans. 11; see Final Act. 5. In other words, the Examiner equates the claimed deep p-well with Imai’s p-type substrate and asserts that portions of that substrate would surround the deeper n-well of Wong. Ans. 11 We agree with Appellants’ argument that “[t]here is no portion of the substrate 1, as illustrated, that surrounds either n- or p-well. . . [and] [t]hus, 10 Appeal 2015-001856 Application 12/306,935 the substrate 1 of Imai cannot be the claimed deep p-well.” App. Br. 16. Specifically, Appellants’ assert that Imai’s substrate 1 is “fully below n-well 5 and p-well 4,” and thus would not “surround” any deeper n-well. Id. The Examiner’s annotated Figure 2F, illustrated above, supports Appellants’ position because the substrate 1 is fully below the deeper n-well added by the Examiner and illustrated via the dotted line. Ans. 4; App. Br. 15, 16. For these reasons, we do not sustain the rejection of claims 12 and 13. DECISION The decision of the Examiner to reject claims 1, 4—11, 14, and 15 is affirmed. The decision of the Examiner to reject claims 12 and 13 is reversed. No time period for taking any subsequent action in connection with this appeal may be extended under 37 C.F.R. § 1.136(a). See 37 C.F.R. § 1.136(a)(l)(iv). AFFIRMED-IN-PART 11 Copy with citationCopy as parenthetical citation