Ex Parte SEPPANENDownload PDFPatent Trial and Appeal BoardOct 23, 201814789421 (P.T.A.B. Oct. 23, 2018) Copy Citation UNITED STA TES p A TENT AND TRADEMARK OFFICE APPLICATION NO. FILING DATE 14/789,421 07/01/2015 130608 7590 10/25/2018 Pure Storage, Inc. c/o Kennedy Lenart Spraggins LLP 301 Congress Avenue Suite 1350 Austin, TX 78701 FIRST NAMED INVENTOR ERIC D. SEPPANEN UNITED STATES DEPARTMENT OF COMMERCE United States Patent and Trademark Office Address: COMMISSIONER FOR PATENTS P.O. Box 1450 Alexandria, Virginia 22313-1450 www .uspto.gov ATTORNEY DOCKET NO. CONFIRMATION NO. 2989US01 1047 EXAMINER WESTBROOK, MICHAEL L ART UNIT PAPER NUMBER 2139 NOTIFICATION DATE DELIVERY MODE 10/25/2018 ELECTRONIC Please find below and/or attached an Office communication concerning this application or proceeding. The time period for reply, if any, is set in the attached communication. Notice of the Office communication was sent electronically on above-indicated "Notification Date" to the following e-mail address(es): office@klspatents.com kate@klspatents.com hanna@klspatents.com PTOL-90A (Rev. 04/07) UNITED STATES PATENT AND TRADEMARK OFFICE BEFORE THE PATENT TRIAL AND APPEAL BOARD Exparte ERIC D. SEPPANEN Appeal2018-004174 1 Application 14/789,421 2 Technology Center 2100 Before JEAN R. HOMERE, JAMES B. ARPIN, and DAVID J. CUTITTA II, Administrative Patent Judges. ARPIN, Administrative Patent Judge. DECISION ON APPEAL This is an appeal under 35 U.S.C. § 134(a) of a rejection of claims 1- 18. Final Act. 2. We have jurisdiction under 35 U.S.C. § 6(b). We reverse. 1 In this Decision, we refer to Appellant's Appeal Brief ("Br.," filed October 26, 2017) and Reply ("Reply", March 9, 2018); the Final Office Action ("Final Act.," mailed July 13, 2017); the Examiner's Answer ("Ans.," mailed February 8, 2018); and the originally-filed Specification ("Spec.," filed July 1, 2015). 2 According to Appellant, the real party-in-interest is Pure Storage, Inc. Br. 2. Appeal2018-004174 Application 14/789,421 STATEMENT OF THE CASE Appellant's claimed subject matter relates to methods, controllers, and computer program products for "offloading device management responsibilities from a storage device in an array of storage devices [which] can include: retrieving, from the storage device, control information describing the state of one or more memory blocks in the storage device and performing, in dependence upon the control information, a storage device management operation." Spec. 1:28-2:3. Claims 1-18 are pending. Claims 1, directed to methods of offloading device management responsibilities from a storage device, 7, directed to storage array controllers for performing such methods, and 13, directed to computer program products including computer program instructions for performing such methods, are independent. Br. Claims App 'x. Claims 2-6 depend directly from claim 1, claims 8-12 depend directly from claim 7, and claims 14--18 depend directly from claim 13. Id. Claim 1, reproduced below, is representative. 1. A method of offloading device management responsibilities from a storage device in an array of storage devices, the method compnsmg: retrieving, by a Redundant Array of Independent Drives (RAID) controller coupled to the array of storage devices, from the storage device, control information describing the state of one or more memory blocks in the storage device, including: querying, by the RAID controller, the storage device for a location of a memory block tagged with a special identifier indicating that the memory block contains control information having memory access channel information identifying a plurality of memory access channels and a range of memory addresses associated with each memory 2 Appeal2018-004174 Application 14/789,421 access channel, wherein querying the storage device includes executing, by the RAID controller, an instruction that causes the storage device to scan a portion of each memory block to identify those memory blocks that include the control information for the storage device; receiving, based on the special identifier, from the storage device, the location of the memory block containing the memory access channel information; and selecting the memory access channel information stored at the location in the storage device; and performing, in dependence upon the control information, a storage device management operation. Id.; see Br. 4---6 (describing each of claims 1, 7, and 13 with respect to the methods of claim 1 ); Reply 4--6. REFERENCES The Examiner relies upon the following prior art in rejecting the pending claims: Chow et al. ("Chow") Gong Iida et al. ("Iida") Jeddeloh et al. ("Jeddeloh") Dancho et al. ("Dancho") US 2003/0225961 Al Dec. 4, 2003 US 2015/0006816 Al Jan. 1, 2015 US 6,591,328 Bl July 8, 2003 US 2010/0250826 Al Sep. 30, 2010 US 2015/0113203 Al Apr. 23, 2015 THE REJECTIONS Claims 1--4, 6-10, 12-16, and 18 stand rejected under 35 U.S.C. § 103 as rendered obvious over the combined teachings of Chow, Gong, Iida, and Jeddeloh. Final Act. 3--4. Claims 5, 11, and 17 stand rejected under 35 3 Appeal2018-004174 Application 14/789,421 U.S.C. § 103 as rendered obvious over the combined teachings of Chow, Gong, Iida, Jeddeloh, and Dancho. Id. at 15. ANALYSIS The Examiner finds that Chow and Gong teach or suggest the "retrieving" and "performing" steps of claims 1, 7, and 13. Final Act. 5---6. However, the Examiner finds that neither of these references, alone or in combination, teaches or suggests the "querying," "selecting," or receiving" steps included within the "retrieving" step. Id. at 7 ("Chow and Gong do not explicitly disclose what Iida teaches"). The Examiner finds instead that Iida in combination with Jeddeloh teaches these steps. Id. at 7-10; Ans. 4---6. The Examiner concludes obviousness, finding that a person of ordinary skill in the relevant art would have had reason to combine the teachings of Chow, Gong, Iida, and Jeddeloh to achieve the recited methods, controllers, and computer program products of claims 1--4, 6-10, 12-16, and 18. Final Act. 7, 9, 10. Claim 1 recites the step of "querying the storage device include[ing] executing, by the RAID controller, an instruction that causes the storage device to scan a portion of each memory block to identify those memory blocks that include the control information for the storage device." Br. Claim Appx. Thus, in the "querying" step, the RAID controller causes the storage device to scan a portion of each memory block. The Examiner explains that: Prior art teaches searching the storage device for a block with a special identifier indicating the block contains control data representing relations between logical and physical addresses. See [Iida, 10:64--11:11], in which the [File Allocation Table (FAT)] file system performs the search operation. The FAT file 4 Appeal2018-004174 Application 14/789,421 system of Iida teaches the claimed function of the RAID controller. Final Act. 9; see Ans. 5-6 (citing Iida, 12:59---63; 15:10-21). As the Examiner acknowledges, however, the FAT file system is a function of the RAID controller, not of the storage device, e.g., Iida's non-volatile memory. Appellant contends that, contrary to the recited "querying" step, Iida teaches that the controller, and not the storage device, scans portions of the memory block. Reply 13-14; see Br. 12. In particular, based on the Examiner's citations to Iida, Appellant understands that: in Iida, the controller is described as searching the memory (see for example, Iida [13:55---62]) and this searching places a burden on the controller (see for example, Iida [14:64--67], which describes reducing the burden on the controller by reducing the controller's searching). This is in direct contrast to the "querying" recited in the claims of the present application, in which the storage device scans a portion of each memory block to identify those memory blocks that include the control information for the storage device and based on the searching by the storage device, the storage devices returns to the controller, the location of the memory block. That is, in the claims of the present application, the storage device - not the controller - scans the memory blocks and returns the location of the memory block to the controller. Reply 13-14 (italicizing added, bolding in original); see, e.g., Spec. 7:5-8, 23-28. We agree. The Examiner must show that the applied references, as combined, teach or suggest all of the limitations of the rejected claims. Here, the Appellant is correct that the Examiner has not shown that Iida, in combination with Chow, Gong, and Jeddeloh, teaches or suggests the "querying" step, as recited in independent claims 1, 7, and 13. Thus, we are persuaded that the Examiner erred in the finding claims 1, 7, and 13, as well 5 Appeal2018-004174 Application 14/789,421 as claims 2---6, 8-10, 14--16, and 18, which depend therefrom, are rendered obvious over the combined teachings of Chow, Gong, Iida, and Jeddeloh. The Examiner also concludes that claims 5, 11, and 1 7, which depend directly from independent claims 1, 7, and 13, respectively, are rendered obvious over the combined teachings of Chow, Gong, Iida, Jeddeloh, and Dancho. Final Act. 15. Appellant contends that, because the Examiner erred in rejecting their base claims, claims 1, 7, and 13, we cannot sustain the rejections of dependent claims 5, 11, and 17. Br. 13; Reply 16-17. We agree. Consequently, we are persuaded that the Examiner erred in rejecting claims 1-18; and we do not sustain the rejections. DECISION For the above reasons, we reverse the Examiner's decision rejecting claims 1-18. REVERSED 6 Copy with citationCopy as parenthetical citation