12347413 (P.T.A.B. Mar. 9, 2016)

Ex Parte Sakariya et al

Patent Trial and Appeal BoardMar 9, 2016

12347413 (P.T.A.B. Mar. 9, 2016)

UNITED STA TES p A TENT AND TRADEMARK OFFICE APPLICATION NO. FILING DATE 12/347,413 12/31/2008 81310 7590 03/11/2016 Meyertons, Hood, Kivlin, Kowert & G (Apple) P.O. BOX 398 Austin, TX 78767-0398 FIRST NAMED INVENTOR Kapil V. Sakariya UNITED STATES DEPARTMENT OF COMMERCE United States Patent and Trademark Office Address: COMMISSIONER FOR PATENTS P.O. Box 1450 Alexandria, Virginia 22313-1450 www .uspto.gov ATTORNEY DOCKET NO. CONFIRMATION NO. 7888-04600/P7024US 1 1048 EXAMINER HOANG, PETER ART UNIT PAPER NUMBER 2616 NOTIFICATION DATE DELIVERY MODE 03/11/2016 ELECTRONIC Please find below and/or attached an Office communication concerning this application or proceeding. The time period for reply, if any, is set in the attached communication. Notice of the Office communication was sent electronically on above-indicated "Notification Date" to the following e-mail address( es): patent_docketing@intprop.com ptomhkkg@gmail.com PTOL-90A (Rev. 04/07) UNITED STATES PATENT AND TRADEMARK OFFICE BEFORE THE PATENT TRIAL AND APPEAL BOARD Ex parte KAPIL V. SAKARIY A, VICTOR H. YIN, and MICHAEL F. CULBERT Appeal2013-009453 Application 12/347,413 1 Technology Center 2600 Before STEVEN D.A. McCARTHY, ANDREW J. DILLON, and, JENNIFER L. McKEOWN, Administrative Patent Judges. McKEOWN, Administrative Patent Judge. DECISION ON APPEAL Appellants appeal under 35 U.S.C. Â§ 134(a) from the Examiner's decision to reject claims 1-20. We have jurisdiction under 35 U.S.C. Â§ 6(b), and we affirm. STATEMENT OF THE CASE Appellants' invention "relates generally to graphics processing units (GPUs) of electronic devices, and more particularly to switching between multiple GPUs during operation of the electronic devices." Spec. i-f 2. Claim 1 is illustrative and reads as follows: 1 According to Appellants, the real party in interest is Apple, Inc. App. Br. 2. Appeal2013-009453 Application 12/347,413 1. A system, comprising: a plurality of graphics processing units (GPUs); a timing controller; and a memory buffer coupled to the GPUs via the timing controller, wherein: the memory buffer is configured to store data associated with a first video frame from a first GPU within the plurality of GPU s; the timing controller is configured to switch between the first GPU and a second GPU within the plurality of GPU s; and the timing controller is configured to provide to a display the data associated with the first video frame from the memory buffer while switching between the first GPU and the second GPU. THE REJECTIONS The Examiner rejected claims 1-7, 9-13, and 16-20 under 35 U.S.C. Â§ 103(a) as unpatentable over Gonzalez et al. (US 7,119,808 B2; Oct. 10, 2006 (hereinafter "Gonzalez")), Tamasi et al. (US 7,372,465 Bl; May 13, 2008 (hereinafter "Tamasi") ), and Bakalash et al. (US 2008/011 7217 A 1; May 22, 2008 (hereinafter "Bakalash") ). Ans. 3-16. The Examiner rejected claims 8 and 14 under 35 U.S.C. Â§ 103(a) as unpatentable over Gonzalez, Tamasi, Bakalash, and Foster et al. (US 2007/0285428 Al; Dec. 13, 2007 (hereinafter "Foster")). Ans. 16-17. 2 Appeal2013-009453 Application 12/347,413 The Examiner rejected claim 15 under 35 U.S.C. Â§ 103(a) as unpatentable over Gonzalez, Tamasi, Bakalash, and Langendorf (US 6,624,817 Bl; Sept. 23, 2003). Ans. 18-19. THE OBVIOUSNESS REJECTION BASED ON GONZALEZ, TAMAS!, AND BAKALASH Claims 1-7, 9-13, and 16--20 The Examiner finds that Gonzalez teaches the limitations of claim 1, except for (1) a memory buffer for storing data associated with a first video frame from a first GPU and (2) the timing controller is configured to provide to a display the data associated with the first video frame from the memory buffer while switching between the first GPU and the second GPU. Ans. 3- 5. The Examiner, however, relies on Tamasi and Bakalash for each of these limitations, respectively. Id. at 4--5. Appellants, on the other hand, contend that the cited combination fails to render claim 1 obvious. App. Br. 9-10. Namely, Appellants "find[] no teaching or suggestion anywhere in Bakalash that data associated with the first video frame is provided to a display from the memory buffer while switching from the first GPU to the second GPU." Id. at 10. ISSUE UnderÂ§ 103, has the Examiner erred in rejecting claim 1 by finding that the combination of Gonzalez, Tamasi, and Bakalash teach that the "timing controller is configured to provide to a display the data associated with the first video frame from the memory buffer while switching between the first GPU and the second GPU," as recited in claim 1? 3 Appeal2013-009453 Application 12/347,413 ANALYSIS Based on the record before us, we are not persuaded that the Examiner erred in rejecting claims 1-7, 9-13, and 16-20 as unpatentable over Gonzalez, Tamasi, and Bakalash. Appellants assert that Bakalash fails to teach the recited timing controller limitations because Bakalash's data provided to a display is not data associated with the first video frame. See App. Br. 10-11. Specifically, "[ f]rom ... [certain] disclosures in Bakalash, Appellant[ s] submit[] that Bakalash is describing that the data stored in the frame buffer is a set of final pixels synthesized from the outputs of the two graphics pipelines." App. Br. 10-11. Thus, according to Appellants, Bakalash' s final synthesized pixels are not data associated with the first video frame. This argument is unpersuasive. Notably, Claim 1 merely requires the "data" to be "associated with" the first video frame. 2 Bakalash describes distributing data of a first scene to a first graphics pipeline and data of a second/subsequent scene to a second graphics pipeline. Bakalash's memory buffer then stores the recomposition of alternating frames, including first frame data, to be provided to the display. See Ans. 5---6, 21-22 (citing Bakalash i-fi-18, 32. Even if Bakalash's first frame data is synthesized with second frame data, as asserted by Appellants, the resulting combination still includes data "associated with" the first video frame. As such, we are not persuaded Bakalash fails to teach the disputed claim limitation. 22 We note that associated is defined as "to connect in the mind or imagination." Webster's II New College Dictionary, p. 68 (1995). 4 Appeal2013-009453 Application 12/347,413 Moreover, we note that the Examiner also relies on Tamasi for teaching "a memory buffer storing data associated with a first video frame from a first GPU." See, e.g., Ans. 4. One cannot show nonobviousness by attacking references individually where the rejections are based on combinations of references. See In re Keller, 642 F.2d 413, 426 (CCPA 1981); In re Merck & Co., Inc., 800 F.2d 1091, 1097 (Fed. Cir. 1986). Therefore, for the reasons discussed above and by the Examiner, claim 1, as well as 2-7, 9-13, and 16-20 not argued with particularity, are unpatentable over the cited combination of prior art. THE REMAINING OBVIOUSNESS REJECTIONS Claims 8, 14, and 15 With respect to claims 8, 14, and 15, Appellants rely upon the arguments presented for claim 1. See App. Br. 11-12. For the reasons discussed above, we find these arguments unpersuasive. Therefore, for the reasons discussed above and by the Examiner, claims 8, 14, and 15 are unpatentable over the cited combinations of prior art. CONCLUSION The Examiner did not err in rejecting claims 1-20 underÂ§ 103. DECISION The Examiner's decision rejecting claims 1-20 is affirmed. AFFIRMED 5