Ex Parte Ripberger

Patent Trial and Appeal Board

Oct 14, 2016

12725252 (P.T.A.B. Oct. 14, 2016)

UNITED STA TES p A TENT AND TRADEMARK OFFICE
APPLICATION NO. FILING DATE FIRST NAMED INVENTOR
121725,252 03/16/2010 Richard Anthony Ripberger
46917 7590 10/18/2016
KONRAD RA YNES DAVDA & VICTOR, LLP,
ATTN: IBM37
350 SOUTH BEVERLY DRIVE, SUITE 360
BEVERLY HILLS, CA 90212
UNITED STATES DEPARTMENT OF COMMERCE
United States Patent and Trademark Office
Address: COMMISSIONER FOR PATENTS
P.O. Box 1450
Alexandria, Virginia 22313-1450
www .uspto.gov
ATTORNEY DOCKET NO. CONFIRMATION NO.
TUC920090115US 1 8858
EXAMINER
AGWUMEZIE, CHINEDU CHARLES
ART UNIT PAPER NUMBER
3685
NOTIFICATION DATE DELIVERY MODE
10/18/2016 ELECTRONIC
Please find below and/or attached an Office communication concerning this application or proceeding.
The time period for reply, if any, is set in the attached communication.
Notice of the Office communication was sent electronically on above-indicated "Notification Date" to the
following e-mail address( es):
krvuspto@ipmatters.com
PTOL-90A (Rev. 04/07)
UNITED STATES PATENT AND TRADEMARK OFFICE
BEFORE THE PATENT TRIAL AND APPEAL BOARD
Ex parte RICHARD ANTHONY RIPBERGER
Appeal2014--003742
Application 12/725,252
Technology Center 3600
Before ANTON W. PETTING, NINA L. MEDLOCK, and
MATTHEWS. MEYERS, Administrative Patent Judges.
PETTING, Administrative Patent Judge.
DECISION ON APPEAL
STATEMENT OF THE CASE1
Richard Anthony Ripberger (Appellant) seeks review under
35 U.S.C. § 134 of a final rejection of claims 1, 5, 6, 10, 11, 15, 16, and 20-
32, the only claims pending in the application on appeal. We have
jurisdiction over the appeal pursuant to 35 U.S.C. § 6(b).
The Appellant invented a way of enabling "licensed features at a logical
volume level of granularity." Specification para. 1.
1 Our decision will make reference to the Appellant's Appeal Brief ("Br.,"
filed September 27, 2013) and the Examiner's Answer ("Ans.," mailed
Appeal2014-003742
Application 12/725,252
An understanding of the invention can be derived from a reading of
exemplary claim 1, which is reproduced below (bracketed matter and some
paragraphing added).
1. A method, comprising:
[ 1 ] receiving,
by a licensing application implemented in a
storage controller,
a request to enable a feature
for a logical volume of a plurality of logical volumes
controlled by the storage controller,
wherein the plurality of logical volumes are generated
from physical volumes of a plurality of storage devices
coupled to the storage controller,
wherein each feature of a plurality of features is
configurable to be enabled or disabled for one or more
logical volumes of the plurality of logical volumes,
and
wherein selected logical volumes of the plurality of
logical volumes are grouped into a resource group;
[2] in response to a request for enablement of a selected feature
for the resource group,
determining whether enabling the selected feature
for all the selected logical volumes of the resource
group
causes a licensed capacity limit for the selected
feature to be exceeded;
November 27, 2013), and Final Action ("Final Act.," mailed April 17,
2013).
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[3] avoiding enabling the selected feature for the resource
group,
and
in response to determining that enabling the selected
feature for all the selected logical volumes of the
resource group causes the licensed capacity limit for the
selected feature to be exceeded,
wherein enabling the selected feature for the resource
group causes the selected feature to be enabled for all the
selected logical volumes of the resource group;
[ 4] in response to an enablement or disablement of one or more
selected features for one or more logical volumes of a group of
sequentially numbered logical volumes,
sending a single interrupt from the storage controller to
each host of a plurality of hosts that are coupled to the
storage controller,
wherein the single interrupt is indicative of changes in
the one or more selected features for all logical volumes
of the group of sequentially numbered logical volumes.
The Examiner relies upon the following prior art:
Napolitano US 6,301,605 Bl
Gold US 6,662,284 B2
Peloquin US 6,715,070 Bl
Fujibayashi US 2010/0122028 Al
Oct. 9, 2001
Dec. 9, 2003
Mar. 30, 2004
May 13, 2010
Claims 1, 5, 6, 10, 11, 15, 16, and 20-32 stand rejected under 35 U.S.C.
§ 103(a) as unpatentable over Gold, Fujibayashi, Peloquin, and Napolitano.
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Application 12/725,252
ISSUES
The issues of obviousness tum primarily on whether the references
applied describe a single interrupt that is indicative of changes in the one or
more selected features for all logical volumes of the group of sequentially
numbered logical volumes.
FACTS PERTINENT TO THE ISSUES
The following enumerated Findings of Fact (FF) are believed to be
supported by a preponderance of the evidence.
Facts Related to Claim Construction
01. The disclosure contains no lexicographic definition of
"interrupt."
02. The ordinary meaning of an interrupt in a computer context is
an asynchronous event that suspends normal processing and
temporarily diverts the flow of control through an "interrupt
handler" routine. 2
Facts Related to the Prior Art
Gold
03. Gold is directed to a license key including an indicator of
licensed user capacity. Gold 1 :6-9.
04. Gold describes a file system and a license key including an
indication of licensed user storage capacity of the computer. The
2 Free Online Dictionary of Computing http://foldoc.org//interrupt
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Application 12/725,252
processor is arranged to be coupled with the memory for
( 1) causing the file system to control operation of the processor
and (2) preventing further operation of the processor in response
to the licensed user storage capacity being exceeded or
substantially exceeded. The processor and memory are arranged
so the license key is incapable of being changed during operation
of the computer. The processor and memory are also arranged so
the license key is incapable of being changed as result of changes
of the file system. Gold 1:55---67.
Fujibayashi
05. Fujibayashi is directed to a disk array unit for storing data in a
single or a plurality of disk units and a storage system comprised
of a plurality of disk array units. Fujibayashi para. 2.
06. Fujibayashi describes a storage controller analyzing the
contents of an access when receiving an access request. The
storage controller first determines that the access in question is
within the right (whether the function is permissible) and decides
secondly whether the access object is a resource in the range of
the group of interest (for example, whether the object volume falls
within the range of the group of interest) or whether the access
object is within the influence range of right. Fujibayashi para. 92.
Peloquin
07. Peloquin is directed to managing logical volumes and, in
particular, to selecting features in a logical volume management
environment. Peloquin describes allowing the user at boot time or
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Application 12/725,252
at run time to select the features that should be enabled during the
computer session. Peloquin 1: 10-17.
08. Peloquin's enable/disable capability is implemented by having
an additional Feature Enable flag in the Logical Volume
Management (L VM) Data Area of the partition or the aggregate
on which the feature is being applied. There are two states for the
Feature Enable flag: SET (1) or RESET (0). As long as the
Feature Enable flag is SET, the feature will continue performing
its function. For Volume Mirroring feature in the sample volume,
it will continue mirroring to the other machine on the network.
Peloquin 5:60-67.
09. Peloquin Fig. 4A illustrates the I/O request path if all features
are enabled. The I/O request enters at the top of the feature stack,
Volume Mirroring 402. It is passed down through the features of
Drive Linking 404, Software RAID 406, and Bad Block
Relocation 408 before reaching to the device drivers. Peloquin
6:1-5.
10. When Feature Enable flag is RESET, there are two possible
scenarios. The first scenario is when a feature is disabled, but it
remains in the feature stack of the volume. The second scenario is
when a feature is disabled and removed from the feature stack.
Peloquin 6:6-10.
11. Peloquin Fig. 4B illustrates the I/O request path if Volume
Mirroring has been disabled and left in the feature stack. This
allows Volume Mirroring plugin module to keep track of I/O
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Application 12/725,252
requests. However, I/O request packets should be unchanged and
passed down to the next feature as long as Volume Mirroring
remains disabled. The benefit of this design is that the feature is
allowed to re-enable itself during run time. In the case of Volume
Mirroring, when the remote site becomes accessible again, it can
resume mirroring the volume to the remote machine. Peloquin
6:11-20.
12. Peloquin Fig. 4C illustrates the I/O request path if Volume
Mirroring has been disabled and removed from the feature stack.
Since Volume Mirroring has been disabled, I/O request enters at
Drive Linking 424, Software RAID 426, and Bad Block
Relocation 428, respectively. The I/O request is then sent to the
device drivers. Peloquin 6:21-26.
13. Peloquin Fig. 5A shows a sample user interface that allows a
user to selectively enable or disable features during nm time. The
logical volume identification 502 is shown at the top of the screen.
The current list of possible features are shown at the left in the
same order as the feature stack. The features Volume Mirroring
504, Drive Linking 506, Software RAID 508, and Bad Block
Relocation 510 correspond to the feature stack shown in Peloquin
Fig. 3. Peloquin 6:39--46.
14. The features shown in Peloquin Fig. 5A are currently enabled.
When the user clicks the mouse on Volume Mirroring 504, an
option list 512 appears with the options Enable and Disable. If the
user selects Disable, then, as we will see in the next feature figure,
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the Volume Mirroring button will be labeled uisabled. For
features that cannot be safely disabled, the user will not be
allowed to change the state of those features. Peloquin 6:47-54.
Napolitano
15. Napolitano is directed to a distributed storage architecture of an
operating system. Napolitano 1: 15-1 7.
16. Napolitano describes conventional RAID controller architecture
as one where the file system is contained within the host computer
and the I/O subsystem is distributed between the host computer
and controller. Most implementations of this architecture are
configured to execute RAID-related operations by transferring
discrete block-oriented requests between the file system and
controller. When these requests complete, however, the host
processor is notified by means of interrupts, i.e., events that
change the normal flow of instruction execution by the host
processor. For this type of architecture, there may be many
interrupts associated with a single transaction; since each interrupt
must be serviced by the host processor, this architecture results in
inefficient use of the processor. Napolitano 2:34--47.
17. Napolitano describes how, because servicing of interrupts
requires use of significant host computer overhead, the file array
architecture reduces interrupts by performing few high-level file
system requests as opposed to many block-oriented requests.
Napolitano 9:6-10.
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18. Napolitano describes a file array architecture comprising a
configuration and management utility tool that provides a
graphical user interface (GUI), a command line interface and an
applications programming interface for the data processing
platform. This file array storage tool enables local or remote
"single step" management of storage devices by a user from a
console. For example, data containers may be created, deleted,
expanded and promoted to multi-level containers in response to a
single operation issued through the GUI. Napolitano 14:49---61.
ANALYSIS
As to claim 1 and its dependent claims, we are persuaded by Appellant's
argument that none of the art applied describes limitation [ 4] sending a
single interrupt to each host where the single interrupt is indicative of
changes. The Examiner finds that Peloquin and Napolitano each describe
sending a single signal in such circumstance. Final Act. 9-11. The problem
for the Examiner is the claim is narrower, and recites an implementation
based on a single interrupt, a very specific and well known form of
information that most programming languages acknowledge and provide for
in the form of handling capacity. None of the references describes using an
interrupt explicitly, other than Napolitano, which only describes using
interrupts to access a file system for conventional I/O. In response to
Appellant's argument, the Examiner elaborates that
an I/O to enable or disable a feature across the mirrored logical
volumes is an interrupt that is sent to the logical volumes of the
mirrored disks. For example fig. 4 and associated text recites:
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"The I/O request enters at the top of the feature stack, Volume
Mirroring 402. It is passed down through the features of Drive
Linking 404, Software RAID 406, and Bad Block Relocation
408 before reaching to the device drivers." From the above it is
clear that a single interrupt is passed down the stack (see figs.
4A, 4B and 4C and associated texts). With respect to (2)
"wherein the single interrupt is indicative of changes in the one
or more selected features for all logical volumes of the group of
sequentially numbered logical volumes" Appellant is further
reminded that each I/Oto enable or disable a feature is
indicative of changes (enabled or disabled or disabled and
removed from the stack) in the one or more selected features of
the logical volumes of the mirrored disk.
Ans. 10-11. The Examiner's phrasing of his finding shows his error. It is
each I/Oto enable or disable a feature that is indicative of changes in the
applied art, not the interrupt. Thus the prior art interrupt handlers respond to
I/O and not the changes. This is in fact similar to the way Napolitano
reduces the number of interrupts by using the I/O interrupt as an entry point
to accessing plural blocks within high level file system requests. That is,
instead of using an interrupt to respond to block requests in Napolitano,
which would correspond to responding to change requests in the instant
claim, Napolitano avoids the use of interrupts to do so. At bottom, a single
interrupt indicative of an TIO request that pertains to a message to change is
not an interrupt that itself is indicative of that change.
The remaining independent claims have similar limitations.
CONCLUSIONS OF LAW
The rejection of claims 1, 5, 6, 10, 11, 15, 16, and 20-32 under
35 U.S.C. § 103(a) as unpatentable over Gold, Fujibayashi, Peloquin, and
Napolitano is improper.
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uECISION
The rejection of claims 1, 5, 6, 10, 11, 15, 16, and 20-32 is reversed.
REVERSED
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