Ex Parte Ricci

Patent Trial and Appeal Board

Jul 16, 2014

10454274 (P.T.A.B. Jul. 16, 2014)

UNITED STATES PATENT AND TRADEMARK OFFICE
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BEFORE THE PATENT TRIAL AND APPEAL BOARD
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Ex parte DEREK ORZO RICCI
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Appeal 2012-001985
Application 10/454,274
Technology Center 2100
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Before, ALLEN R. MacDONALD, ROBERT E. NAPPI, J. and
DAVID M. KOHUT, Administrative Patent Judges.

Per Curiam.

DECISION ON APPEAL
This is a decision on appeal under 35 U.S.C. § 134(a) of the rejection
of claims 1 through 12.
We affirm.
INVENTION
A computer-based method for database bitmap index processing in a
database management system. The method utilizes a microprocessor
supporting instructions for simultaneous processing of at least 128 bits and
having storage units of at least 128 bits to process bitmap index format
database structures. See Abstract of Appellant’s Specification. Claim 1 is
illustrative of the invention and reproduced below:

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1. A computer-based method for database bitmap index
processing in a database management system, the method
comprising the steps of:
utilizing a microprocessor comprising instructions for
simultaneous processing of storage units having at least 128 bits
and containing bitmap index format database structures of at
least 128 bits, said processing comprising an instruction for
simultaneously moving all the bits from the storage unit and
another instruction for simultaneously performing a logical
AND instruction on all the bits from the storage units.

REJECTIONS AT ISSUE

The Examiner has rejected claims 1, 2, 4, 5, 6, 8, 9, 10 and 12 under
35 U.S.C. § 103(a) as unpatentable by Bhashyam ( US 6,618,729 B1,
published Sept. 9, 2003), Wu (US 2004/0090351 A1, published May 13,
2004) and Goldensher (US 6,282,540 B1, published Aug. 28, 2001).
Answer 5–141.
The Examiner has rejected claims 3, 7 and 11 under 35 U.S.C.
§ 103(a) as unpatentable over Bhashyam, Wu, Goldensher and Ginter (US
5,892,900, published Apr. 6, 1999). Answer 14–15.
ANALYSIS
Claims 1, 5, and 9
On pages 12 through 27 of the Appeal Brief, and pages 12 through 28
of the Reply Brief Appellant provides numerous arguments directed to the
Examiner’s rejection of claims 1, 5, and 9. The Examiner has provided a
comprehensive response to Appellant’s arguments. Answer 15–35. We have

1 Throughout this opinion we refer to the Appeal Brief dated May 11, 2011,
Reply Brief dated November 2, 2011, and the Examiner’s Answer mailed on
September 2, 2011.
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reviewed the Examiner’s response and concur with the conclusion of
obviousness.
We add the following. Representative claim 1 recites a method which
contains one step, utilizing a microprocessor for simultaneous processing
bitmap index format database structures of 128 bits which are contained in
storage units. The claim recites the microprocessor comprising instructions
for simultaneous processing of storage units having at least 128 bits (i.e. the
processor has a set of instructions it can perform and operates on 128 bits
simultaneously). Further, the claim recites the processing includes two
instructions, move and AND. We note the claim does not recite actually
performing the move and AND in any order or how these instructions are
utilized in the simultaneous processing bitmap index format database
structures. Further, the claim recites no function or utility associated with
the processing. Thus, Appellant’s claim merely recites using a 128 bit
processor to simultaneously process 128 bit bitmap index format database
structures, using two the instructions of the processor.
We note, Appellant’s Specification identifies that:
[T]he Intel Pentium III or higher CPUs contain eight 128-bit registers
and the additional instructions to utilize them. The preferred
embodiments of the present invention include a system and improved
programming method which utilize these new 128-bit registers
(xmm0-xmm7) and the additional two new instructions: 1)
MOVDQA, which moves 128-bit storage units to/from memory and
128-bit registers, and 2) PAND, which computes a logical AND on
entire 128-bit storage units.

Specification 8–9. Thus, Appellant did not invent the 128 bit
microprocessor or the instructions performed by the processor such as the
simultaneous AND and move. Further, the Examiner has provided ample
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evidence to show that using microprocessors to process bitmap index format
database structures with instructions such as AND and move are known.2

Claims 2, 6, and 10
Appellant argues on pages 27 and 29 of the Appeal Brief that the
Examiner’s rejection of these claims is in error, as the combined references
do not teach the instructions belong to the processor’s multimedia
application extensions. Further, Appellant argues it is improper to combine
the references to reject the claims. The Examiner has provided a
comprehensive response to Appellant’s arguments directed to these claims.
Answer 48–55. We have reviewed the Examiner’s response and concur with
the conclusion of obviousness. We further note that representative claim 2
merely identifies a larger set of the processor’s instructions are used and, as
with claim 1, the claim does not recite how the instructions are used, in what
order or what function or utility is achieved with the instructions. Further, as
identified in Appellant’s Specification these instructions are associated with
the processor, which was known in the art.

Claims 4, 8, and 12
Appellant argues on pages 29 and 30 of the Appeal Brief that the
Examiner’s rejection of these claims is in error. The Examiner has
responded to each point made in Appellant’s arguments directed to these

2 We note that Appellant’s Specification on page 8 also discusses that it was
known in the art to use move and AND instructions in the processing of
bitmaps.
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claims. Answer 55–58. We have reviewed and concur with the Examiner’s
reasoning and conclusions.

Claims 3, 7, and 11
Appellant argues on pages 30 through 34 of the Appeal Brief that the
Examiner’s rejection of these claims is in error. The Examiner has
responded to each point made in Appellant’s arguments directed to these
claims. Answer 62–65. We have reviewed and concur with the Examiner’s
reasoning and conclusions.

DECISION
The decision of the Examiner to reject claims 1 through 12 is
affirmed.
No time period for taking any subsequent action in connection with
this appeal may be extended under 37 C.F.R. § 1.136(a)(1)(iv).

AFFIRMED

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