Ex Parte Ramirez

Patent Trial and Appeal Board

Sep 26, 2017

14015498 (P.T.A.B. Sep. 26, 2017)

United States Patent and Trademark Office
UNITED STATES DEPARTMENT OF COMMERCE
United States Patent and Trademark Office
Address: COMMISSIONER FOR PATENTS
P.O.Box 1450
Alexandria, Virginia 22313-1450
www.uspto.gov
APPLICATION NO. FILING DATE FIRST NAMED INVENTOR ATTORNEY DOCKET NO. CONFIRMATION NO.
1505-0258 4580
EXAMINER
MURPHY, JEROLD B
ART UNIT PAPER NUMBER
2687
MAIL DATE DELIVERY MODE
14/015,498 08/30/2013
28078 7590 09/26/2017
MAGINOT, MOORE & BECK, LLP
One Indiana Square, Suite 2200
INDIANAPOLIS, IN 46204
Anibal Diego Ramirez
09/26/2017 PAPER
Please find below and/or attached an Office communication concerning this application or proceeding.
The time period for reply, if any, is set in the attached communication.
PTOL-90A (Rev. 04/07)
UNITED STATES PATENT AND TRADEMARK OFFICE
BEFORE THE PATENT TRIAL AND APPEAL BOARD
Ex parte ANIBAL DIEGO RAMIREZ
Appeal 2017-005946
Application 14/015,498
Technology Center 2600
Before CARL W. WHITEHEAD JR., NORMAN H. BEAMER, and
ADAM J. PYONIN, Administrative Patent Judges.
PER CURIAM.
DECISION ON APPEAL
STATEMENT OF THE CASE
This is a decision on appeal under 35 U.S.C. § 134(a) from the Non-
Final Rejection of claims 1—21. Non-Final Rejection 1. We have
jurisdiction under 35 U.S.C. § 6(b).
We affirm-in-part.
Introduction
Appellant’s invention relates to “a meter having an Ethernet controller
in a meter operably coupled to a multi-meter communication bus having a
different signal protocol.” Specification 3:11—12. Claims 1 and 10 are
independent.
Appeal 2017-005946
Application 14/015,498
Representative Claim (disputed limitations emphasized)
1. A metering arrangement, comprising:
a first meter, comprising
a first metrology circuit having a first data interface;
an Ethernet controller having an Ethernet port and a
conversion circuit coupled to convert Ethernet standard signals
having a first communication protocol to signals of a second
communication protocol;
an isolation circuit coupled between the Ethernet
controller and the first data interface;
wherein the Ethernet controller is operably coupled
to communicate data with the first data interface via the isolation
circuit, and the conversion circuit is further operably coupled to
communicate data via the first data port;
a second meter, comprising
a second metrology circuit having a second data
interface operably connected to a second data port, the second
data port operably coupled to communicate data with the first
data port.
Rejections on Appeal
Claim 1 stands rejected under 35 U.S.C. § 112(b) as failing to supply
antecedent basis. Non-Final Rejection 7.1
Claims 1—5, 7, 8, 10-16, 18, and 21 stand rejected under 35 U.S.C.
§ 103 as being unpatentable over Mimlitz (US 8,219,214 Bl; July 10, 2012).
Non-Final Rejection 8.2
1 Appellant does not argue the rejection of claim 1 under 35 U.S.C. § 112(b).
Appeal Brief 6. Accordingly, we summarily sustain the rejection.
2 The heading of the rejection omits reference to claims 18 and 21 but these
claims are rejected in the body of the rejection. See Non-Final Rejection 15.
2
Appeal 2017-005946
Application 14/015,498
Claims 9, 17, 19, and 20 stand rejected under 35 U.S.C. § 103 as
being unpatentable over Mimlitz in view of Hammond (US 2002/0118119
Al; August 29, 2002). Non-Final Rejection 15.
Claim 6 stands rejected under 35 U.S.C. § 103 as being unpatentable
over Mimlitz in view of Ferraiolo (US 5,968,137; October 19, 1999). Non-
Final Rejection 17.
ANALYSIS
Rather than reiterate the arguments of Appellant and the Examiner,
we refer to the Non-Final Rejection (mailed February 10, 2016), the Appeal
Brief (filed August 15, 2016), the Answer (mailed December 28, 2016), and
the Reply Brief (filed February 24, 2017) for the respective details. We have
considered in this decision only arguments Appellant actually raised in the
Briefs.
Appellant argues Examiner error because “[t]he Examiner’s definition
of electrical isolation is simply that until the microprocessor 24 of Mimlitz
decides to transmit data from one port to another port, these ports are
isolated from one another,” and “[tjhere is nothing in Mimlitz that describes
the microprocessor as protecting any components ‘from potential damage
due to high voltages’, according to the definition of electrical isolation
provided in 10024 of Applicant’s specification.” Reply Brief 2. The
Examiner finds “it is obvious that except and until the Microprocessor 24
passes the signals from one port at an input to another port on an output,
then the signals from one port [do] not reach the other port, i.e. until the
signals are passed the ports are isolated from one another.” Answer 2.
3
Appeal 2017-005946
Application 14/015,498
We agree with Appellant that the Examiner’s interpretation of
Appellant’s claimed isolation circuit is not reasonable in light of Appellant’s
Specification.3 Absent some explicit teaching, one of ordinary skill in the
art would not consider a microprocessor as performing the functions of an
isolation circuit. Accordingly, we are constrained by the record to reverse
the Examiner’s obviousness rejection of independent claims 1 and 10, and
dependent claims 2—9 and 11—21.
DECISION
We affirm the Examiner’s indefmiteness rejection of claim 1.
We reverse the Examiner’s obviousness rejection of claims 1—21.
No time period for taking any subsequent action in connection with
this appeal may be extended under 37 C.F.R. § 1.136(a)(l)(iv).
AFFIRMED-IN-PART
3 During examination of a patent application, a claim is given its broadest
reasonable construction “in light of the specification as it would be
interpreted by one of ordinary skill in the art.” In re Am. Acad, of Sci. Tech
Ctr., 367 F.3d 1359, 1364 (Fed. Cir. 2004) (citations omitted) (internal
quotation marks omitted); see also In re Man Mach. Interface Techs. LLC,
822 F.3d 1282, 1287 (Fed. Cir. 2016) (“the proper BRI construction is not
just the broadest construction, but rather the broadest reasonable
construction in light of the specification.'1'’).
4