Ex Parte Rajendran et al

Patent Trial and Appeal Board

Jul 25, 2018

14529056 (P.T.A.B. Jul. 25, 2018)

UNITED STA TES p A TENT AND TRADEMARK OFFICE
APPLICATION NO. FILING DATE
14/529,056 10/30/2014
23494 7590 07/27/2018
TEXAS INSTRUMENTS IN CORPORA TED
PO BOX 655474, MIS 3999
DALLAS, TX 75265
UNITED ST A TES OF AMERICA
FIRST NAMED INVENTOR
Gireesh Rajendran
UNITED STATES DEPARTMENT OF COMMERCE
United States Patent and Trademark Office
Address: COMMISSIONER FOR PATENTS
P.O. Box 1450
Alexandria, Virginia 22313-1450
www .uspto.gov
ATTORNEY DOCKET NO. CONFIRMATION NO.
TI-72290 9614
EXAMINER
FOTAKIS, ARISTOCRATIS
ART UNIT PAPER NUMBER
2633
NOTIFICATION DATE DELIVERY MODE
07/27/2018 ELECTRONIC
Please find below and/or attached an Office communication concerning this application or proceeding.
The time period for reply, if any, is set in the attached communication.
Notice of the Office communication was sent electronically on above-indicated "Notification Date" to the
following e-mail address(es):
uspto@ti.com
PTOL-90A (Rev. 04/07)
UNITED STATES PATENT AND TRADEMARK OFFICE
BEFORE THE PATENT TRIAL AND APPEAL BOARD
Ex parte GIREESH RAJENDRAN, RAKESH KUMAR,
ALOK PRAKASK JOSHI, SUBHASHISH MUKHERJEE,
KRISHNASW AMY THIAGARAJAN, and APU SIV ADAS
Appeal2018-000447
Application 14/529,056
Technology Center 2600
Before JOSEPH L. DIXON, SCOTT B. HOW ARD, and
MATTHEW J. McNEILL, Administrative Patent Judges.
DIXON, Administrative Patent Judge.
DECISION ON APPEAL
Appeal2018-000447
Application 14/529,056
STATEMENT OF THE CASE
Appellants 1 appeal under 35 U.S.C. § 134(a) from a rejection of
claims 1-20. We have jurisdiction under 35 U.S.C. § 6(b ).
We affirm.
The claims are directed to a switched mode power amplifier with ideal
IQ combining. Claim 1, reproduced below, is illustrative of the claimed
subject matter:
1. A circuit comprising:
an I converter arranged to receive I data, to output I sign
data based on the received I data and to output I magnitude data
based on the received I data;
a Q converter arranged to receive Q data, to output Q
sign data based on the received Q data and to output Q
magnitude data based on the received Q data;
an I clock operable to generate an I phase based on the I
sign data, the I phase having an I duty cycle;
a Q clock operable to generate a Q phase based on the Q
sign data, the Q phase having a Q duty cycle;
an I modulator operable to generate an I magnitude pulse
stream based on the I magnitude data;
a Q modulator operable to generate a Q magnitude pulse
stream based on the Q magnitude data;
a digital logic component operable to generate an output
signal that is a single data stream based on the I phase, the I
magnitude pulse stream, the Q phase and the Q magnitude pulse
stream; and
1 Appellants indicated that Texas Instruments Incorporated is the real party
in interest (App. Br. 1 ).
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Application 14/529,056
a power amplifier operable to generate an amplified
signal based on the output signal.
REFERENCES
The prior art relied upon by the Examiner in rejecting the claims on
appeal is:
Deng et al. US 2014/0254720 Al Sept. 11, 2014
(Hereinafter "Deng")
Mahoney et al. US 2014/0126669 Al May 8, 2014
(Hereinafter "Mahoney")
Eliezer et al. US 2006/0291589 Al Dec. 28, 2006
(Hereinafter "Eliezer")
Staszewski et al. US 2011/0129037 Al June 2, 2011
(Hereinafter "Staszewski")
Malmqvist et al. US 2010/0014575 Al Jan. 21, 2010
(Hereinafter "Malmqvist")
REJECTIONS
The Examiner made the following rejections:
Claims 1-20 stand rejected under 35 U.S.C. § 112(a) as failing to
comply with the written description requirement. In the Examiner's
Answer, the Examiner withdrew this rejection (Ans. 2). Accordingly, this
rejection is no longer a part of this appeal.
Claims 1, 2, 5, 6, 11, 12, 15, and 16 stand rejected under 35 U.S.C.
§ I03(a) as being unpatentable over Deng in view of Mahoney and in further
view of Eliezer (Final Act. 4).
Claims 3, 4, 13, 14, and 20 stand rejected under 35 U.S.C. § I03(a) as
being unpatentable over Deng, Mahoney, and Eliezer in view of Staszewski
(Final Act. 7, 10).
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Claims 7, 10, and 17 stand rejected under 35 U.S.C. § 103(a) as being
unpatentable Deng, Mahoney, and Eliezer in view of Malmqvist (Final Act.
8).
Claims 8, 9, 18, and 19 stand rejected under 35 U.S.C. § 103(a) as
being unpatentable over Deng, Mahoney, Eliezer, and Malmqvist in view of
Staszewski (Final Act. 9).
ANALYSIS
We have reviewed the Examiner's rejections in light of Appellants'
arguments presented in this appeal. Arguments which Appellants could
have made but did not make in the Briefs are deemed to be waived. See
37 C.F.R. § 4I.37(c)(l)(iv). On the record before us, we are not persuaded
the Examiner erred. We adopt as our own the findings and reasons set forth
in the rejections from which the appeal is taken and in the Examiner's
Answer, and provide the following for highlights and emphasis.
Appellants argue the patentability of independent claims 1, 11, and 20
based upon the same arguments (App. Br. 11-12). As a result, we select
independent claim 1 as the representative claim for the group and will
address Appellants' arguments thereto. 37 C.F.R. § 4I.37(c)(l)(iv).
35 USC§ 103
Claims 1, 11, and 20
Appellants have the burden on appeal to the Board to demonstrate
error in the Examiner's position. See In re Kahn, 441 F.3d 977, 985-86
(Fed. Cir. 2006). Therefore, we look to Appellants' Briefs to show error in
the Examiner's proffered prima facie case.
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Application 14/529,056
Appellants contend that the Examiner erred in rejecting claim 1 as
being unpatentable over Deng in view of Mahoney in view ofEliezer (App.
Br. 7-12; Reply Br. 2--4). Appellants present similar arguments for
independent claims 11 and 20. Specifically, Appellants contend Deng,
Mahoney, and Eliezer fail to teach or suggest "a digital logic component
operable to generate an output signal that is a single data stream based on the
I phase, the I magnitude pulse stream, the Q phase and the Q magnitude
pulse stream," because Eliezer (Fig. 8) does not teach data I+jQ is combined
into a "single" bit stream (App. Br. 10).
The Examiner finds that Eliezer teaches a digital component
generating a single output data stream (I +jQ, Fig 8) that is based on I phase,
the I magnitude, the Q phase, and Q magnitude (Fig. 14 ). The Examiner
also finds Eliezer teaches the output signal having two discrete levels (levels
3 and 5, Fig. 21A) and a power amplifier operable to generate an amplified
signal based on the output signal (RF _out, Figs. 8, 14, and 18) (Final Act. 6).
Moreover, the Examiner finds the outputs of the IQ switch arrays provide a
single digital complex data signal I+jQ (Ans. 3).
It is noted that claims 1, 11, and 20 do not contain the phrase "single
bit stream," as argued by Appellants. Rather, the claims recite "a component
operable to generate an output signal that is a single data stream."
Appellants provided support for the argued "data stream" in the
Specification, which states:
[T]here is a single data stream on line 556 to the power amplifier,
PA 526, said data stream encoding I sign, I magnitude, Q sign
and Q magnitude information. The waveforms representing the
eight possible states if I and Q sign and magnitude appearing on
line 556 and presented to PA 526 ....
(Spec. ,r 50; see App. Br. 3.)
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Therefore, the Specification discloses and supports the claimed
"single data stream" and not a "single bit stream," as argued by Appellants.
Additionally, the Specification discloses in the same portion that the data
stream comprises waveforms appearing on line 556, which is consistent with
the Examiner's finding that Eliezer provides a single data signal, as the
claimed single data stream (Ans. 3).
As the Examiner found, Eliezer teaches at least "a data stream" output
that is at least based on I and Q information, as recited in the claims 1, 11,
and 20. Moreover, in the discussion of the cited Figure 8, Eliezer states that
the LOr (local oscillator signal) and LOQ signals are traditionally sinusoidal
and orthogonal waveforms. However, Eliezer alternatively suggests
"various forms of digital waveforms may be used" (Eliezer ,r 86). Thus, this
evidence stands in direct contrast to Appellants' assertions that no single
stream is shown (App. Br. 11 ).
The Examiner has made extensive specific fact-findings with respect
to each of the argued claims. Appellants' argument repeatedly relies upon
alternative claim language (e.g., single bit stream) that is not within the
claim, as detailed supra, and simply argue that the same un-recited elements
are missing from the references. However, Appellants do not present any
arguments in the Appeal Brief to explain why the Examiner's explicit fact-
findings, based on the actual claim limitations, are in error.
Appellants do not provide a specific argument for patentability, other
than Eliezer does teach a "single bit stream," as to why Eliezer does not at
least teach or suggest the claimed "single data stream." In contrast, the
Examiner's findings address each of the claim limitations raised on appeal
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by Appellants and reference specific teachings in Eliezer, as teaching and
suggesting these claim limitations. 2
We, therefore, are not persuaded of error in the Examiner's finding
that Eliezer teaches the disputed limitations of claim 1. In addition, it is
noted that the Examiner cited and relied upon multiple portions of Eliezer, as
evidence in the Final Rejection, not just Figure 8, as argued by Appellants.
Specifically, the Examiner cited Figures 14, 18, and 21A, etc., to teach and
suggest the digital component operable to generate an output signal that is a
single data stream and a power amplifier to generate an amplified signal
based on said output signal (Final Act. 6). Appellants have not mentioned or
discussed this additional evidence in either the Appeal Brief or the Reply
Brief. Specifically, the Examiner found Figure 14 discloses a digital
embodiment with I sign, I mag, Q sign, and Q mag inputs into an array with
a single modulated RF output 212 (Eliezer Fig. 14). These elements show,
in addition to Figure 8, an output of a data stream based on I and Q
information.
Appellants also argue, for the first time in the Reply Brief ( and not in
response to arguments in the Examiner's Answer), that the teaching in
Eliezer is different than what is taught in the Specification (Reply Br. 2).
Moreover, Appellants provide two attachments explaining the I+jQ signal of
2 We find Appellants have failed to rebut the Examiner's rejection of the
claims on appeal with any meaningful analysis. Instead, Appellants' ground
their appeal on a series of conclusory arguments presented in the Appeal
Brief. This form of argument is ineffective in establishing the patentability
of the claims on appeal. See Ex parte Belinne, No. 2009-004693, 2009 WL
2477843 (BPAI 2009) (informative), available at:
https ://www. uspto. gov/ sites/ default/files/ip/boards/bpai/ decisions
/inform/fd09004693 .pdf
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Eliezer is an analog signal taken out of a chip through a bond wire (Reply
Br. 2). This argument, however, is untimely raised and Appellants have not
argued good cause for the untimeliness. See 3 7 C.F .R. § 41.41 (b )(2 ).
Accordingly, this argument has been waived as it was raised for the first
time in the Reply Brief without a showing of good cause. See 37 C.F.R.
§ 4I.41(b )(2) (2012); see also Ex parte Borden, 93 USPQ2d 1473, 1474
(BP AI 2010) (informative) ("[T]he reply brief [is not] an opportunity to
make arguments that could have been made in the principal brief on appeal
to rebut the Examiner's rejections, but were not.").
Accordingly, for the foregoing reasons, Appellants have not shown
error in the Examiner's factual findings or conclusion of obviousness of
representative independent claim 1, and we sustain the rejection of claim 1
as obvious over Deng, Mahoney, and Eliezer. We further sustain the
rejection of independent claims 11 and 20 based on the same rationale as
representative independent claim 1.
Claims 2, 5, 6, 12, 15, and 16
Appellants argue the obviousness rejections of claims 2, 5, 6, 12, 15,
and 16 are erroneous for at least the same reasons as discussed with respect
to independent claim 1, 11, and 20 (App. Br. 13-14). Because we are not
persuaded the Examiner erred in rejecting claims 1, 11, and 20, Appellants
arguments in reiterating the claims language regarding claims 2, 5, 6, 12, 15
and 16 also does not persuade us of error, and we sustain the rejection of
claims 2, 5, 6, 12, 15, and 16.
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Claims 3, 4, 7-10, 13, 14, and 17-19
The remaining rejections relate to dependent claims, for which
Appellants argue the respective, additional cited references "fail[] to further
teach the deficiencies" regarding rejection of the base claims (App. Br. 14--
18). Because we are not persuaded the Examiner erred in rejecting
independent claims 1, 11, and 20, we are unpersuaded of error in the
rejections of the remaining dependent claims, and we sustain the rejection of
these dependent claims.
Accordingly, we sustain the Examiner's obviousness rejections of
claims 1-20.
DECISION
For the above reasons, we affirm the Examiner's decision to reject
claims 1, 2, 5, 6, 11, 12, 15, and 16 over Deng, Mahoney, and Eliezer under
35 U.S.C. § 103(a). For the same reasons, we affirm the Examiner's
decision to reject claims 3, 4, 13, 14, and 20 over Deng, Mahoney, and
Eliezer in view of Staszewski. We also affirm the Examiner's decision to
reject claims 7, 10, and 17 over Deng, Mahoney, and Eliezer in view of
Malmqvist and claims 8, 9, 18, and 19 over Deng, Mahoney, Eliezer, and
Malmqvist in view of Staszewski.
No time period for taking any subsequent action in connection with
this appeal may be extended under 37 C.F.R. § 1.136(a)(l )(iv).
AFFIRMED
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