Ex Parte Paulson et alDownload PDFBoard of Patent Appeals and InterferencesMay 11, 201211147855 (B.P.A.I. May. 11, 2012) Copy Citation UNITED STATES PATENT AND TRADEMARK OFFICE UNITED STATES DEPARTMENT OF COMMERCE United States Patent and Trademark Office Address: COMMISSIONER FOR PATENTS P.O. Box 1450 Alexandria, Virginia 22313-1450 www.uspto.gov APPLICATION NO. FILING DATE FIRST NAMED INVENTOR ATTORNEY DOCKET NO. CONFIRMATION NO. 11/147,855 06/07/2005 Christopher D. Paulson LSI.110US01 (04-0488) 7670 84654 7590 05/11/2012 COCHRAN FREUND & YOUNG LLC LSI CORPORATION 2026 CARIBOU DRIVE SUITE 201 FORT COLLINS, CO 80525 EXAMINER TSENG, CHENG YUAN ART UNIT PAPER NUMBER 3992 MAIL DATE DELIVERY MODE 05/11/2012 PAPER Please find below and/or attached an Office communication concerning this application or proceeding. The time period for reply, if any, is set in the attached communication. PTOL-90A (Rev. 04/07) UNITED STATES PATENT AND TRADEMARK OFFICE ____________________ BEFORE THE BOARD OF PATENT APPEALS AND INTERFERENCES ____________________ Ex parte CHRISTOPHER D. PAULSON, TIMOTHY D. THOMPSON, and KEVIN T. CAMPBELL ____________________ Appeal 2010-003305 Application 11/147,855 Technology Center 2100 ____________________ Before DEBRA K. STEPHENS, KALYAN K. DESHPANDE, and MICHAEL J. STRAUSS, Administrative Patent Judges. STRAUSS, Administrative Patent Judge. DECISION ON APPEAL Appeal 2010-003305 Application 11/147,855 2 Appellants appeal under 35 U.S.C. § 134(a) (2002) from a final rejection of claims 2-5 and 7-13. We have jurisdiction under 35 U.S.C. § 6(b). We REVERSE. Introduction According to Appellants, the invention relates to a device and method for synchronizing data between two clock domains having the same frequency but which may be out of phase. A First In First Out (FIFO) queue, i.e., a buffer, is used as an intermediary through which data is transmitted between the two domains. The system is particularly applicable to initiating transfer of data immediately after a system reset when the queue is initially empty. Thus, the system delays a first write to the FIFO queue by up to one cycle of the write clock of the transmitting domain. A first read of the FIFO queue is additionally delayed by at least one cycle of the read clock of the domain receiving the data to achieve a meta-stable data storage condition and then a second time, again by at least one read clock cycle, to achieve a stable data storage condition. According to Appellants, delaying the first write has the effect of reducing the latency between (i) the first write and the corresponding subsequent read, the reduced latency continuing between (i) subsequent writes and (ii) the corresponding reads. The reduction in latency between writes and reads reduces the required size of the FIFO queue. Appeal 2010-003305 Application 11/147,855 3 STATEMENT OF THE CASE Exemplary Claim Claim 2 is an exemplary claim and is reproduced below: 2. A method for synchronizing data between two clock domains comprising: delaying a first data write to a FIFO queue from a first (write) clock domain by up to one write clock cycle thereby reducing latency between subsequent data writes to said FIFO queue and data reads from said FIFO queue into a second (read) clock domain by said up to one write clock cycle, said first (write) clock domain and said second (read) clock domain having equivalent frequencies, said first (write) clock domain and said second (read) clock domain having any phase relationship with respect to each other; delaying a first data read of said FIFO queue by up to a first read clock cycle occurring after said up to one write clock cycle to achieve a meta-stable data storage condition; writing a first data element into a first position of said FIFO queue; delaying said first data read of said FIFO queue by up to a second read clock cycle to achieve a stable data storage condition; reading said first data element from said first position of said FIFO queue; writing data to each position in said FIFO queue by writing data to a position in said FIFO queue on a write clock cycle and writing to a next position of said FIFO queue on a next write clock cycle, said next position of said FIFO queue being said first position of said FIFO queue when a last position of said FIFO queue was written on said write clock cycle; and reading each written data position in said FIFO queue less than two read clock cycles after said written data position of said FIFO queue receives data from said first (write) clock domain. Appeal 2010-003305 Application 11/147,855 4 References Liao 2003/0169644 A1 Sep. 11, 2003 Mike Stein et al., Crossing the Abyss: Asynchronous Signals in a Synchronous World, EDN, Jul. 24, 2003, at 59 (“Stein”) Rejection Claims 2-5 and 7-13 stand rejected under 35 U.S.C. § 103(a) as being unpatentable over Liao and Stein. We have only considered those arguments that Appellants actually raised in the Briefs. Arguments Appellants could have made but chose not to make in the Briefs have not been considered and are deemed to be waived. See 37 C.F.R. § 41.37(c)(1)(vii)(2009). ISSUE 35 U.S.C. § 103(a): claims 2-5 and 7-13 Appellants assert their invention is not obvious over Liao and Stein because the combination of Liao and Stein is improper and because it fails to disclose a system that (i) delays a first data write to a FIFO queue from a first clock domain by up to one write clock cycle or (ii) delays a first read of the FIFO queue by at least one read clock cycle and then again by a second at least one read clock cycle. (App. Br. 11-14). Specifically, Appellants contend neither Liao nor Stein teaches the steps of: “delaying a first data write to a FIFO queue from a first (write) clock domain by up to one write clock cycle thereby reducing latency between subsequent data writes to said FIFO queue and data reads from said FIFO Appeal 2010-003305 Application 11/147,855 5 queue into a second (read) clock domain by said up to one write clock cycle, said first (write) clock domain and said second (read) clock domain having equivalent frequencies, said first (write) clock domain and said second (read) clock domain having any phase relationship with respect to each other”; or “delaying a first data read of said FIFO queue by up to a first read clock cycle occurring after said up to one write clock cycle to achieve a meta-stable data storage condition” and “delaying said first data read of said FIFO queue by up to a second read clock cycle to achieve a stable data storage condition.” Issue: Has the Examiner erred in rejecting the subject claims under 35 U.S.C. § 103(a) based on the combination of Liao and Stein? ANALYSIS The Examiner asserts that the suggestion and/or motivation for combining Liao with Stein would be to address a metastable state problem. We disagree. While both disclosures mention the metastable state problem, there is no disclosure suggesting that the technique of Stein relied upon by the Examiner would address any metastable problem of Liao. We find that modifying Liao according to Stein is more than a mere substitution of one element for another known in the field. To the contrary, Appellants have put forth compelling arguments that, even if made, the combination would be inoperative for its intended purpose. For these reasons, we are unconvinced that an artisan would have combined the Liao and Stein references in the manner proffered by the Examiner without having the benefit of Appellants’ claimed subject matter. Therefore, we find the Examiner erred by Appeal 2010-003305 Application 11/147,855 6 improperly combining the Liao and Stein references under 35 U.S.C. § 103(a). Since Appellants have shown at least one error in the Examiner’s rejection, we need not address Appellants’ other arguments. Accordingly, the Examiner has not shown the combination of Liao and Stein teaches or suggests the invention of claim 2 and claims 7 and 11, not separately argued. Dependent claims 3-5, 8-10 and 12-13 stand with their respective independent claims. Accordingly, the Examiner erred in rejecting claims 2-5 and 7-13 under 35 U.S.C. § 103(a) as being obvious over Liao and Stein. CONCLUSION Appellants have shown the Examiner erred in rejecting claims 2-5 and 7-13 under 35 U.S.C. § 103(a) as being obvious over Liao and Stein. DECISION The Examiner’s rejection of claims 2-5 and 7-13 under 35 U.S.C. § 103(a) as being obvious over Liao and Stein is reversed. REVERSED msc Copy with citationCopy as parenthetical citation