Ex Parte NEMATI ANARAKI et alDownload PDFPatent Trial and Appeal BoardDec 19, 201815132143 (P.T.A.B. Dec. 19, 2018) Copy Citation UNITED STA TES p A TENT AND TRADEMARK OFFICE APPLICATION NO. FILING DATE 15/132,143 04/18/2016 128298 7590 12/21/2018 Morgan, Lewis & Bockius LLP (WD/HGST) 600 Anton Boulevard, Suite 1800 Costa Mesa, CA 92626 FIRST NAMED INVENTOR Majid NEMATI ANARAKI UNITED STATES DEPARTMENT OF COMMERCE United States Patent and Trademark Office Address: COMMISSIONER FOR PATENTS P.O. Box 1450 Alexandria, Virginia 22313-1450 www .uspto.gov ATTORNEY DOCKET NO. CONFIRMATION NO. 12203-5244 9134 EXAMINER BRITT, CYNTHIA H ART UNIT PAPER NUMBER 2111 NOTIFICATION DATE DELIVERY MODE 12/21/2018 ELECTRONIC Please find below and/or attached an Office communication concerning this application or proceeding. The time period for reply, if any, is set in the attached communication. Notice of the Office communication was sent electronically on above-indicated "Notification Date" to the following e-mail address(es): OCIPDocketing@morganlewis.com PTOL-90A (Rev. 04/07) UNITED STATES PATENT AND TRADEMARK OFFICE BEFORE THE PATENT TRIAL AND APPEAL BOARD Ex parte MAJID NEMATI ANARAKI, XINDE HU, and RICHARD DAVID BARNDT Appeal2018-005672 Application 15/132,143 Technology Center 2100 Before CARLA M. KRIVAK, HUNG H. BUI, and JON M. JURGOV AN, Administrative Patent Judges. KRIVAK, Administrative Patent Judge. DECISION ON APPEAL Appellants 1 appeal under 35 U.S.C. § 134(a) from a Final Rejection of claims 1-20, which are all the claims pending in the application. We have jurisdiction under 35 U.S.C. § 6(b). We reverse. 1 The Appeal Brief identifies HGST Technologies Santa Ana, Inc. as the real party in interest (App. Br. 4). Appeal2018-005672 Application 15/132,143 STATEMENT OF THE CASE Appellants' invention is directed to a decoder and decoding method for performing error correction with a "reduced complexity non-binary LDPC [(low density parity check)] decoding algorithm" that reduces the required memory to store messages between check and variable nodes and "outperforms extended min-sum (EMS) algorithms and the equivalent binary LDPC codes" (Spec. ,r,r 2, 7; Title ( capitalization altered)). Claims 1 and 14 are independent. Independent claim 1, reproduced below, is exemplary of the subject matter on appeal. 1. A system, comprising: a data buffer; a decoder comprising decoding logic operational upon the data buffer to represent a plurality of variable nodes and a plurality of check nodes, the variable nodes being associated with a plurality of respective confidence vectors, the decoder configured to: provide, to respective check nodes according to a code graph, respective vector components of a first confidence vector of the plurality of confidence vectors; update the respective vector components based on respective return values provided by the respective check nodes according to the code graph, each of the respective return values being based on at least one vector component other than a vector component updated by the respective return value; determine a primary index of the first confidence vector based on respective values of the updated vector components; perform the provide, update, and determine steps for the plurality of confidence vectors; and determine at least a portion of a valid codeword based on determined indices of the plurality of confidence vectors. 2 Appeal2018-005672 Application 15/132,143 REJECTION The Examiner rejected claims 1-20 under 35 U.S.C. § 101 as directed to non-statutory subject matter. ANALYSIS In rejecting claims 1-20 under 35 U.S.C. § 101, the Examiner determines "the claims are directed to the abstract idea of decoding" and "organizing information through mathematical correlations" similar to the claims in RecogniCorp, Digitech, Electric Power Group, and CyberSource (Ans. 3, 6; Final Act. 5 (citing RecogniCorp, LLC v. Nintendo Co., 855 F.3d 1322 (Fed. Cir. 2017); Digitech Image Techs., LLC v. Elecs.for Imaging, Inc., 758 F.3d 1344 (Fed. Cir. 2014); Electric Power Grp., LLC v. Alstom S.A., 830 F.3d 1350 (Fed. Cir. 2016); CyberSource Corp. v. Retail Decisions, Inc., 654 F.3d 1366 (Fed. Cir. 2011))). The Examiner finds "the [ claimed] components including variable nodes, check nodes, code graph and vector components are not physical structures in a device" but rather "abstract math" and "mathematical calculations" (Ans. 4). Appellants argue claims 1 and 14 "are not directed to 'standard' encoding or decoding, or simply adding a mathematical equation" as the Examiner asserts; rather, the claims are directed to specific improvements to the way decoders operate, using "logical structures and processes that provide faster decoding computation and smaller memory requirements" (App. Br. 9-10, 13; Reply Br. 3). Appellants argue the claims recite technical operations that "enable a decoder to decode a codeword with reduced process complexity and reduced memory requirements that previously could not be achieved using conventional decoding" (App. Br. 3 Appeal2018-005672 Application 15/132,143 13-14). As such, Appellants argue the present claims are analogous to Enfish (App. Br. 10, 13 (citing Enfish, LLC v. Microsoft Corp., 822 F.3d 1327 (Fed. Cir. 2016)); Reply Br. 2-3). When considering whether the claims are directed to a patent ineligible concept, such as an abstract idea, "[t]he 'directed to' inquiry ... cannot simply ask whether the claims involve a patent-ineligible concept, because essentially every routinely patent-eligible claim involving physical products and actions involves a law of nature and/or natural phenomenon." See Enfish, 822 F.3d at 1335-36 (citing Mayo Collaborative Services v. Prometheus Laboratories, Inc., 566 U.S. 66, 70-71 (2012)). Rather, "the 'directed to' inquiry applies a stage-one filter to claims" considered in their entirety, in light of the Specification, to ascertain whether the claims' character as a whole is directed to excluded subject matter (id. ( citing Internet Patents Corp. v. Active Network, Inc., 790 F.3d 1343, 1346 (Fed. Cir. 2015))). Having reviewed the evidence, we do not agree with the Examiner's determination that the claims are directed to an "abstract idea of decoding" or "organizing information through mathematical correlations" (see Ans. 3, 6). Rather, we conclude the character of the claims as a whole is directed to an improved decoder and improved logical structures for error correction and decoding of signal bit streams, "thus not directed to an abstract idea" (App. Br. 9-10, 13; Reply Br. 3). See Enfish, 822 F.3d at 1335-36; McRO, Inc. v. Bandai Namco Games America Inc., 837 F.3d 1299, 1314 (Fed. Cir. 2016) (patent eligible method claims directed to an improvement in computer animation, not an abstract idea that merely invokes generic processes and machinery). 4 Appeal2018-005672 Application 15/132,143 Our conclusion is supported by Appellants' claims and Specification. Contrary to the Examiner's assertion that the claimed components "are not physical structures in a device" but rather "abstract math" and "mathematical calculations" (see Ans. 4), we note the claimed "variable nodes" designate data buffer locations "for storing each confidence vector associated with a symbol of ... [a] codeword" (see Spec. ,r,r 34, 36, 39). The claimed "confidence vectors" include "vector components," which may be a series of bits (see Spec. ,r,r 29-30). The value of each vector component provides an "indication as to whether the[] bits of the codeword are correct" and a "possibility for an individual state of a memory cell" (see Spec. ,r,r 27- 29). The claimed "primary index" of a confidence vector "determines the state of ... [a] memory cell" (see Spec. ,r,r 37, 39). The claimed providing, updating, and determining steps generate and update vector component values for confidence vectors stored in the data buffer during codeword decoding (see Spec. ,r 30). Appellants' claimed decoding technique updates confidence vectors by iterating the decoding process until the primary index ( a current state of a memory cell) stops changing, which indicates the codeword's bits (associated with a variable node that stores the primary index's confidence vector) have been decoded (see Spec. ,r,r 36-37, 45). That is, Appellants' invention provides faster decoding computation with smaller memory requirements by determining "at least a portion of a valid codeword based on determined indices of the plurality of confidence vectors," rather than passing and saving full LLR (log-likelihood ratio) vectors between the nodes for each edge of a code graph as "discussed in existing literature" (App. Br. 11-12 (citing Spec. ,r,r 7, 25, 35, 86-87, 95)). Receiver complexity (memory and computation) is reduced because the 5 Appeal2018-005672 Application 15/132,143 decoding operation of Appellants' invention requires only one vector component and one index to be saved and passed (in the decoder's memory) along iterations of the decoding process (see Spec. ,r,r 7, 35, 86, 95). Because we find the claims are directed to eligible subject matter, we need not reach step two of the test set forth in Alice Corp. Pty. Ltd. v. CLS Banklnt'l, 134 S. Ct. 2347, 2354 (2014). Enfzsh, 822 F.3d at 1339. Therefore, we do not sustain the Examiner's rejection of claims 1-20 under 35 U.S.C. § 101. DECISION The Examiner's decision rejecting claims 1-20 under 35 U.S.C. § 101 is reversed. REVERSED 6 Copy with citationCopy as parenthetical citation