Ex Parte Luk et al

Board of Patent Appeals and Interferences

Jun 18, 2012

10751714 (B.P.A.I. Jun. 18, 2012)

UNITED STATES PATENT AND TRADEMARK OFFICE
UNITED STATES DEPARTMENT OF COMMERCE
United States Patent and Trademark Office
Address: COMMISSIONER FOR PATENTS
P.O. Box 1450
Alexandria, Virginia 22313-1450
www.uspto.gov
APPLICATION NO. FILING DATE FIRST NAMED INVENTOR ATTORNEY DOCKET NO. CONFIRMATION NO.
10/751,714 01/05/2004 Wing K. Luk YOR920030603US1 2257
48062 7590 06/18/2012
RYAN, MASON & LEWIS, LLP
1300 POST ROAD
SUITE 205
FAIRFIELD, CT 06824
EXAMINER
MONDT, JOHANNES P
ART UNIT PAPER NUMBER
2894
MAIL DATE DELIVERY MODE
06/18/2012 PAPER
Please find below and/or attached an Office communication concerning this application or proceeding.
The time period for reply, if any, is set in the attached communication.
PTOL-90A (Rev. 04/07)
UNITED STATES PATENT AND TRADEMARK OFFICE
____________

BEFORE THE BOARD OF PATENT APPEALS
AND INTERFERENCES
____________

Ex parte WING K. LUK and ROBERT H. DENNARD
____________

Appeal 2010-005045
Application 10/751,714
Technology Center 2800
____________

Before MAHSHID D. SAADAT, KRISTEN L. DROESCH,
and MICHAEL J. STRAUSS, Administrative Patent Judges.

SAADAT, Administrative Patent Judge.

DECISION ON APPEAL

Appellants appeal under 35 U.S.C. § 134(a) from a final rejection of
claims 24-28, 36, and 37. Claims 1-23, 29-35, and 38-42 have been
canceled. We have jurisdiction under 35 U.S.C. § 6(b).
We reverse.

Appeal 2010-005045
Application 10/751,714

2
STATEMENT OF THE CASE
Appellants’ invention relates to methods of using amplifiers that
include gated diodes (see Spec. 2:14-21).
Exemplary independent claim 24 reads as follows:
24. A method for amplifying signals, the method
comprising the steps of:
determining that a voltage on a signal line is to be
amplified; and
modifying voltage on a control line, wherein the control
line is coupled to a second terminal of a two terminal
semiconductor device, the two terminal semiconductor device
having the second terminal and a first terminal, the first
terminal coupled to the signal line, the second terminal coupled
to the control line, wherein the two terminal semiconductor
device is adapted to have a capacitance when a voltage on the
first terminal is in a first voltage range and to have a lower
capacitance when the voltage on the first terminal is in a second
voltage range, wherein said first and second voltage ranges are
defined by a threshold voltage, and wherein the control line is
adapted to be coupled to a control signal and wherein the signal
line is adapted to be coupled to a signal and to be an output; and
wherein an isolation device is intermediate the signal line
and the two terminal semiconductor device, the isolation device
having an input, an output and a control terminal, the input of
the isolation device coupled to the signal line and the output of
the isolation device coupled to the first terminal, wherein the
output of the isolation device is adapted to be the output, and
wherein the method further comprises the step of applying a
control voltage to the control terminal of the isolation device,
the control voltage being greater than a threshold voltage of the
isolation device.

Claims 24-28, 36, and 37 stand rejected under 35 U.S.C. § 102(b) as
anticipated by Folmsbee (US 5,386,151).
Appeal 2010-005045
Application 10/751,714

3
ISSUE
Has the Examiner erred in rejecting the claims as anticipated by
Folmsbee because the reference fails to disclose all the recited features of
claim 24?

ANALYSIS
The Examiner reads the claimed “signal line” on the VDD and the
claimed “control line” on the signal ϕ’ of Folmsbee and finds that the MOS
capacitor 130 and the NMOS transistor 110 of Folmsbee meet the claimed
“two-terminal semiconductor device” and “isolation device,” respectively
(Ans. 3-5, see Folmsbee Fig. 1A). The Examiner further explains that the
voltage on the signal line to be amplified is shown at node 125 of Folmsbee
and the gate voltage of the transistor 110 meets the claimed control voltage
applied to the control terminal of the isolation device (Ans. 3-4).
Appellants contend that the NMOS transistor 110, which has its
source and gate terminals connected, does not meet the claimed “isolation
device having an input, an output and a control terminal” (App. Br. 4).
Additionally, Appellants point out that the signal line from VDD to node
125, which is considered by the Examiner to be the input to the isolation
device, is also shown to be connected to the gate of the isolation device and
results in an arrangement wherein the control voltage is connected to the
signal to be amplified (App. Br. 5-6).
1

1
We will not reach Appellants’ additional arguments as to whether VDD
provides a voltage on a signal line or whether MOS devices 130 and 110
form two or three-terminal devices because the arguments addressed below
are dispositive of the issue on appeal.
Appeal 2010-005045
Application 10/751,714

4
In response, the Examiner explains that the voltage at node 125 is not
the same as the gate voltage of the transistor 110 because:
The supposition by appellant that the voltage at node 125 and at
the gate of 110 are exactly the same neglects line resistance,
inductance and capacitance and hence its applicability depends
on signal time scales and particulars of the node-gate
connection as well as the properties of the gate itself, as known
in the electrical arts by those of ordinary skill.
(Ans. 8).
We agree with Appellants that the Examiner has not shown that
Folmsbee discloses the disputed claim limitations. Our review of Folmsbee
shows that the two-stage charge pump circuit shown in Figure 1A includes
MOS capacitor 120 and MOS transistor diode 110 as the first stage wherein
MOS capacitor 130 and MOS transistor diode 140 form the second stage
(col. 4, ll. 1-33). Folmsbee describes that the complementary clock inputs ϕ
and ϕ’ cause MOS transistor diodes 110 and 140 turn off and on which
results in charging up nodes 135 and Vout (see col. 4, ll. 34-48).
However, as argued by Appellants (Reply Br. 4), the Examiner’s
reading the claimed isolation device on the MOS transistor diode 110 of
Folmsbee requires the “control voltage” applied to the control terminal of
the isolation device to be the same as the signal to be amplified. In fact,
MOS transistor diode 110 is a part of the first stage of a two-stage charge
pump circuit and does not have the same components or function of the
claimed isolation device including “an input, an output and a control
terminal, the input of the isolation device coupled to the signal line and the
output of the isolation device coupled to the first terminal, wherein the
output of the isolation device is adapted to be the output,” as recited in claim
24.
Appeal 2010-005045
Application 10/751,714

5
CONCLUSION
On the record before us, we conclude that the Examiner erred in
rejecting claim 24 as anticipated by Folmsbee. Therefore, we do not sustain
the 35 U.S.C. § 102(b) rejection of claim 24, nor of claims 25-28, 36, and 37
dependent therefrom.

DECISION
The decision of the Examiner rejecting claims 24-28, 36, and 37 is
reversed.

REVERSED

ELD