Ex Parte Lichmanov

Patent Trial and Appeal Board

Mar 20, 2018

13332260 (P.T.A.B. Mar. 20, 2018)

UNITED STA TES p A TENT AND TRADEMARK OFFICE
APPLICATION NO. FILING DATE FIRST NAMED INVENTOR
13/332,260 12/20/2011 Yury Lichmanov
109712 7590 03/22/2018
Advanced Micro Devices, Inc.
c/o Davidson Sheehan LLP
8834 North Capital of TX Hwy
Suite 100
Austin, TX 78759
UNITED STATES DEPARTMENT OF COMMERCE
United States Patent and Trademark Office
Address: COMMISSIONER FOR PATENTS
P.O. Box 1450
Alexandria, Virginia 22313-1450
www .uspto.gov
ATTORNEY DOCKET NO. CONFIRMATION NO.
1458-110132 6092
EXAMINER
DOAN,HANV
ART UNIT PAPER NUMBER
2136
NOTIFICATION DATE DELIVERY MODE
03/22/2018 ELECTRONIC
Please find below and/or attached an Office communication concerning this application or proceeding.
The time period for reply, if any, is set in the attached communication.
Notice of the Office communication was sent electronically on above-indicated "Notification Date" to the
following e-mail address( es):
docketing@ds-patent.com
AMD@DS-patent.com
PTOL-90A (Rev. 04/07)
UNITED STATES PATENT AND TRADEMARK OFFICE
BEFORE THE PATENT TRIAL AND APPEAL BOARD
Ex parte YURY LICHMANOV
Appeal2017-008729
Application 13/332,260
Technology Center 2100
Before BRUCE R. WINSOR, JOSEPH P. LENTIVECH, and
KARA L. SZPONDOWSKI, Administrative Patent Judges.
SZPONDOWSKI, Administrative Patent Judge.
DECISION ON APPEAL
Appellant1 appeal under 35 U.S.C. § 134(a) from the Examiner's
Non-Final Rejection of claims 1, 3-5, 7-16, 18, 20-23, and25-28,
constituting all claims pending in the application. We have jurisdiction
under 35 U.S.C. § 6(b).
We AFFIRM.
1 Appellant identifies the real party in interest as ATI Technologies ULC.
Appeal2017-008729
Application 13/332,260
STATEMENT OF THE CASE
Appellant's invention is directed to techniques for caching data and
instructions in a common cache that can be accessed by multiple processing
units. Spec. ,-i 17. Claim 1, reproduced below, is representative of the
claimed subject matter:
1. A method, comprising:
designating a first portion of first data as shared data that is to
be accessed by both of two processing elements of a plurality of
processing elements;
in response to second data evicted from a first cache being at
least a part of the first portion of the first data, storing the first data at
a second cache shared by the two processing elements; and
in response to third data evicted from the first cache not being a
part of the first portion of the first data, providing the third data from
the first cache to a memory without storing the third data at the second
cache.
REJECTIONS
Claim 18 stands rejected under 35 U.S.C. § l 12(b) as indefinite.
Claims 1, 3-5, 10-12, 16, 18, 21-23, and 27 stand rejected under 35
U.S.C. § 103(a) as being unpatentable over the combination of Li et al. (US
2010/0153649 Al; published June 17, 2010) ("Li") and Nakamoto (US
6,253,290 Bl; issued June 26, 2001).
Claims 7, 13, and 26 stand rejected under 35 U.S.C. § 103(a) as being
unpatentable over the combination of Li, Nakamoto, and Carmean et al. (US
6,366,984B1; issued Apr. 2, 2002) ("Carmean").
2
Appeal2017-008729
Application 13/332,260
Claims 8, 14, 20, and 25 stand rejected under 35 U.S.C. § 103(a) as
being unpatentable over the combination of Li, Nakamoto, and Andrews et
al. (US 2006/0098022 Al; published May 11, 2006) ("Andrews").
Claims 9 and 15 stand rejected under 35 U.S.C. § 103(a) as being
unpatentable over the combination of Li, Nakamoto, and Emma et al. (US
2011 /0078412 A 1; published Mar. 31, 2011) ("Emma").
Claim 28 stands rejected under 35 U.S.C. § 103(a) as being
unpatentable over the combination of Li, Nakamoto, and Pelley et al. (US
2009/0196086 Al; published Aug. 6, 2009) ("Pelley").
ANALYSIS
35 U.S.C. § l l 2(b) Rejections
Appellant does not address the indefiniteness rejection of claim 18 in
the opening Appeal Brief, but acknowledges in the Reply Brief there is a
typographical error in the claim and "will address this clarity issue via
amendment." Reply Br. 2. Accordingly, we summarily sustain the 35
U.S.C. § l 12(b) rejection of claim 18.2
35 U.S.C. § 103 Rejections
Issue: Did the Examiner err in finding the combination of Li and
Nakamoto teaches or suggests "in response to second data evicted from a
first cache being at least a part of the first portion of the first data, storing the
first data at a second cache shared by the two processing elements" and "in
2 In the event of further prosecution, Appellant may want to review the
language in independent claim 1, particularly whether "storing the first data
at a second cache" should be rephrased as "storing the second data at a
second cache."
3
Appeal2017-008729
Application 13/332,260
response to third data evicted from the first cache not being a part of the first
portion of the first data, providing the third data from the first cache to a
memory without storing the third data at the second cache," as recited in
independent claim 1 and commensurately recited in independent claims 11,
18, and 21?
Appellant argues claims 1, 3-5, 7-16, 18, 20-23, and 25-28 as a
group. App. Br. 4, 5, 8, 9. We select claim 1 as representative of this group.
Dependent claims not argued separately fall with the respective independent
claim from which they depend. See 37 C.F.R. § 41.37(c)(l)(iv).
The Examiner relies on Li combined with Nakamoto to teach or
suggest the disputed limitations. Non-Final Act. 3--4 (citing Li ,-i,-i 48, 49;
Nakamoto, col. 7, 11. 64-67). Specifically, the Examiner relies on Nakamoto
to teach or suggest "storing the first data at a second cache shared by the two
processing elements" and "providing the third data from the first cache to a
memory without storing the third data at the second cache," and on Li to
teach or suggest the remaining limitations. Non-Final Act. 3--4.
Appellant argues "Nakamoto only teaches storing unshared data used
by a CPU at a local cache memory and is devoid of any teachings or
suggestions of evicting shared data or non-shared data from cache memory
to another cache or to a memory." App. Br. 6 (emphasis omitted).
According to Appellant, "transferring data from a CPU to external memory
as taught by Nakamoto is not the same as evicting data from a cache." App.
Br. 6. Appellant further argues "Nakamoto nowhere discloses that shared
and unshared data are treated differently when the data is evicted from the
cache" and "[i]nstead, Nakamoto only discloses that shared and unshared
4
Appeal2017-008729
Application 13/332,260
data are stored directly from the CPU to different portions of memory."
App. Br. 7 (emphasis omitted); see also Reply Br. 3.
We are not persuaded by Appellant's arguments. Li teaches using
shared cache memories for multicore processors. Li Abstract, ,-i 19. Li
discloses cache lines for storing shared data, cache lines for storing unshared
data, and eviction of both types of cache lines. Li ,-i,-i 28, 48, 49, 66.
Nakamoto teaches a multiprocessor system whereby a global shared bus is
connected to an external shared memory for storing shared information used
in common by the CPUs, and a global unshared bus is connected to an
external unshared memory for storing unshared information used by the
CPUs. Nakamoto, Abstract. Nakamoto discloses selection of an appropriate
bus depending on whether the instruction or access relates to shared data or
unshared data. Nakamoto, col. 7, 11. 15-24. Nakamoto further discloses
transferring unshared data from the CPU to an external unshared memory
and transferring shared data from the CPU to an external shared memory.
Nakamoto, col. 7, 11. 55-67, Figs. 1, 2.
Appellant's arguments address only the Nakamoto reference, when
the Examiner relies on Li, not Nakamoto, to teach or suggest evicting the
shared and unshared data from a cache. See Non-Final Act. 3--4. However,
nonobviousness "cannot be established by attacking references individually"
when the rejection is predicated upon a combination of prior art disclosures.
In re Merck & Co., 800 F.2d 1091, 1097 (Fed. Cir. 1986). As described
above, Nakamoto teaches treating data differently (transferring to a shared or
unshared memory) depending on whether the instruction or access relates to
shared or unshared data. See Nakamoto, col. 7, 11. 15-24, Figs. 1, 2. Li
teaches evicting (an instruction) shared and unshared data. Li ,-i,-i 48, 49.
5
Appeal2017-008729
Application 13/332,260
Appellant's arguments do not show error in the Examiner's reliance on the
combined teachings and suggestions. Moreover, Appellant has not
presented persuasive explanation or evidence to show that modifying Li with
the teachings in Nakamoto would have been "uniquely challenging or
difficult for one of ordinary skill in the art" or "represented an unobvious
step over the prior art." Leapfrog Enters., Inc. v. Fischer-Price, Inc., 485
F.3d 1157, 1162 (Fed. Cir. 2007).
Accordingly, we are not persuaded the Examiner erred. Therefore, we
sustain the Examiner's 35 U.S.C. § 103 rejections of claims 1, 3-5, 7-16,
18, 20-23, and 25-28.
DECISION
The Examiner's 35 U.S.C. § l 12(b) rejection of claim 18 is summarily
affirmed.
The Examiner's 35 U.S.C. § 103 rejections of claims 1, 3-5, 7-16, 18,
20-23, and 25-28 are affirmed.
No time period for taking any subsequent action in connection with
this appeal may be extended under 37 C.F.R. § l .136(a)(l )(iv).
AFFIRMED
6