Ex Parte Leonowich et al

Board of Patent Appeals and Interferences

Jun 1, 2009

10884932 (B.P.A.I. Jun. 1, 2009)

UNITED STATES PATENT AND TRADEMARK OFFICE
____________

BEFORE THE BOARD OF PATENT APPEALS
AND INTERFERENCES
____________

Ex parte ROBERT H. LEONOWICH and XIAOHONG QUAN
____________

Appeal 2009-001844
Application 10/884,932
Technology Center 2800
____________

Decided:1
____________

Before KENNETH W. HAIRSTON, JOHN A. JEFFERY,
and BRADLEY W. BAUMEISTER, Administrative Patent Judges.

JEFFERY, Administrative Patent Judge.

DECISION ON APPEAL

1 The two-month time period for filing an appeal or commencing a civil
action, as recited in 37 C.F.R. § 1.304, begins to run from the decided date
shown on this page of the decision. The time period does not run from the
Mail Date (paper delivery) or Notification Date (electronic delivery).
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Appellants appeal under 35 U.S.C. § 134(a) from the Examiner’s
rejection of claims 6, 8, 13, and 15. Claims 7 and 14 have been indicated as
containing allowable subject matter. (Br. 2.) We have jurisdiction under 35
U.S.C. § 6(b). We affirm.

STATEMENT OF THE CASE
Appellants invented a line driver circuit with an output impedance that
is set to a value that is based in part on the impedance of one or more current
sources of the driver circuit. As a result, the circuit’s output impedance
compensates for changes in impedance of the current sources.2 Claim 6 is
illustrative:
6. A line driver circuit of an integrated circuit (IC), comprising:

a first current source configured to operate in a triode region such that
it has a first impedance value when the first current source is active;

a first resistor connected in parallel with the first current source, the
first resistor having a first resistance value;

a second current source configured to operate in a triode region such
that it has a second impedance value when the second current source is
active;

current switching circuitry coupled to at least one of the first and
second current sources;

a second resistor connected in parallel with the second current source,
the second resistor having a second resistance value; and

a source termination resistor connected across output terminals of the
driver circuit, wherein the first and second resistance values and the source

2 See generally Abstract; Spec. ¶¶ 0011-13; Fig. 2.
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termination resistance value are set such that a combination of the first and
second impedances, the first and second resistors and the source termination
resistor provides the driver circuit with a desired output impedance.

The Examiner relies on the following as evidence of unpatentability:
Oguri US 6,194,920 B1 Feb. 27, 2001
Yamauchi US 6,356,141 B1 Mar. 12, 2002

The Examiner rejected claims 6, 8, 13, and 15 under 35 U.S.C.
§ 103(a) as unpatentable over Yamauchi and Oguri (Ans. 3-5).
Rather than repeat the arguments of Appellants or the Examiner, we
refer to the Brief and the Answer3 for their respective details. In this
decision, we have considered only those arguments actually made by
Appellants. Arguments which Appellants could have made but did not make
in the Brief have not been considered and are deemed to be waived. See 37
C.F.R. § 41.37(c)(1)(vii).

THE OBVIOUSNESS REJECTION
Regarding representative claim 6,4 the Examiner finds that Yamauchi
in Figures 9 and 10 discloses a line driver circuit with substantially all of the
recited subject matter including a “source termination resistor” Rt; (2) a first

3 Throughout this opinion, we refer to the Appeal Brief filed September 10,
2007 and the Examiner’s Answer mailed December 11, 2007.

4 Appellants argue claims 6 and 8 together as a group. See Br. 7-14.
Although Appellants nominally argue independent claim 13 separately (Br.
15-16), the arguments merely reiterate the same arguments made for claim 6.
See id. Moreover, dependent claim 15 was not separately argued. See id.
Accordingly, we group all appealed claims together and select claim 6 as
representative. See 37 C.F.R. § 41.37(c)(1)(vii).
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“current source” corresponding to one of transistors 11a-11c; and (3) a
second “current source” corresponding to one of transistors 14a-14c.
Although the Examiner notes that Yamauchi connects transistors 11 and 14
in parallel with these “current sources” 11a-11c and 14a-14c, the Examiner
acknowledges that Yamauchi fails to disclose resistors connected in parallel
with the current sources as claimed. The Examiner, however, relies on
Figures 6(a)-6(c) of Oguri for teaching that resistors and transistors are
recognized alternatives for current sources. In view of this recognized
equivalence, the Examiner takes the position that it would have been
obvious to replace the parallel-connected source transistors 11 and 14 in
Yamauchi’s circuit with resistors to simplify circuitry. (Ans. 3-5.)
Appellants argue that simply replacing transistors 11 and 14 with
resistors in Yamauchi as the Examiner proposes would prevent Yamauchi’s
device from operating for its intended purpose, namely maintaining output
currents Idp and Idn at approximately constant values. (Br. 11-13.)
Appellants add that Yamauchi already uses resistors in various circuits in the
reference, and if it were obvious to use resistors in lieu of transistors as the
Examiner contends, Yamauchi would have surely done so. (Br. 13.)
Appellants add that neither Yamauchi nor Oguri teaches selecting
circuit component values to obtain a desired output impedance as claimed.
(Br. 10, 11, and 14.)
The issues before us, then, are as follows:

ISSUES
Under § 103, have Appellants shown that the Examiner erred in
combining the teachings of Yamauchi and Oguri to arrive at the invention of
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representative claim 6? This main issue turns on the following pivotal
issues:
(1) Have Appellants shown that combining Oguri with Yamauchi as
the Examiner proposes would render Yamauchi unsatisfactory for its
intended purpose?
(2) Have Appellants shown that the Examiner erred in finding that
Yamauchi and Oguri collectively teach or suggest that (a) the identified
current source impedances; (b) their associated parallel-connected
resistances; and (c) the source termination resistor provide the driver circuit
with a desired output impedance as claimed?
(3) Is the Examiner’s reason to combine the teachings of these
references supported by articulated reasoning with some rational
underpinning to justify the Examiner’s obviousness conclusion?

FINDINGS OF FACT
The record supports the following findings of fact (FF) by a
preponderance of the evidence:
Yamauchi
1. Yamauchi discloses a circuit for outputting a constant current to a
twisted-pair cable 20 having a characteristic impedance Zo. In one
implementation, the system includes (1) a driver 10a; (2) a gate voltage
control circuit 30b; and (3) an activated transistor count control circuit 25
that together provide a constant current to the cable. (Yamauchi, col. 1, ll.
4-5; col. 6, ll. 35-40; Abstract; Fig. 9.) This circuit is shown in Figure 9
reproduced below:
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Reproduction of Figure 9 of Yamauchi Showing Driver 10a, Gate
Voltage Control Circuit 30b, Activated Transistor Count Control
Circuit 25, and Cable 20

2. Figure 10 details the driver 10a. As shown in that figure, the driver
includes four PMOS drive transistors 11, 11a, 11b, and 11c with source
electrodes coupled to the power supply Vdd and drain electrodes coupled
together. These transistors collectively form a PMOS driver 17 for directing
the current Idp into the cable via switching transistors 12 and 13. The driver
also includes four NMOS drive transistors 14, 14a, 14b, and 14c with source
electrodes coupled to the power supply Vss and drain electrodes coupled
together. These transistors collectively form an NMOS driver 18 for
drawing the current Idn from the cable via switching transistors 15 and 16.
(Yamauchi, col. 6, l. 49 − col. 7, l. 15; Fig. 10.) This internal configuration
of the driver 10a is shown in Figure 10 reproduced below:
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Reproduction of Figure 10 of Yamauchi Showing Internal
Configuration of Driver 10a

3. The gate electrode of the first PMOS drive transistor 11 receives
the infinitely-controlled gate voltage Vgp. The gate electrodes of the second
to fourth PMOS drive transistors 11a-11c,5 however, receive activation

5 Although Yamauchi refers to the second and fourth PMOS drive transistors
with the same numeral 11a (Yamauchi, col. 6, l. 60), we presume that
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logical signals Nap, Nbp, and Ncp, respectively. Similarly, the gate
electrode of the first NMOS drive transistor 14 receives the infinitely-
controlled gate voltage Vgn. The gate electrodes of the second to fourth
NMOS drive transistors 14a-14c, however, receive activation logical signals
Nan, Nbn, and Ncn, respectively. (Yamauchi, col. 6, ll. 57-62; col. 7, ll. 2-7;
Fig. 10.)
4. As shown in Figure 11, the gate voltage control circuit 30b
supplies voltage Vgp via PMOS transistor 31 with shorted drain and gate
electrodes. Similarly, the gate voltage control circuit 30b supplies voltage
Vgn via NMOS transistor 36 with shorted drain and gate electrodes.
(Yamauchi, col. 7, ll. 24-35; Fig. 11.) This configuration of the gate voltage
control circuit 30b is detailed in Figure 11 of Yamauchi reproduced below:

labeling the fourth PMOS drive transistor as “11a” is a typographical error
in light of Yamauchi’s nomenclature throughout the reference which labels
the fourth PMOS transistor as “11c.” See, e.g., col. 6, l. 51 (using “11c” to
indicate the fourth PMOS transistor); see also Fig. 10 (same).
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Reproduction of Figure 11 of Yamauchi Showing Internal
Configuration of Gate Voltage Control Circuit 30b

5. As shown in Figure 12, the activated transistor count control circuit
25 comprises a variable voltage generation circuit 80 that detects the cable
bias voltage Vm6 and generates variable voltages Vj and Vw that are
directed to comparators 111-113 and 114-116, respectively. Comparators
111-113 compare variable voltage Vj with voltages representing the
difference between the power supply voltage Vdd and the voltage drop of
resistors R1-R3 (i.e., Vdd − γap, Vdd − γbp, and Vdd − γcp). Based on this

6 The cable bias voltage Vm is obtained at the node between the termination
resistors Rt. See Yamauchi, Fig. 9. The value of the bias voltage Vm is
determined by equipment connected to the other end of the cable 20.
(Yamauchi, col. 3, ll. 28-30.)
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comparison, the activation logical signals Nap, Nbp, and Ncp are either high
or low. A similar comparison is performed utilizing comparators 114-116
that compare variable voltage Vw with voltages based on the voltage drops
of resistors R4-R6 (i.e., Vss + γan, Vss + γbn, and Vss + γcn) to determine
the state of activation logical signals Nan, Nbn, and Ncn. (Yamauchi, col. 7,
l. 36 − col. 8, l. 46; Fig. 12.) The configuration of activated transistor count
control circuit 25 is detailed in Figure 12 of Yamauchi reproduced below:

Reproduction of Figure 12 of Yamauchi Showing Configuration of
Activated Transistor Count Control Circuit 25

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Oguri
6. Oguri discloses a semiconductor circuit comprising a current
source 130 connected between a power supply and sources of PMOS
transistors 111 and 112. Another current source 230 is provided between
ground and the sources of NMOS transistors 221 and 222. (Oguri, col. 4, ll.
54-57; col. 5, ll. 17-20; Fig. 1.)
7. Figures 6(a) to 6(c) show different forms of a current source that
can be used for the current sources 130 and 230. Figure 6(a) shows a current
source 131 as a resistance element that is simple and small in construction,
but can nonetheless be influenced by power supply variations. (Oguri, col.
8, ll. 1-7; Figs. 6(a)-6(c).)
8. Figure 6(b) shows an NMOS transistor current source 132, and
Figure 6(c) shows a PMOS transistor current source 133. (Oguri, col. 8, ll.
8-15; Figs. 6(b)-6(c).).

PRINCIPLES OF LAW
In rejecting claims under 35 U.S.C. § 103, it is incumbent upon the
Examiner to establish a factual basis to support the legal conclusion of
obviousness. See In re Fine, 837 F.2d 1071, 1073 (Fed. Cir. 1988). In so
doing, the Examiner must make the factual determinations set forth in
Graham v. John Deere Co., 383 U.S. 1, 17 (1966) (noting that 35 U.S.C.
§ 103 leads to three basic factual inquiries: (1) the scope and content of the
prior art; (2) the differences between the prior art and the claims at issue;
and (3) the level of ordinary skill in the art). Furthermore, the Examiner’s
obviousness rejection must be based on
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“some articulated reasoning with some rational underpinning to
support the legal conclusion of obviousness” . . . . [H]owever,
the analysis need not seek out precise teachings directed to the
specific subject matter of the challenged claim, for a court can
take account of the inferences and creative steps that a person
of ordinary skill in the art would employ.

KSR Int’l Co. v. Teleflex, Inc., 550 U.S. 398, 418 (2007) (quoting In re
Kahn, 441 F.3d 977, 988 (Fed. Cir. 2006)).
If the Examiner’s burden is met, the burden then shifts to the
Appellants to overcome the prima facie case with argument and/or evidence.
Obviousness is then determined on the basis of the evidence as a whole and
the relative persuasiveness of the arguments. See In re Oetiker, 977 F.2d
1443, 1445 (Fed. Cir. 1992).
If the Examiner’s proposed modification renders the prior art
unsatisfactory for its intended purpose, the Examiner has failed to make a
prima facie case of obviousness. See In re Gordon, 733 F.2d 900, 902 (Fed.
Cir. 1984).

ANALYSIS
We begin by noting that Appellants do not dispute the Examiner’s
finding (Ans. 3) that one of transistors 11a-11c in Figure 10 of Yamauchi
corresponds to the recited “first current source,” and one of transistors
14a-14c corresponds to the recited “second current source.” See FF 2. Nor
do Appellants dispute that transistors 11 and 14 are connected in parallel to
these respective “current sources” as shown in Figure 10. See id.

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Rather, the dispute before us hinges on a crucial threshold question:
Would replacing Yamauchi’s transistors 11 and 14 with resistors as the
Examiner proposes render Yamauchi unsatisfactory for its intended purpose
of providing constant current? For the following reasons, we answer this
question “no.”
Although transistors 11 and 14 themselves could be considered
“resistors” given their inherent internal resistance7 (and therefore constitute
resistances in parallel with the current sources), we nonetheless see no error
in the Examiner’s proposed replacement of these transistors with resistors to
arrive at the invention of claim 6.
In reaching this conclusion, we note that Appellants admit that both
resistors and transistors can be used as current sources (Br. 11)—a fact
amply evidenced by Oguri. See FF 7 and 8. Appellants, however, take the
position that replacing transistors 11 and 14 with resistors would prevent
Yamauchi’s device from operating for its intended purpose and, in support
of this argument, detail the “fairly complex” operation of Yamauchi’s
activated transistor count control circuit 25. (Br. 11-13.) But as the
Examiner correctly indicates (Ans. 9), Yamauchi’s activated transistor count
control circuit 25 has nothing to do with controlling transistors 11 and 14,
but rather only controls transistors 11a to 11c and 14a to 14c. See FF 3-5.
Appellants’ arguments are therefore inapposite in this regard.
This distinction is apparent in Figure 10 where voltages Vgp and Vgn
are applied only to the gates of transistors 11 and 14, but not transistors 11a
to 11c and 14a to 14c. Rather, activation logical signals Nap, Nbp, and Ncp

7 See e.g., US 3,530,443, Abstract; figs. 1 and 2; col. 2, ll. 51–57 (noting that
transistors can function as resistors).
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are applied to transistors 11a to 11c, and activation logical signals Nan, Nbn,
and Ncn are applied to transistors 14a to 14c. See FF 2 and 3. These
respective control signals (i.e., voltages Vgp/Vgn and the activation logical
signals) are generated by different circuits, namely the gate voltage control
circuit 30b and the activated transistor count control circuit 25, respectively.
Compare FF 4 with FF 5.
As such, it is gate voltage control circuit 30b—not activated transistor
count control circuit 25—that controls transistors 11 and 14 by supplying
constant8 voltages Vgp and Vgn to transistors 11 and 14, respectively. See
FF 3 and 4. As such, we fail to see how the Examiner’s proposed
substitution would adversely affect the functionality of the activated
transistor count control circuit 25 since only the transistors (i.e., constant
current sources) controlled by the gate voltage control circuit 30b (i.e.,
transistors 11 and 14) would be replaced with suitable art-recognized
resistive equivalents (see FF 6-8) as the Examiner indicates (Ans. 10-11).
Because the other transistors 11a to 11c and 14a to 14c remain unaffected by
this proposed substitution, we agree with the Examiner that controlling these
transistors via the activation logical signals produced from the transistor
count control circuit 25 (FF 5) would likewise remain unaffected.
Although Oguri does indicate that resistors can be influenced by
power supply variations when used as current sources (FF 7), Appellants
have not shown that this drawback (or any other aspect of using resistors as
current sources) would destroy Yamauchi’s principle of operation of

8 It is undisputed that voltages Vgp and Vgn are constant. See, e.g., Br. 10
(noting that “the gate voltages Vgp and Vgn are kept constant); see also
Ans. 9 (same).
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providing constant current. Even assuming, without deciding, that resistive
current sources would not function as effectively as transistor current
sources in this application due to various factors (e.g., being influenced by
power supply variations, the need for additional switches, etc.), these
disadvantages alone are not dispositive, as resistive current sources also have
advantages. See FF 7 (noting that resistive current sources are simple and
small in construction). In short, weighing the relative advantages and
disadvantages of using resistors in lieu of transistors as current sources is
tantamount to an engineering decision based on well-known tradeoffs—an
engineering decision that is within the level of skilled artisans.
We are therefore not persuaded that replacing the transistors 11 and
14 with resistors as the Examiner proposes would destroy Yamauchi’s
principle of operation. To the contrary, we find the Examiner’s proposed
substitution tantamount to the predictable use of prior art elements according
to their established functions—an obvious improvement. See KSR, 550 U.S.
at 417. Although Yamauchi does not use resistors as current sources and
utilizes resistors for other purposes as Appellants contend (Br. 13), this fact
alone hardly negates their use as current sources in Yamauchi’s circuit in
lieu of transistors.
We also agree with the Examiner (Ans. 6-8) that Yamauchi and Oguri
collectively teach that (a) the identified current source impedances; (b) their
associated parallel-connected resistances; and (c) the source termination
resistor provide the driver circuit with a desired output impedance. See FF
1, 2, and 7. As the Examiner indicates (Ans. 6-7), nothing in the claim
precludes the design of the prior art circuit itself and its resulting output
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impedance value—an impedance that would constitute a “desired”
impedance value based on the selected components.
For the foregoing reasons, Appellants have not persuaded us of error
in the Examiner’s rejection of representative claim 6. Therefore, we will
sustain the Examiner’s rejection of that claim, and claims 8, 13, and 15
which fall with claim 6.

CONCLUSION
Appellants have not shown that the Examiner erred in rejecting claims
6, 8, 13, and 15 under § 103.

ORDER
The Examiner’s decision rejecting claims 6, 8, 13, and 15 is affirmed.
No time period for taking any subsequent action in connection with
this appeal may be extended under 37 C.F.R. § 1.136(a)(1)(iv).

AFFIRMED

pgc

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