Ex Parte Lahti et al

Patent Trial and Appeal Board

Jun 22, 2017

12560688 (P.T.A.B. Jun. 22, 2017)

United States Patent and Trademark Office
UNITED STATES DEPARTMENT OF COMMERCE
United States Patent and Trademark Office
Address: COMMISSIONER FOR PATENTS
P.O.Box 1450
Alexandria, Virginia 22313-1450
www.uspto.gov
APPLICATION NO. FILING DATE FIRST NAMED INVENTOR ATTORNEY DOCKET NO. CONFIRMATION NO.
12/560,688 09/16/2009 Gregg Lahti 68354.118215 1851
86528 7590 06/26/2017
Slay den Grubert Beard PLLC
401 Congress Avenue
Suite 1900
Austin, TX 78701
EXAMINER
DALEY, CHRISTOPHER ANTHONY
ART UNIT PAPER NUMBER
2184
NOTIFICATION DATE DELIVERY MODE
06/26/2017 ELECTRONIC
Please find below and/or attached an Office communication concerning this application or proceeding.
The time period for reply, if any, is set in the attached communication.
Notice of the Office communication was sent electronically on above-indicated "Notification Date" to the
following e-mail address(es):
trosson @ sgbfirm.com
patent @ sgbfirm. com
dallen @ sgbfirm. com
PTOL-90A (Rev. 04/07)
UNITED STATES PATENT AND TRADEMARK OFFICE
BEFORE THE PATENT TRIAL AND APPEAL BOARD
Ex parte GREGG LAHTI and STEVEN DAWSON
Appeal 2017-004850
Application 12/560,6881
Technology Center 2100
Before: LINZY T. McCARTNEY, NATHAN A. ENGELS, and
JAMES W. DEJMEK, Administrative Patent Judges.
DEJMEK, Administrative Patent Judge.
DECISION ON APPEAL
Appellants appeal under 35 U.S.C. § 134(a) from a Non-Final
Rejection of claims 1—31. We have jurisdiction over the pending claims
under 35 U.S.C. § 6(b). See Ex parte Lemoine, 46 USPQ2d 1420, 1423
(BPAI 1994) (precedential).
We reverse.
1 Appellants identify Microchip Technology Incorporated as the real party
interest. App. Br. 2.
Appeal 2017-004850
Application 12/560,688
STATEMENT OF THE CASE
Introduction
Appellants’ claimed invention is directed to “an improved
combination of a microcontroller and a programmable logic device
integrated in a single chip.” Spec. 14. In disclosed embodiments, the
programmable logic device may be programmed by the CPU or by the CPU
via special function registers. Spec. H 9, 21.
Claim 14 is illustrative of the subject matter on appeal and is
reproduced below with the disputed limitation emphasized in italics'.
14. A microcontroller comprising:
a central processing unit (CPU);
a programmable logic device having a matrix receiving a
plurality of input signals from associated external pins of the
microcontroller, wherein said matrix comprises a first plurality of
programmable logic cells coupled with external input/outputs pins of
said microcontroller and at least one second programmable logic cell
coupled with said matrix and with an interrupt input of said CPU,
wherein the programmable logic device is programmable to perform at
least one logic function by at least one of said first plurality of
programmable logic cells on at least one of the input signals received
at an associated external pin and generate a corresponding logic output
signal at one of the input/output pins, and wherein the CPU is operable
to program said programmable logic device via special function
registers.
The Examiner’s Rejections
1. Claims 14 and 19-21 stand rejected under 35 U.S.C. § 102(b)
as being anticipated by May et al. (US 2006/0186917 Al; Aug. 24, 2006)
(“May”). Non-Final Act. 3^4.
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Application 12/560,688
2. Claims 1, 2, 6—13, 15—18, 22—24, and 28—30 stand rejected
under 35 U.S.C. § 103(a) as being unpatentable over May and Steele et al.
(US 5,386,155; Jan. 31, 1995) (“Steele”).2 3Non-Final Act. 5-13.
3. Claims 3 and 25 stand rejected under 35 U.S.C. § 103(a) as
being unpatentable over May, Steele, and Francis (US 2005/0010707 Al;
Jan. 13,2005). Non-Final Act. 14.
4. Claims 4, 5, 26, and 27 stand rejected under 35 U.S.C. § 103(a)
as being unpatentable over May, Steele, and Cho (KR 2004006762 A;
Jan. 24, 2004). Non-Final Act. 14—15.
5. Claim 31 stands rejected under 35 U.S.C. § 103(a) as being
unpatentable over May and Sullam et al. (US 8,135,884 Bl; Mar. 13, 2012)
(“Sullam”). Non-Final Act. 15—17.
Issue on AppeaP
Did the Examiner err in finding May discloses “the CPU is operable
to program said programmable logic device via special function register,” as
recited in claim 14?
2 The Non-Final Office Action does not list claims 13, 23, 24, and 30 in the
statements of rejection but nonetheless addresses these claims in the body of
the rejection over May and Steele. Non-Final Act. 5—7, 9—11. Accordingly,
we consider claims 13, 23, 24, and 30 to stand rejected under 35 U.S.C.
§ 103(a) as unpatentable over May and Steele. Appellants do not assert any
prejudice as a result of this discrepancy. Thus, we treat this irregularity in
the record as harmless.
3 We only address this issue, which is dispositive. We do not address
additional issues raised by Appellants’ arguments.
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Appeal 2017-004850
Application 12/560,688
ANALYSIS4
The Examiner finds, inter alia, May discloses a microcontroller
comprising a central processing unit (CPU) and a programmable logic
device wherein the CPU is operable to program the programmable logic
device via special function registers. Final Act. 3^4 (citing May Tflf 32, 36,
47, Figs. 4, 6). Figure 6 of May is illustrative and is reproduced below:
400
401
FIG. 6
4 Throughout this Decision, we have considered the Appeal Brief, filed
August 24, 2016 (“App. Br.”); the Reply Brief, filed January 3, 2017
(“Reply Br.”); the Examiner’s Answer, mailed October 31, 2016 (“Ans.”);
and the Non-Final Office Action, mailed April 4, 2016 (“Non-Final Act.”),
from which this Appeal is taken.
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Application 12/560,688
Figure 6 of May illustrates a diagram of a chip comprising embedded
logic, a programmable logic device and shared I/O (input/output) circuitry.
May 114. The embedded logic may also be referred to as the embedded
processor portion (401) and includes a processor (405) and associated
memory and logic circuits. May H 32, 36. “The processor core may have a
JTAG/debug external interface.” May 132. May further discloses the
embedded processor portion (401) and programmable logic portion (402)
can each access I/O pins and associated circuitry in shared I/O portion (404).
May 136.
Appellants argue the Examiner erred in finding May discloses a CPU
configured to program a programmable logic device via special function
registers. App. Br. 6—7; see also Reply Br. 3—5. In particular, Appellants
assert May does not disclose how the programmable logic device (402) is
programmed at all. App. Br. 6. Rather, Appellants assert the programmable
logic device is programmed not by the CPU via special function registers,
but rather through an external configuration device. App. Br. 7.5
In response, the Examiner indicates Appellants have not provided a
limiting or narrowing definition of “programming” as claimed and, referring
to Appellants’ Specification, the various ways of storing configuration
information “do[] not preclude the programming of the macro cells by
May.” Ans. 18—19 (citing Spec. 125). Additionally, the Examiner finds
May describes the operation of the processor to include programming of
5 Appellants indicate support for this position is based on APEX20K
Programmable Logic Device Family Data Sheet (November 1999),
incorporated by reference by May. May 131. We note, however,
Appellants appear to rely instead on Configuration Devices for APEX &
FLEX Devices Data Sheet, ver. 10.03 (November 1999).
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Application 12/560,688
internal functions—including programming of the programmable logic
device. Ans. 19 (citing May 120).
“A claim is anticipated only if each and every element as set forth in
the claim is found, either expressly or inherently described, in a single prior
art reference.” Verdegaal Bros., Inc. v. Union Oil Co. of Cal., 814 F.2d 628,
631 (Fed. Cir. 1987). Additionally, to anticipate, a prior art reference must
disclose more than “multiple, distinct teachings that the artisan might
somehow combine to achieve the claimed invention.” Net Money IN, Inc. v.
VeriSign, Inc., 545 F.3d 1359, 1371 (Fed. Cir. 2008); see also In reArkley,
455 F.2d 586, 587 (CCPA 1972) (“[T]he [prior art] reference must clearly
and unequivocally disclose the claimed [invention] or direct those skilled in
the art to the [invention] without any need for picking, choosing, and
combining various disclosures not directly related to each other by the
teachings of the cited reference.”).
We agree with the Examiner that May discloses an integrated chip
(i.e., the claimed microcontroller) comprising a CPU and a programmable
logic device. May ^fl[ 32, 36, and Fig. 6. Further, May discloses the use of
shared I/O pins and circuitry between the CPU and programmable logic
device. May 136, Fig. 6. However, we find the Examiner has not provided
sufficient persuasive evidence or technical reasoning to support the finding
that May discloses the CPU is operable to program the programmable logic
device—particularly via special function registers. Although May discloses
the programmable logic device “is programmed to implement the logical
functions necessary to carry on its particular role in system operation,” it is
not clear how such programming is achieved. See May 120. Thus, the
Examiner has not demonstrated with sufficient evidence or explanation that
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Application 12/560,688
May’s CPU is operable to program the programmable logic device, let alone
program the programmable logic device via special function registers.
Further, the Examiner has not relied on, or cited any disclosures from Steele,
Francis, Cho, and/or Sullam to cure these deficiencies. See Non-Final
Act. 5—16. We decline to resort to impermissible speculation or unfounded
assumptions or rationales to cure the deficiencies in the factual bases of the
rejection before us. In re Warner, 379 F.2d 1011, 1017 (CCPA 1967).
For the reasons discussed supra, and constrained by the record before
us, we do not sustain the Examiner’s rejection of independent claim 14. For
similar reasons, we do not sustain the Examiner’s rejection of independent
claims 1, 23, and 31, which recite similar limitations. Additionally, we do
not sustain the rejection of claims 2—13, 15—22, and 24—30, which depend
therefrom.
DECISION
We reverse the Examiner’s decision rejecting claims 1—31.
REVERSED
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