Ex Parte Kuo et alDownload PDFPatent Trial and Appeal BoardSep 25, 201312169142 (P.T.A.B. Sep. 25, 2013) Copy Citation UNITED STATES PATENT AND TRADEMARKOFFICE UNITED STATES DEPARTMENT OF COMMERCE United States Patent and Trademark Office Address: COMMISSIONER FOR PATENTS P.O. Box 1450 Alexandria, Virginia 22313-1450 www.uspto.gov APPLICATION NO. FILING DATE FIRST NAMED INVENTOR ATTORNEY DOCKET NO. CONFIRMATION NO. 12/169,142 07/08/2008 Ming-Chang Kuo JCLA17260-CA 8746 23900 7590 09/26/2013 J C PATENTS 4 VENTURE, SUITE 250 IRVINE, CA 92618 EXAMINER NGUYEN, DAO H ART UNIT PAPER NUMBER 2818 MAIL DATE DELIVERY MODE 09/26/2013 PAPER Please find below and/or attached an Office communication concerning this application or proceeding. The time period for reply, if any, is set in the attached communication. PTOL-90A (Rev. 04/07) UNITED STATES PATENT AND TRADEMARK OFFICE ____________ BEFORE THE PATENT TRIAL AND APPEAL BOARD ____________ Ex parte MING-CHANG KUO and CHAO-I WU ____________ Appeal 2011-002310 Application 12/169,142 Technology Center 2800 ____________ Before ADRIENE LEPIANE HANLON, PETER F. KRATZ, and JO-ANNE M. KOKOSKI, Administrative Patent Judges. KOKOSKI, Administrative Patent Judge. DECISION ON APPEAL Appeal 2011-002310 Application 12/169,142 2 STATEMENT OF THE CASE Appellants1 seek review, under 35 U.S.C. § 134(a), of the final rejection of claims 1-12. Claim 13-19 have been cancelled. We have jurisdiction over this appeal under 35 U.S.C. § 6(b). We REVERSE. CLAIMED SUBJECT MATTER Appellants’ invention relates to a method of programming a semiconductor device. Claim 1 is representative of the subject matter on appeal, and recites: 1. A method of programming a semiconductor device comprising a gate and a substrate, a charge storage element disposed between the gate and the substrate, a source region and a drain region disposed in the substrate, wherein the charge storage element comprises a non-data auxiliary charge region and a data storage region, wherein the non-data auxiliary charge region is filled with a amount of charges, the programming method comprising: providing a first voltage to the gate and a second voltage to the substrate to generate a first electric field; and providing a third voltage to the source region, and a fourth voltage the drain region to generate a second electrical field, wherein the first and the second electrical fields drive a plurality of charges to the data storage region. REJECTIONS The following grounds of rejection are before us on appeal: 1 The Appeal Brief identifies Ming-Chang Kuo, Chao-I Wu and Macronix International Co., Ltd. as the real parties in interest. App. Br. 1. Appeal 2011-002310 Application 12/169,142 3 Claims 1-12 are rejected under 35 U.S.C. § 102(e) as being anticipated by Lue et al. (US 2007/0081393 A1, published April 12, 2007). Claims 1-12 are rejected under 35 U.S.C. § 102(b) as being anticipated by Sobek et al. (U.S. 6,456,536 B1, issued September 24, 2002). ISSUES Did the Examiner reversibly err in concluding that the disclosures in Lue anticipate claims 1-12? Did the Examiner reversibly err in concluding that the disclosures in Sobek anticipate claims 1-12? ANALYSIS The rejection of claims 1-12 as anticipated by Lue In order for the Examiner to carry the burden to establish a prima facie case of anticipation, the Examiner must establish where each and every element of the claimed invention, arranged as required by the claim, is found in a single prior art reference, either expressly or under the principles of inherency. See In re Schreiber, 128 F.3d 1473, 1477 (Fed. Cir. 1997). Lue discloses a method of programming a semiconductor device. One example of a semiconductor device that can be used in the disclosed method is set forth in Figure 3, which is reproduced below: App App Figu semi inclu chan betw char local that “loca and r 315 12. eal 2011-0 lication 12 re 3 is a bl conductor des a first nel termin een chann ge storage ized charg overlies th lized char egion 315 for storage The Exa Ans. 4-6. 02310 /169,142 ock diagra device dis channel te al 302 tha el termina structure t e trapping e channel ge trappin for a sing at multip miner find The Exam m that illu closed in rminal 30 t acts as a ls 301 and hat compr structure region. Lu g results in le charge s le charge s s that Lue iner notes 4 strates a m Lue. Figu 1 that acts drain or so 302. A g ises a first 311, and a e [0035]. storage o torage reg torage reg discloses that “in th emory ce re 3 shows as a drain urce, and ate structu dielectric second di Lue furth f charge in ion, and in ions per ce all of the e e Lue inve ll structure a substrat or source, a channel re 303 ove layer 310, electric lay er disclos one of re both regi ll.” Id. [0 lements o ntion, the in a e 300 that a second region rlies a a er 312 es that gion 305 ons 305, 038]. f claims 1- first Appeal 2011-002310 Application 12/169,142 5 charge region 315 is expressed as a data charge region, instead of a non-data auxiliary region as claimed.” Ans. 9. The Examiner concludes that, because the claims are directed to “a method of programming a semiconductor device, NOT the structure of the semiconductor device, whether the first charge region 315 stores a data charge or a non-data charge, the programming method would not be affected because it is just simply an electrical charge to be stored in such a region.” Id. Appellants respond that, even though “the instantly claimed invention is directed to a method of programming a semiconductor, the structure of the semiconductor device is necessary to give life, meaning, and vitality to claim 1.” Reply Br. 5. According to Appellants, “the ‘non-data’ auxiliary charge region is a region unable to store a data, and the charges are only driven to the data storage region during programming.” App. Br. 4. On this record, we agree with Appellants that the Examiner has not carried the burden to establish that Lue describes a method of programming a semiconductor upon which claim 1 reads. The preamble of claim 1, which sets forth the structure of the semiconductor device to which the claimed method of programming is directed, recites limitations of the claim. “Whether to treat a preamble as a limitation is a determination ‘resolved only on review of the entire[] … patent to gain an understanding of what the inventors actually invented and intended to encompass by the claim.’” Catalina Mktg. Int’l, Inc. v. Coolsavings.com, Inc., 289 F.3d 801, 808 (Fed. Cir. 2002) (quoting Corning Glass Works v. Sumitomo Elec. U.S.A., Inc., 868 F.2d 1251, 1257 (Fed. Cir. 1989)). “In general, a preamble limits the invention if it recites essential structure or steps, or if it is ‘necessary to give life, meaning, and vitality’ to the claim.” Id. (quoting Pitney Bows, Inc. v. App App Hew the s claim is se Figu acco Spec eal 2011-0 lication 12 lett-Packa tructure of 1 is essen t forth belo re 1 is a sc rding to on ification s [i]n the m to the pr charge r operatio charge r injection operatio to the sh region 1 can have region 1 of electr trapping 02310 /169,142 rd Co., 18 the semic tial to the w: hematic cr e embodi tates that ethod of esent inve egion 104a n. The me egion 104a , for exam n, the volta ielding eff 04a. As a an abrupt 04a and da ons into th layer 104 2 F.3d 129 onductor d claimed m oss-sectio ment of th operating ntion, elec before pr thod of inj includes ple. Henc ge applied ect by the result, the electrical ta storage e data stor . 6 8, 1305 (F evice to b ethod. Fi nal view o e claimed a non-vola trons are i oceeding w ecting ele performing e, in an ac to the ga charges w substrate field betw 104b that age region ed. Cir. 1 e program gure 1 fro f a non-vo invention. tile memo njected int ith the pr ctrons into a channe tual progr te 102 wil ithin the a 100 under een auxili facilitates 104b of t 999)). In t med as re m the Spe latile mem Spec. [00 ry accordi o the auxi ogrammin the auxili l hot elect amming l be subjec uxiliary ch the gate 1 ary charge the injecti he charge- his case, cited in cification ory 25]. The ng liary g ary ron ted arge 02 on Appeal 2011-002310 Application 12/169,142 7 Id.at [0032]. The Specification further explains that the “abrupt electrical field between auxiliary charge region and data storage region” enhances the programming efficiency of the memory. Id. at [0007]. Additionally, according to the Specification, because “the present invention utilizes channel initiated secondary hot electron injection effect to perform the programming operation, and the memory cell also has abrupt electrical field between auxiliary charge region, the programming voltage and current can be reduced significantly and the programming efficiency is increased.” Id. [0034]. Therefore, the non-data auxiliary charge region that is filled with an amount of charge (as set forth in the preamble) is essential to performing the claimed method. In finding that, with respect to the disclosures in Lue, “whether the first charge region 315 stores a data charge or a non-data charge, the programming method would not be affected because it is the same charge to be stored in such region”, the Examiner did not give appropriate patentable weight to the “non-data auxiliary charge region” recited in the preamble of claim 1. Ans. 5. The Examiner’s conclusion that a non-data charge is interchangeable with a data charge for purposes of the claimed invention renders the claim term “non-data” meaningless. Claims are construed with an eye toward giving effect to all terms in the claim. Eicon Inc. v. Straumann Co., 441 F.3d 945, 950 (Fed. Cir. 2006); see also Stumbo v. Eastman Outdoors, Inc., 508 F.3d 1358, 1362 (Fed. Cir. 2007) (denouncing claim constructions that render phrases in claims superfluous). According to Appellants, “the ‘non-data’ auxiliary charge region is a region unable to store a data, and the charges are driven to the data storage region during programming.” App. Br. 4. The Examiner does not identify a App App char regio amou there reaso depe wher with regio 2 in devi Figu acco 45. eal 2011-0 lication 12 ge region t n” that is nt of char fore has n ns, we rev nd therefr Th Sobek d e the semi a channel n that con Sobek, set ce: re 2 is a se rdance wit Sobek disc 02310 /169,142 hat is unab fixed as a ges) amon ot establis erse the E om, as anti e rejection iscloses a m conductor in betwee tains a firs forth belo ctional vie h an embo loses a sem le to store non-data a g the prog hed a prim xaminer’s cipated by of claims ethod of device inc n, a gate ab t amount o w, is an ill w of a tw diment of iconduct 8 data (a “n uxiliary ch ramming a facie ca rejection Lue. 1-12 as a programm ludes a fir ove the c f charge. ustration o o-bit mem the Sobek or device w on-data au arge regio method di se of antic of claim 1 nticipated ing a sem st region a hannel, an Sobek co f the disc ory cell co invention ith a sub xiliary ch n and fille sclosures i ipation. F , and claim by Sobek iconductor nd a seco d a charge l. 2, ll. 15- losed semi nstructed . Id. at co strate 12, a arge d with an n Lue, and or these s 2-12 tha device, nd region trapping 25. Figure conductor in l. 2, ll. 42- drain t Appeal 2011-002310 Application 12/169,142 9 region 16, a source region 14, a gate 24, and a charge trapping layer 20 that can store two bits of data—a right bit in dashed circle 23 and a left bit in dashed circle 21. Id. at col. 4, l. 38 – col. 5, l. 19. The Examiner finds that Sobek discloses all of the elements of claims 1-12. Ans. 6-7. The Examiner notes that “in the invention of Sobek, the first charge region 21 is a data storage region instead of a non-data auxiliary charge region.” Id. at 7. The Examiner concludes that the programming method would not be affected by the storage of a data charge instead of a non-data charge because the “influence of such charge to the operation of the device, or more specifically, to the method of storing the data charge to the second charge region 23, is the same regardless of whether that charge is used as a data charge or not.” Id. at 7, 11-12. Appellants respond, as they did with respect to the Examiner’s rejection over Lue, that even though “the instantly claimed invention is directed to a method of programming a semiconductor, the structure of the semiconductor device is necessary to give life, meaning, and vitality to claim 1.” Reply Br. 8. As is set forth above, claim 1 requires that the semiconductor device to be programmed by the claimed method include a “non-data auxiliary charge region.” The Examiner does not identify a charge region that is unable to store data (a “non-data auxiliary charge region”) among the disclosures in Sobek, and therefore has not established a prima facie case of anticipation. For these reasons, we reverse the Examiner’s rejection of claim 1, and claims 2-12 that depend therefrom, as anticipated by Sobek. Appeal 2011-002310 Application 12/169,142 10 CONCLUSION The rejection of claims 1-12 under 35 U.S.C. § 102(e) as being anticipated by Lue is reversed. The rejection of claims 1-12 under 35 U.S.C. § 102(a) as being anticipated by Sobek is reversed. DECISION The decision of the Examiner is REVERSED. REVERSED cam Copy with citationCopy as parenthetical citation