Ex Parte Koyama et al

Patent Trial and Appeal Board

Apr 28, 2017

12606340 (P.T.A.B. Apr. 28, 2017)

United States Patent and Trademark Office
UNITED STATES DEPARTMENT OF COMMERCE
United States Patent and Trademark Office
Address: COMMISSIONER FOR PATENTS
P.O.Box 1450
Alexandria, Virginia 22313-1450
www.uspto.gov
APPLICATION NO. FILING DATE FIRST NAMED INVENTOR ATTORNEY DOCKET NO. CONFIRMATION NO.
12/606,340 10/27/2009 Jun KOYAMA 0756-8689 2581
31780 7590 05/02/2017
Robinson Intellectual Property Law Office, P.C.
3975 Fair Ridge Drive
Suite 20 North
Fairfax, VA 22033
EXAMINER
NGO, TONY N
ART UNIT PAPER NUMBER
2622
NOTIFICATION DATE DELIVERY MODE
05/02/2017 ELECTRONIC
Please find below and/or attached an Office communication concerning this application or proceeding.
The time period for reply, if any, is set in the attached communication.
Notice of the Office communication was sent electronically on above-indicated "Notification Date" to the
following e-mail address(es):
ptomail @ riplo .com
PTOL-90A (Rev. 04/07)
UNITED STATES PATENT AND TRADEMARK OFFICE
BEFORE THE PATENT TRIAL AND APPEAL BOARD
Ex parte JUN KOYAMA and SHUNPEI YAMAZAKI
Appeal 2015-006094
Application 12/606,340
Technology Center 2600
Before JEAN R. HOMERE, ST. JOHN COURTENAY III, and
SCOTT E. BAIN, Administrative Patent Judges.
COURTENAY, Administrative Patent Judge.
DECISION ON APPEAL
This is an appeal under 35 U.S.C. § 134(a) from the Examiner’s Final
Rejection of claims 1, 2, 4—8, 10-13, 15—17, and 19-21, which are all the
claims pending in this application.1 Claims 3, 9, 14, and 18 are cancelled.
Claims App’x. We have jurisdiction under 35 U.S.C. § 6(b). An oral
hearing was conducted on April 20, 2017.
We reverse.
1 We refer to the Final Office Action, mailed June 4, 2014.
Appeal 2015-006094
Application 12/606,340
STATEMENT OF THE CASE
Invention
The disclosed and claimed invention on appeal “relates to a driver
circuit using an oxide semiconductor, a manufacturing method thereof, a
display device provided with the driver circuit, and an electronic device
provided with the display device.” (Spec. 11).
Claim 1, reproduced below, is illustrative of the claimed subject
matter:
1. A driver circuit comprising:
an inverter circuit including a first enhancement transistor
and a second enhancement transistor;
[LI] a silicon oxide film including an OH group over and
in contact with a first oxide semiconductor film of the first
enhancement transistor and a second oxide semiconductor film
of the second enhancement transistor; and
[L2] a silicon nitride film over and in contact with the
silicon oxide film, wherein each of the first enhancement
transistor and the second enhancement transistor is a bottom-gate
transistor,
wherein the first oxide semiconductor film includes a
channel formation region of the first enhancement transistor, and
wherein the second oxide semiconductor film includes a
second channel formation region of the second enhancement
transistor.
(Bracketed lettering and emphasis added regarding contested limitations LI
and L2).
Rejection
Claims 1,2, 4—8, 10-13, 15—17, and 19-21 are rejected under 35
U.S.C. § 103(a) as being unpatentable over Fujimoto et al. (US
2005/0082539 Al; publ. Apr. 21, 2005) (hereinafter “Fujimoto”), Lee et al.
2
Appeal 2015-006094
Application 12/606,340
(US 2008/0308795 Al; publ. Dec. 18, 2008) (hereinafter “Lee”), and CHOI
et al. (US 2008/0121872 Al; publ. May 29, 2008) (hereinafter “CHOI”).
ANALYSIS
Based upon our review of the record, we find the following issue is
dispositive in this appeal:
Issue: Under § 103(a), did the Examiner err by improperly combining
the cited Fujimoto, Lee, and CHOI references?
At the outset, after reviewing the record, we agree with the Examiner
that a broad but reasonable interpretation of contested limitations LI and L2
does not preclude a reading on the multiple cited disparate portions of the
Fujimoto, Lee, and CHOI references, as mapped by the Examiner. (Claim 1;
Final Act. 3—7).
However, our initial finding does not conclude our inquiry
regarding the Examiner’s legal conclusion of obviousness. As urged by
Appellants (App. Br. 14), “[t]he mere fact that references can be combined
or modified does not render the resultant combination obvious unless the
results would have been predictable to one of ordinary skill in the art.”
(Quoting MPEP § 2143.01 (III) (citing KSR Int 7 Co. v. Teleflex, Inc., 550
U.S. 417 (2007)).
Regarding the Examiner’s proffered combination of Fujimoto, Lee,
and CHOI, Appellants contend an artisan would not have been motivated to
combine the cited references for the reasons given by the Examiner (Final
Act. 7—8), and such combination would not have realized predictable results,
because, inter alia: (1) the Examiner’s “noted comparison and technique of
‘lithography’ (see pg. 6 of the Office Action) appears to have no correlation
with predictability or why an oxide semiconductor would be substituted.
3
Appeal 2015-006094
Application 12/606,340
There also appears to be no appreciation of any advantageous effect.” (App.
Br. 15), and (2) Lee’s paragraph 9 “teach[es] away” from the use of a
bottom gate transistor (App. Br. 16).
We agree with Appellants’ first contention regarding the general use
of lithography, as taught by Lee (192), for the reasons discussed infra. We
further agree that Lee’s paragraph 9 would have discouraged an artisan from
implementing a bottom gate transistor, as recited in each of Appellants’
independent claims.2 We reproduce Lee’s paragraph 9 in pertinent part
(with emphasis added):
When forming the thin film transistor semiconductor with a
bottom gate structure using the oxide semiconductor, the
oxide semiconductor may be exposed to the atmosphere and
the channel portion of the oxide semiconductor may be damaged
by vapor or by the dry etch gas when etching a metal layer
formed on the oxide semiconductor, and accordingly the
characteristics of the thin film transistor may be seriously
degraded.
In response to new findings in the Answer (5-8), Appellants present
additional arguments in the Reply Brief, including a contention the
Examiner erred by relying on impermissible hindsight. (Reply Br. 7—11).
Based upon a preponderance of the evidence, we find persuasive
Appellants’ arguments that the Examiner has improperly combined the cited
references under § 103(a), for at least the reasons discussed infra.
2 Our reviewing court guides: ‘“[a] reference may be said to teach away
when a person of ordinary skill, upon reading the reference, would be
discouraged from following the path set out in the reference, or would be led
in a direction divergent from the path that was taken by the applicant. ’” In
re Kahn, 441 F.3d 977, 990 (Fed. Cir. 2006) (quoting In re Gurley, 27 F.3d
551, 553 (Fed. Cir. 1994)).
4
Appeal 2015-006094
Application 12/606,340
At the outset, we understand the Examiner’s mapping in the Final
Action of contested limitations LI and L2 to the corresponding features in
Fujimoto to be as shown in the following claim chart:
Contested Limitations
LI and L2 ((Maim 1)
Mapping to Reference
Drawing
Mapping to Reference
Description
[LI] a silicon oxide Fujimoto Fig. 9C, Fujimoto 1116,
film including an OH insulating layer 173. insulating film 173
group over and in “OH Group” mapped (silicon oxynitride),
contact with to Fujimoto “TEOS” although not limited to
1101 (see also 1261) silicon oxynitride.
Also mapped to Fujimoto 194,
Fujimoto Fig. 7A, “[a]s shown in
insulating film 101. FIG. 7A, a base
insulating film
101 is formed on
the substrate 100
from an
insulating film
such as a silicon
oxide film, a
silicon nitride
film, and a
silicon
oxynitride film.
The base
insulating film
101 in this
embodiment has
a two-layer
(Final Act. 3—4) structure.”
(Emphasis
added).
5
Appeal 2015-006094
Application 12/606,340
a first oxide
semiconductor film of
the first enhancement
transistor
Fujimoto Fig. 39,
semiconductor layer
2003.
Also mapped to
Fujimoto Fig. 11,
semiconductor layers
145, 135, 140, 184.
(Final Act. 4)
Fujimoto 1141
“[t]he p-channel
TFT 2100 has a
semiconductor
layer 2003 a gate
insulating film
2021,...”
and a second oxide
semiconductor film of
the second
enhancement
transistor; and
Fujimoto Fig. 39,
semiconductor layer
2004.
Also mapped to
Fujimoto Fig. 11,
semiconductor layers
167, 168, 169, 185.
(Final Act. 4)
Fujimoto 1144
“semiconductor layer
2004.”
[L2] a silicon nitride
film over and in
contact with
Fujimoto Fig. 9C,
insulating film 174.
(Final Act. 4).
Fujimoto 1119,
“a second
interlayer
insulating film
174 made of an
organic
insulating
material is
formed on the
first interlayer
insulating film
173.”
the silicon oxide film Fujimoto Fig. 9C, layer
173
Fujimoto 1116,
insulating film 173
(silicon oxynitride),
although not limited to
silicon oxynitride
6
Appeal 2015-006094
Application 12/606,340
However, the Examiner finds Fujimoto “fails to teach first
semiconductor film and second semiconductor film being first oxide
semiconductor film and second oxide semiconductor film respectively”
(Final Act. 5) (emphasis added). The Examiner looks to Fee (1 66, Fig. 10,
layer 151) to address the deficiency in Fujimoto. Fee (1 66) teaches “[t]he
channel layers 151 are preferably made of an oxide semiconductor
material. . . .” (Emphasis added).
The Examiner additionally finds “both Fujimoto and Fee fail to teach
wherein each of the first enhancement transistor and the second
enhancement transistor is a bottom-gate transistor.” (Final Act. 6)
(emphasis added). The Examiner looks to CHOI (116) to address the
deficiency found in Fujimoto and Fee. CHOI (1 66) teaches “[t]he first
TFT may be a bottom gate type transistor . . . .” (emphasis added).
Appellants contend there is “insufficient articulated suggestion or
motivation, either in the references themselves or in the knowledge
generally available to one of ordinary skill in the art, to have
predictably modified Fujimoto, Lee and Choi or to have combined
reference teachings to achieve the claimed invention.” (App. Br. 13).
Appellants urge:
while the Official Action relies on various teachings of the cited
prior art to disclose aspects of the claimed invention and asserts
that these aspects could be used together, it is respectfully
submitted that the Official Action does not adequately set forth
articulated rationale as to why one would have predictably
combined the references to achieve the features of the present
invention.
(Id. ). (Emphasis added).
7
Appeal 2015-006094
Application 12/606,340
The Supreme Court guides: ‘“rejections on obviousness grounds
cannot be sustained by mere conclusory statements; instead, there must be
some articulated reasoning with some rational underpinning to support the
legal conclusion of obviousness.’” KSR, 550 U.S. at 418 (quoting In re
Kahn, 441 F.3d 977, 988 (Fed. Cir. 2006) (internal alteration omitted).
Applying this reasoning here requires a detailed review of the
Examiner’s proffered rationales for combining the references. We
reproduce the Examiner’s first-stated rationale for modifying Fujimoto with
the oxide semiconductor layers of Lee:
At the time the invention was made, it would have been
obvious to one of ordinary skill in the art to modify Fujimoto's
inverter circuit using enhancement transistors to include Lee's
channel made of oxide semiconductor because such a
modification is based on the use of known techniques to
improve similar devices in the same way. More specifically,
Lee's thin film transistor (TFT) is comparable to Fujimoto's
inverter circuit because Fujimoto's inverter circuits are made of
thin film transistors (see Fujimoto's ABSTRACT). Therefore, it
is within the capabilities of one of ordinary skill in the art to
modify Fujimoto's inverter circuits to include Lee’s transistor
channels made of oxide semiconductor formed by a well-
known technique known as lithography (Lee, page 4, ^[[0091])
with the predictable result of increase in field effect mobility and
improvement of Idon/Idoff ratio.
(Final Act. 6) (emphasis added).3
Turning to Lee, we find paragraph 91 is silent regarding any mention
of lithography. The Examiner’s reference (Ans. 6) to paragraph 91 of Lee
3 The presence or absence of a reason “to combine references in an
obviousness determination is a pure question of fact.” In re Gartside, 203
F.3d 1305, 1316 (Fed. Cir. 2000) (citing In re Dembiczak, 175 F.3d 994,
1000 (Fed. Cir. 1999)).
8
Appeal 2015-006094
Application 12/606,340
appears to have been intended to reference subsequent paragraph 92, which
describes “the oxide semiconductor layer is patterned by lithography to
form a plurality of channel layers 151.” (Emphasis added)
Because lithography is generally used in the manufacturing process of
semiconductor chips, we agree with Appellants’ argument that “the
Examiner’s ‘noted comparison and technique of ‘lithography’ (see pg. 6 of
the Office Action) appears to have no correlation with predictability or why
an oxide semiconductor would be substituted. There also appears to be no
appreciation of any advantageous effect.” (App. Br. 15).
The Examiner finds that the modification of Fujimoto with Lee’s
oxide semiconductor layers would have had “the predictable result of
increase in field effect mobility and improvement of Idon/Idoff ratio.”
(Ans. 6) (emphasis added). However, the Examiner provides no citation to
a specific teaching in Lee of increased “field effect mobility and
improvement of Idon/Idoff ratio.” (Id.).
We find Lee is silent regarding any mention of increased “field effect
mobility and improvement of Idon/Idoff ratio.” We find the only mention of
“field effect mobility” in the references relied upon by the Examiner is
found in Fujimoto flflf 209, 215, 277, 309). In reviewing these paragraphs,
we find no purported problem with field effect mobility is described in
Fujimoto. Instead of describing a problem needing a solution, we find
Fujimoto describes “excellent characteristics” which include “a field effect
mobility of 130 to 180 cm2 /Vs” (emphasis added):
An n-channel TFT, a p-channel TFT and a pixel TFT
manufactured in accordance with another embodiment of the
invention have also displayed excellent characteristics. The n-
channel TFT has an Ioff of 10 to 30 pA, a field effect mobility
9
Appeal 2015-006094
Application 12/606,340
of 130 to 180 cm2 /Vs, and an S value of 0.19 to 0.26 V/dec. The
p-channel TFT has an Ioff of 2 to 10 pA, a field effect mobility
of 70 to 110 cm2/Vs, and an S value of 0.19 to 0.25 V/dec. The
pixel TFT has an Ioff of 2 to 10 pA, a field effect mobility of 70
to 150 cm2/Vs, and an S value of 0.16 to 0.24 V/dec.
(Fujimoto 1209) (emphasis added).
Fujimoto (| 277) further teaches “[i]f a TFT has a channel formation
region formed as above, the OFF current value thereof is low and
crystallinity is high to provide high field effect mobility, whereby the TFT
can have excellent characteristics.” (Emphasis added).
Thus, we find the Examiner’s looks to Lee to modify Fujimoto to
solve a problem that is not found in Fujimoto. Because there is no
apparent problem with field effect mobility in Fujimoto in need of a
solution, we find the Examiner’s proffered motivation evidences
impermissible hindsight reconstruction. (Final Act. 6). Even if arguendo
there did exist some problem with field effect mobility in Fujimoto (not
specifically identified by the Examiner in the record), we again emphasize
that Lee is silent regarding any mention of increased “field effect mobility
and improvement of Idon/Idoff ratio.” Therefore, Lee cannot provide any
solution to any purported problem with field effect mobility (or current
ratios) in Fujimoto.
Turning to the Examiner’s proffered “improvement of Idon/Idoff
ratio” (Final Act. 6), as described above, Fujimoto (1277) describes “the
OFF current value thereof is low ...” (emphasis added) which similarly
suggests there is no problem with OFF current values in Fujimoto in need
of an improved solution.
Moreover, we find Lee is silent regarding any mention of current
(Idon/Idoff) ratios. The only further mention of on/off current ratios in the
10
Appeal 2015-006094
Application 12/606,340
cited references appears in the background section of CHOI (17): “For
example, while the switching TFT requires relatively high on-off current
ratio (I on/I off), the driving TFT requires relatively high mobility and
stability for enhancing high current driving ability.” (Emphasis added).
Therefore, on this record, we find the Examiner has not established
any rationale supported by the evidence of record, or by the knowledge of an
artisan, to show that an artisan would have looked to Lee to modify
Fujimoto for “the predictable result of increase in field effect mobility and
improvement of Idon/Idoff ratio.” (Final Act. 6).
We find a similar problem regarding the Examiner’s second-stated
motivation to modify Fujimoto and Lee with the teachings of CHOI:
At the time the invention was made, it would have been
obvious to one of ordinary skill in the art to modify Fujimoto and
Lee's enhancement transistors to include Choi's bottom gate
structure transistor because such a modification is based on the
use of known techniques to improve similar devices in the
same way. More specifically, Fujimoto and Lee's thin film
transistor (TFT) is comparable to Choi's bottom gate TFT
because TFT can be manufacturing in either top gate or bottom
gate. Therefore, it is within the capabilities of one of ordinary
skill in the art to modify Fujimoto and Lee's enhancement
transistors to be manufactured using Choi's bottom gate structure
with the predictable result of avoiding the gate to make
contacts with impurities in the air if constructed in the top
gate structure.
(Final Act. 7) (emphasis added).
As discussed above, we agree that Lee’s paragraph 9 would have
discouraged an artisan from implementing CHOI’s bottom gate transistor
(116) in the base combination of Fujimoto and Lee, because we find Lee’s
paragraph 9 “teaches away” from the Examiner’s proffered combination.
Further, we find the Examiner’s fails to identify any specific teaching in
11
Appeal 2015-006094
Application 12/606,340
CHOI that would avoid the gate making contact with impurities in the
air if constructed in the top gate structure. (See Final Act. 7).
Instead, we find the primary Fujimoto reference (e.g., 1241) already
describes a method in which “[t]he base insulating film and the amorphous
semiconductor film may be formed successively without exposing them to
the air” (emphasis added). See also Fujimoto flflf 230, 263). Once again,
the Examiner looks to a secondary reference (CHOI) to solve a problem that
does not appear to exist in Fujimoto, and is already addressed in Lee (19)
(“to prevent damage by the dry etching as above described, a wet etching
method may be used”).
Therefore, we find a preponderance of the evidence supports
Appellants’ contention that the Examiner’s proffered rationales for
combining the cited references are grounded on mere conclusory
statements without sufficient articulated reasoning (supported by
evidence in the record) to support the rejection. (App. Br. 13).
We note the Examiner presents new findings in the Answer: “the
above response is provided and expanded in more detail[] in light of the
arguments and requests submitted by Applicants.” (Ans. 8) (emphasis
added).
In response to the new findings in the Answer, the Appellants
advance further arguments in the Reply Brief, including a contention, inter
alia, that the Examiner has improperly relied on impermissible hindsight
reconstruction to pick and choose among the disparate elements cited in the
Fujimoto, Lee, and CHOI references, to arrive at Appellants’ claimed
invention. (See Reply Br. 7—11).
12
Appeal 2015-006094
Application 12/606,340
Regarding Appellants’ hindsight argument (id.), we are cognizant that
our reviewing courts have not established a bright-line test for hindsight. In
KSR, the Supreme Court guides that “[a] factfinder should be aware, of
course, of the distortion caused by hindsight bias and must be cautious of
argument reliant upon ex post reasoning.” KSR, 550 U.S. at 421 (citing
Graham v. John Deere Co. of Kansas City, 383 U.S. 1, 36 (1966)).
Nevertheless, the Supreme Court also qualified the issue of hindsight by
stating: “[rjigid preventative rules that deny factfinders recourse to common
sense, however, are neither necessary under our case law nor consistent with
it.” (Id).
Hindsight Balancing Test
Here, we see the post-KSR hindsight question before us as a balancing
test'. We consider the question of whether the Examiner’s proffered
combination of references is merely:
(1) “the predictable use of prior art elements according to their
established functions” (KSR, 550 U.S. at 417), consistent with
common sense', or,
(2) would an artisan have reasonably combined the cited references in
the manner proffered by the Examiner but for having the benefit of
Appellants’ claims and/or Specification to use as a guide?’4
4 Hindsight is impermissible when an Examiner rejects an application in
reliance upon teachings not drawn from any prior art disclosure, but from the
Appellants’ own disclosure. See In re Deminski, 796 F.2d 436, 443 (Fed.
Cir. 1986); W.L. Gore &Assocs., Inc. v. Garlock, Inc., 721 F.2d 1540, 1553
13
Appeal 2015-006094
Application 12/606,340
After reviewing the respective teachings and suggestions of the cited
Fujimoto, Lee, and CHOI references (as discussed in detail above), we find
the evidence more strongly answers the second prong of the balancing test in
the negative, leading us to conclude, based upon a preponderance of the
evidence, the Examiner has relied upon impermissible hindsight
reconstruction in formulating the rejection.* * * * 5
Even if the Examiner’s proffered combination of Fujimoto, Lee, and
CHOI would have taught or suggested the limitations contested by
Appellants as falling within a broad but reasonable interpretation of the
claims, we, nevertheless, find the Examiner’s proffered rationales for
combining Fujimoto, Lee, and CHOI are unsupported by a preponderance
of the evidence, and are therefore unconvincing for the reasons we have
discussed at length above. (See Final Act. 6—7).
Assuming the Role of the PHOSITA at the Time of the Invention
In considering Appellants’ hindsight argument, we are particularly
mindful that Patent Examiners begin the examination of the patent
application by searching for prior art using the Applicant’s own claims.
Although there appears to be no alternative manner in which to efficiently
(Fed. Cir. 1983) cert, denied, 469 U.S. 851 (1984); Grain Processing Corp.
v. Am. Maize-Products Co., 840 F.2d 902, 907 (Fed. Cir. 1988).
“Obviousness cannot be established by hindsight combination to produce the
claimed invention.” In re Dance, 160 F.3d 1339, 1343 (Fed. Cir. 1998).
5 Thus, we conclude a preponderance of the evidence supports a finding that
a PHOSITA would not have reasonably combined the cited references in the
manner proffered by the Examiner without having the benefit of Appellants ’
claims and/or Specification to use as a guide.
14
Appeal 2015-006094
Application 12/606,340
search for the closest prior art, this initial step in the examination process is
necessarily hindsight per se, because the Examiner has the full benefit of
using the Applicant’s claims and Specification as a guide in conducting the
search.
After the initial step of searching locates the closest references to the
claimed invention, the Examiner must then assume the role of the
hypothetical person having ordinary skill in the art (PHOSITA) having full
knowledge of the relevant prior art, but having no knowledge of the claimed
and disclosed invention under examination.6,7 It is unfortunately too easy
for the Examiner to fall into the trap of omitting this second essential step of
examination, which requires the Examiner to assume the perspective of the
PHOSITA at the time of the invention, as if the application and claims under
6 “The person of ordinary skill in the art [(‘PHOSITA’)] is a hypothetical
person who is presumed to know the relevant prior art.” In re GPAC, 57
F.3d 1573, 1579 (Fed. Cir. 1995) (citing Custom Accessories, Inc. v. Jeffrey-
Allan Indus., Inc., 807 F.2d 955, 962 (Fed. Cir. 1986)).
7 See also Jonathan J. Darrow, “The Neglected Dimension of Patent
Law's PHOSITA Standard,” 23 Harv. J.L. & Tech. 233 (2009):
Despite its new name, the PHOSITA standard itself traces
its origins to nineteenth century case law.[] In the landmark 1850
case of Hotchkiss v. Greenwood f the Supreme ‘Court held
unpatentable an improvement on a doorknob, explaining that
“unless more ingenuity and skill. . . were required [to make the
invention] . . . than were possessed by an ordinary mechanic
acquainted with the business, there was an absence of that degree
of skill and ingenuity which constitute essential elements of
every invention.”0 Other cases described the concept in terms of
“ordinary skill,” “ordinary mechanical knowledge,” or similar
language.0
15
Appeal 2015-006094
Application 12/606,340
examination did not exist. Because of the distortion caused by hindsight bias
in the initial examination searching step, we must be especially cautious of
suspect “expost reasoning.” KSR, 550 U.S. at 421.
Given the aforementioned evidence of record, and our detailed
analysis above of the Examiner’s proffered motivation statements (Final
Act. 6—7), we do not see how an artisan possessing only the knowledge of
Fujimoto, Fee, and CHOI, and having common sense, would have
reasonably combined the disparate cited portions of the references in the
manner proffered by the Examiner (Final Act. 6—7), to arrive at Appellants’
claimed invention, without having the benefit of Appellants’ claims and
Specification to use as a guide.
Thus, in balancing the second prong of the hindsight balancing test
against the first “predictable result” prong (which incorporates the common
sense of the artisan), we find a preponderance of the evidence supports
Appellants’ argument that the Examiner relied upon impermissible
hindsight reconstruction in formulating the rejection (Reply Br. 7—11).
We further find a preponderance of the evidence supports Appellants’
previous combinability arguments, as raised in the principal Brief, as
discussed supra. 8
8 See In re Cree, Inc., 818 F.3d 694, 702 n.3 (Fed. Cir. 2016) (where the
Board applied the hindsight balancing test)
Cree argues that the Board's rejection was based on
“impermissible hindsight.” That argument, however, is
essentially a repackaging of the argument that there was
insufficient evidence of a motivation to combine the references.
It is fully answered by the Board’s observation that “the weight
of the evidence shows that the proffered combination is merely a
16
Appeal 2015-006094
Application 12/606,340
Therefore, on this record, and based upon a preponderance of the
evidence, Appellants have persuaded us the Examiner erred. Accordingly,
for essentially the same reasons argued by Appellants, as discussed above,
we are constrained on this record to reverse the Examiner’s rejection under
§ 103(a) of claims 1, 2, 4—8, 10-13, 15—17, and 19-21, which are all the
claims before us on appeal.
DECISION
We reverse the Examiner’s rejection of claims 1,2, 4—8, 10-13,
15-17, and 19-21 under 35 U.S.C. § 103(a).
REVERSED
predictable use of prior art elements according to their
established functions.
See also Ex parte Cree, Inc. Patent Owner & Appellant, Appeal 2014-
007890, 2014 WL 6664878, at *17 (PTAB, Nov. 21, 2014). We note the
hindsight balancing test has been applied by various panels in over thirty
PTAB opinions, mailed over a number of years, as of the mailing date of this
opinion.
17