Ex Parte Karnezos

Patent Trial and Appeal Board

Apr 28, 2017

11337168 (P.T.A.B. Apr. 28, 2017)

United States Patent and Trademark Office
UNITED STATES DEPARTMENT OF COMMERCE
United States Patent and Trademark Office
Address: COMMISSIONER FOR PATENTS
P.O.Box 1450
Alexandria, Virginia 22313-1450
www.uspto.gov
APPLICATION NO. FILING DATE FIRST NAMED INVENTOR ATTORNEY DOCKET NO. CONFIRMATION NO.
11/337,168 01/20/2006 Marcos Karnezos 70028-1018 1745
127614 7590
Wong & Rees LLP
4340 Stevens Creek Blvd.
Suite 106
San Jose, CA 95129
05/02/2017 EXAMINER
GRAYBILL, DAVID E
ART UNIT PAPER NUMBER
2894
NOTIFICATION DATE DELIVERY MODE
05/02/2017 ELECTRONIC
Please find below and/or attached an Office communication concerning this application or proceeding.
The time period for reply, if any, is set in the attached communication.
Notice of the Office communication was sent electronically on above-indicated "Notification Date" to the
following e-mail address(es):
docketing@wongrees.com
jyang@wongrees.com
PTOL-90A (Rev. 04/07)
UNITED STATES PATENT AND TRADEMARK OFFICE
BEFORE THE PATENT TRIAL AND APPEAL BOARD
Ex parte MARCOS KARNEZOS
Appeal 2016-001733
Application 11/337,168
Technology Center 2800
Before ADRIENE LEPIANE HANLON, JEFFREY T. SMITH, and
MICHAEL G. McMANUS, Administrative Patent Judges.
McMANUS, Administrative Patent Judge.
DECISION ON APPEAL
The Examiner finally rejected claims 2 and 9—12 of Application
11/337,168 (“the ’168 Application”) under 35 U.S.C. § 112,12 as
indefinite. Final Act. 2—3 (Apr. 1, 2014). The Examiner also rejected
claims 2 and 9—12 under 35 U.S.C. § 103(a) as obvious.1 Final Act. 5—7.
1 The Examiner finally rejected claims 2, 9, 10 and 12 under 35 U.S.C. §
102(b) as anticipated. Final Act. 3—5. These rejections, however, were
subsequently withdrawn by the Examiner. Answer 16.
Appeal 2016-001733
Application 11/337,168
Appellant2 seeks reversal of these rejections pursuant to 35 U.S.C. § 134(a).
We have jurisdiction under 35 U.S.C. § 6.
For the reasons set forth below, we AFFIRM.
BACKGROUND
The ’168 Application relates to a semiconductor multi-package
module which has stacked lower and upper packages and a heat spreader
situated between the packages and a method of making such modules. Spec.
7—8, and 10.
Claim 2 is representative of the ’168 Application’s claims and is
reproduced below from the Claims Appendix to the Appeal Brief:
1. A method for making a multi-package module,
comprising:
providing a first package including a first package substrate
having at least two metal layers, each patterned on opposing
surfaces of the first package substrate and connected by vias;
mounting a heat spreader over the first package and coupled to
the first package substrate;
providing a second package including forming an upper
package top surface by a molding compound for encapsulating
a die attached to a second package substrate by wire bonds;
inverting the second package and stacking the second package
over the heat spreader and the first package including
positioning the upper package top surface and
the heat spreader between the second package substrate and the
first package; and
2 General Motors LLC is identified as the real party in interest. Appeal
Br. 4.
2
Appeal 2016-001733
Application 11/337,168
electrically interconnecting the first package and the second
package by z-interconnect wire bonds connecting the first
package substrate and the second package substrate.
Appeal Br. 27 (Claims App.).
REJECTION
On appeal, the Examiner maintains the following rejections:
1. Claims 2 and 9—12 are rejected under 35 U.S.C. § 112,12 for
failure to particularly point out and distinctly claim the subject matter the
applicant regards as the invention. Final Act. 2.
2. Claims 2, 9, 10 and 12 are rejected under 35 U.S.C. § 103(a) as
unpatentable over Ishikawa (JP 2000-294723, pub. Oct. 20, 2000)
(hereinafter “Ishikawa”). Id. at 5—6.
3. Claims 2 and 9—12 are rejected under 35 U.S.C. § 103(a) as
unpatentable over the combination of Ishikawa and Hoffman et al. (US
6,737,750 Bl, iss. May 18, 2004) (hereinafter “Hoffman”). Id. at 6—7.
DISCUSSION
Rejection 1.
The Examiner rejected claims 2 and 9—12 as indefinite on the basis
that the scope of the term “z-interconnect wire bonds” is unclear. Final Act.
2.
Appellant argues that the Examiner has failed to state a prima facie
case of indefmiteness and that one of ordinary skill in the art would
understand the scope of such term when viewed in light of the Specification.
Appeal Br. 11. Appellant further asserts that “claim 2 clearly informs the
reader that the z-interconnect wire bonds connect the first package substrate
and the second package substrate.” Id. at 12.
3
Appeal 2016-001733
Application 11/337,168
The Specification teaches that there is a recent industry trend toward
“integration on the ‘z-axis,’ that is, by stacking chips.” Spec. 1. The
Specification further provides that, “[according to the invention, z-
interconnection between the stacked packages in the MPM [multi-package
module] is wire bond based.” Id. at 7—8. Additionally, the Specification
teaches that “[t]he wire bond z-interconnect is well established in the
industry . . . and it is directly applicable, without significant modification, to
the stacked multipackage modules of the invention.” Id. at 8. Moreover, the
Specification teaches that fine pitch wire bonding “provides for more
interconnects between packages (z-interconnects) in the same available
space.” Id. (emphasis added).
In regard to practicing the method of the present application, the
Specification provides that “according to the invention for making multi­
package modules the electrical connections between the stacked packages
employ[ ] conventional wire bonding to form the z-interconnect between the
inverted top package substrate and a bottom package substrate in the stack.”
Id. at 14.
Taken as a whole, and in conjunction with Figures 5 A and 6A, it is
apparent that the “z-axis” refers to the vertical direction in the context of
stacked semiconductor packages. Further, the term “z-interconnect” refers
to the electrical connection between the packages stacked one atop the other.
Accordingly, the term “z-interconnect wire bonds” is construed to mean wire
bonds that electrically connect two separate semiconductor packages
arranged such that an upper package is stacked on top of a lower package.
During prosecution, a claim is examined for compliance with 35
U.S.C. § 112,12 by determining whether the claim meets threshold
requirements of clarity and precision. In re Skvorecz, 580 F.3d 1262, 1268
4
Appeal 2016-001733
Application 11/337,168
(Fed. Cir. 2009) (quoting MPEP § 2173.02). Here, the meaning of the term
“z-interconnect wire bonds,” considered in view of the Specification, would
be apparent to one of ordinary skill in the art and, thus, the claim is
sufficiently clear and precise.
Rejections 2 and 3.
The Examiner rejected claims 2, 9, 10, and 12 as obvious over
Ishikawa (Rejection 2), Final Act. 5—6, and claims 2 and 9-12 as obvious
over Ishikawa in view of Hoffman (Rejection 3), id. at 6—7.
Appellant argues that the claims are not obvious over Ishikawa
(Rejection 2) because Ishikawa does not “teach or suggest the limitation of
positioning the upper package top surface and the heat spreader between the
second package substrate and the first package.” Appeal Br. 18. Rather,
Appellant asserts, Ishikawa teaches to mount a metallic plate 18 (heat
spreader) so that it is exposed above the upper semiconductor carrier. Id. at
18—19; see Ishikawa Fig. 1. The Board finds such argument persuasive and
reverses Rejection 2.
In Rejection 3 the Examiner relies upon Ishikawa as the primary
reference and Hoffman as a secondary reference. The Examiner finds that
Hoffman teaches to position a second package surface and the heat spreader
between the second (upper) package substrate and the first (lower) package.
Final Act. 6; see also Hoffman 9:61—11:4, Fig. 12A. The Examiner finds
that a person of ordinary skill in the art would be motivated to position a
heat spreader between the first and second die, as taught by Hoffman, when
making a multi-package module as taught by Ishikawa, so as improve heat
dissipation. Final Act. 7.
Appellant argues that the combination of Ishikawa and Hoffman
would not teach the claimed method because Hoffman discloses a multi-chip
5
Appeal 2016-001733
Application 11/337,168
package while Ishikawa relates to a multi-chip module. Id. at 21.
Similarly, Appellant contends that “the combination of Ishikawa and
Hoffman would only result in the multi-chip package of Hoffman residing
within the multi-package module of Ishikawa, without disclosing the
claimed invention.” Id. at 23—24. As a consequence, the combination would
not teach “the claimed limitation of positioning the upper package top
surface and the heat spreader between the second package substrate and the
first package.” Id. at 23 (underscoring in original).
“Claims may be obvious in view of a combination of references, even
if the features of one reference cannot be substituted physically into the
structure of the other reference.” Orthopedic Equip. Co. v. United States,
702 F.2d 1005, 1013 (Fed. Cir. 1983); In re Keller, 642 F.2d 413, 425
(CCPA 1981) (“The test for obviousness is not whether the features of a
secondary reference may be bodily incorporated into the structure of the
primary reference.”). Here, Hoffman discloses the use of a metal layer3
positioned between a first die (integrated circuit) 12 and a second die 16
stacked above it so as to act as a heat spreader 33. Hoffman 9:64—10:7, Fig.
12A. Hoffman further teaches that “[t]he heat spreader transfers heat from
the first and second dies to a heat sink of the substrate” and that “[t]he
support structure and the heat spreader mitigate the transfer of heat between
the first and second dies.” Id. Abst. Thus, Appellant’s argument regarding
Ishikawa not teaching a heat spreader between the stacked packages is
remedied by the teachings of Hoffman. Appellant’s argument that Hoffman
teaches a multi-chip package rather than a multi-chip module is unavailing.
3 Both Hoffman and the Specification teach that the heat spreader may be of
copper or other metals. Compare Hoffman 9:66—10:2 to Spec. 24.
6
Appeal 2016-001733
Application 11/337,168
A heat spreader positioned intermediate two stacked dies was known in the
art and would have been expected to perform its known function, i.e., the
dissipation of heat, when positioned between two packages in Ishikawa.
“The combination of familiar elements according to known methods is likely
to be obvious when it does no more than yield predictable results.” KSR Int'l
Co. v. Teleflex Inc., 550 U.S. 398, 416 (2007).
In sum, the Examiner finds Ishikawa teaches to make a multi-package
module, Appeal Br. 21, with stacked packages in an inverted formation, z-
interconnect wire bonds 13, and a metal heat spreader 18, while Hoffman
teaches to position a heat spreader intermediate the two packages so as to
dissipate heat generated by the dies. The Examiner further finds that one of
ordinary skill in the art would have known that the heat spreader of Ishikawa
could be positioned intermediate the two packages and thereby dissipate heat
from the dies. Appellant has failed to show reversible error in the
Examiner’s findings.
CONCLUSION
For the reasons set forth above, we reverse the rejection of claims 2
and 9-12 on the basis of indefmiteness, reverse the rejection of claims 2, 9,
10, and 12 on the basis of obviousness over Ishikawa alone, and affirm the
rejection of claims 2 and 9—12 on the basis of obviousness over Ishikawa in
view of Hoffman.
AFFIRMED
7