Ex Parte Kamineni et al

Patent Trial and Appeal Board

Jun 28, 2018

14457370 (P.T.A.B. Jun. 28, 2018)

UNITED STA TES p A TENT AND TRADEMARK OFFICE
APPLICATION NO. FILING DATE FIRST NAMED INVENTOR
14/457,370 08/12/2014 Vimal Kamineni
10742 7590 07/02/2018
GLOBALFOUNDRIES INC.
c/o Amerson Law Firm, PLLC
2500 Fondren Road, Suite 220
UNITED STATES DEPARTMENT OF COMMERCE
United States Patent and Trademark Office
Address: COMMISSIONER FOR PATENTS
P.O. Box 1450
Alexandria, Virginia 22313-1450
www .uspto.gov
ATTORNEY DOCKET NO. CONFIRMATION NO.
2 l 62.249000/EU760 1094
EXAMINER
TURNER, BRIAN
Houston, TX 77063 ART UNIT PAPER NUMBER
2894
NOTIFICATION DATE DELIVERY MODE
07/02/2018 ELECTRONIC
Please find below and/or attached an Office communication concerning this application or proceeding.
The time period for reply, if any, is set in the attached communication.
Notice of the Office communication was sent electronically on above-indicated "Notification Date" to the
following e-mail address(es):
uspto@amersoniplaw.com
PTOL-90A (Rev. 04/07)
UNITED STATES PATENT AND TRADEMARK OFFICE
BEFORE THE PATENT TRIAL AND APPEAL BOARD
Ex parte VIMAL KAMINENI, XIUYU CAI, and XUNYUAN ZHANG
Appeal2017-008702
Application 14/457,370
Technology Center 2800
Before ROMULO H. DELMENDO, DONNA M. PRAISS, and
SHELDON M. McGEE, Administrative Patent Judges.
DELMENDO, Administrative Patent Judge.
DECISION ON APPEAL
The Applicant (hereinafter "Appellant") 1 appeals under 35 U.S.C.
§ 13 4( a) from the Primary Examiner's final decision to reject claims 1-10
and 16-25. 2 We have jurisdiction under 35 U.S.C. § 6(b).
We affirm.
1 The Appellant is the Applicant, "GLOBALFOUNDRIES, Inc.," which,
according to the Brief, is the real party in interest ( Appeal Brief filed
December 19, 2016, hereinafter "Appeal Br.," 2).
2 Appeal Br. 4--11; Reply Brief filed May 24, 2017, hereinafter "Reply Br.,"
2-7; Final Office Action entered July 25, 2016, hereinafter "Final Act.," 3-
17; Examiner's Answer entered March 24, 2017, hereinafter "Ans.," 2-5.
Appeal2017-008702
Application 14/457,370
I. BACKGROUND
The subject matter on appeal relates to a method for forming an MIS
(Metal-Insulator-Semiconductor) contact structure for semiconductor
devices, such as transistors, including a step in which an insulating material
is deposited selectively (Specification filed August 12, 2014, hereinafter
"Spec.," 1, 11. 6-20). Figure 2D, which illustrates the method after the
selective deposition step, is reproduced from the Drawings as follows:
100
Figure 20
126
I
124
I
122 114
'· 102
Figure 2D above depicts a device 100 after performing a selective deposition
process (e.g., a metal-oxide chemical vapor deposition (CVD) process) to
form a metal-oxide insulating material 128 ( e.g., materials "comprised of a
variety of different metal-oxide materials, including, but not limited to, a
high-k insulating material (k value of 10 or greater), such as Ti02, La20 3,
Ah03, Hf02, etc.") on exposed portions of source/drain regions 122 through
contact openings 126 formed on insulating material 124 without depositing
any material on sidewalls 126S (id. at 12, 1. 10-13, 1. 10).
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Application 14/457,370
Representative claim 1 is reproduced from page A-1 of the Claims
Appendix to the Appeal Brief (some indentations and emphasis added), as
follows:
1. A method of forming an MIS contact structure,
compnsmg:
forming at least one layer of insulating material above a
semiconductor layer;
performing at least one contact opening etching process to
form a contact opening in said at least one layer of insulating
material that exposes a surface portion of said semiconductor
layer;
performing a selective material deposition process to
selectively deposit a metal-oxide insulating material through
said contact opening on the exposed surface portion of said
semiconductor layer; and
forming a conductive contact in said contact opening that
contacts said metal-oxide insulating material.
II. REJECTIONS ON APPEAL
On appeal, the Examiner maintains four rejections under AIA 35
U.S.C. § 103, as follows:
A. Claims 1, 2, 4---6, 16, and 17 as unpatentable over Alptekin et
al. 3 (hereinafter "Alptekin") in view of Zhu et al. 4 (hereinafter
"Zhu");
B. Claims 3 and 7-10 as unpatentable over Alptekin in view of
Zhu and King et al. 5 (hereinafter "King");
C. Claims 18-22, 24, and 25 as unpatentable over Alptekin in
view of Zhu and Hermes; 6 and
3 US 2015/0270179 Al, published September 24, 2015.
4 US 2010/0006926 Al, published January 14, 2010.
5 US 2013/0292835 Al, published November 7, 2013.
6 US 2005/0208745 Al, published September 22, 2005.
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Application 14/457,370
D. Claim 23 as unpatentable over Alptekin in view of Zhu,
Hermes, and King.
(Ans. 2-5; Final Act. 3-17.)
III. DISCUSSION
Rejection A. The Appellant's arguments focus only on claim 1
(Appeal Br. 4--9). Therefore, we confine our discussion to claim 1, which
we select as representative pursuant to 37 C.F.R. § 4I.37(c)(l)(iv). As
provided by this rule, claims 2, 4---6, 16, and 17 stand or fall with claim 1.
The Examiner finds that Alptekin describes a method for forming an
MIS contact structure including most of the limitations recited in claim 1 but
acknowledges it does not teach the disputed limitations highlighted above in
reproduced claim 1 (Final Act. 3--4). Specifically, the Examiner finds that
Alptekin describes "selectively form[ing] a metal-oxide insulating material
(i1i10043-0046: 519/520/525) through [a] contact opening on the exposed
surface portion of [a] semiconductor layer (i-f 0043: 519/520/525 formed
selectively on surface of 51 O)" (id. at 3) but acknowledges that the reference
"does not teach the method of selectively forming the metal-oxide insulating
material comprises selective deposition of metal-oxide insulating material"
(id. at 4). The Examiner finds further, however, that "Zhu teaches a method
of atomic layer deposition [ ALD] ( equivalent to that of Alptekin)
comprising selective deposition of metal-oxide insulating material selected
from a group comprising aluminum oxide and lanthanum oxide" (id.).
Based on these findings, the Examiner concludes (id.):
It would have been obvious to one of ordinary skill in the
art at the time the invention was filed to use the selective
deposition of metal-oxide insulating material taught by Zhu to
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Application 14/457,370
form the selective metal oxide insulating material layer taught by
Alptekin, as a means to reduce the number of manufacturing
steps by directly depositing the metal-oxide insulating material,
thereby improving manufacturing efficiency and reducing costs.
Since all the claimed methods were known in the prior art, and
one skilled in the art could have combined the elements as
claimed by known methods with no change in their respective
functions, the combination would have yielded nothing more
than predictable results to one of ordinary skill in the art.
In the Answer, the Examiner clarifies that "the rejection of claim 1 does not
assert that the atomic layer deposition taught by Zhu is equivalent to the
thermal growth process taught by Alptekin, but rather the atomic layer
deposition taught by Zhu ... is similarly taught by Alptekin" (Ans. 2 ( citing,
inter alia, Alptekin ,r 46)).
The Appellant's principal argument is that "the suggested
modification based on the teachings of Zhu would ... completely void the
fundamental premise of the Alptekin disclosure, which is directed to the
diffusion-controlled oxygen depletion of a semiconductor contact interface"
(Appeal Br. 5). Specifically, the Appellant argues that,/or smaller
semiconductor component structures, Alptekin teaches replacing
conformally-deposited metal oxide layers (e.g., by ALD) within a contact
structure with metal oxides formed in situ during an annealing step
performed after depositing certain materials at the contact's bottom to
reduce parasitic resistance and parasitic capacitance (id. at 5---6). According
to the Appellant, combining the references "would therefore leave the
resulting devices open to the type of performance deficiencies associated
with the increased parasitic resistance and parasitic capacitance experienced
by the ever-shrinking size and increased packing densities of modem
semiconductor circuit devices----deficiencies that the Alptekin disclosure is
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Application 14/457,370
specifically directed to overcoming" (id. at 6-7). In the Reply Brief, the
Appellant disputes one of the Examiner's stated reasons for combining the
references ( reduced number of manufacturing steps) (Final Act. 4 ), arguing
that "contrary to the Examiner's assertions, additional processing steps
would still be required in order to form the two remaining silicide and metal
layers 645, 650 that are otherwise fundamental to the Alptekin method"
(Reply Br. 5 (referring to Alptekin's Fig. 6)).
The Appellant's arguments fail to identify any reversible error in the
Examiner's rejection. In re Jung, 637 F.3d 1356, 1365 (Fed. Cir. 2011).
Alptekin describes a method for manufacturing semiconductor
contacts and controlling their electrical characteristics (parasitic resistance
and parasitic capacitance) "by taking advantage of anneal-driven diffusion in
layers of a contact structure" (Alptekin ,r 15). Specifically, an embodiment
is disclosed in Alptekin's Figure 5, which we reproduce as follows:
.~500
FIG. 5
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Alptekin's Figure 5 above depicts an intermediate manufacturing structure
500 that may be used to form contacts, wherein the structure 500 includes an
opening 516 in a dielectric material 515 on a semiconductor substrate 505's
silicon-containing region 510, on which are deposited a silicon-containing
oxide layer 519, a first metal layer 520, and a second metal layer 525 (id.
,r,r 39-42). Alptekin teaches that "both the oxygen from the oxide layer 519
and the metals in the metal stack and the oxygen in the silicon dioxide may
diffuse to produce a metal-insulator-silicon (MIS) contact structure" to form
"a layer of a metallic oxide such as aluminum oxide Ab03 beneath a
metal silicide layer that may form" (id. ,r 43). According to Alptekin,
"growing a metal oxide layer 519 in situ on top of the exposed portion of the
semiconductor substrate 518 permits manufacturers to realize a smaller
contact opening during the manufacturing process than may be possible
absent the in situ film growth during millisecond laser anneal steps" and the
space saved "may be used for increasing the amount of dielectric material
515 between the contact opening and the transistor gate to decrease the
amount of parasitic capacitance in the semiconductor circuit" (id. ,r 46).
But Alptekin also teaches another method for forming a metallic oxide
such as aluminum oxide or lanthanum oxide on the semiconductor (id.).
Specifically, Alptekin teaches (id. (emphasis added)):
methods of forming metallic oxide layers in contact openings
include atomic layer deposition (ALD), which deposits a
conformal layer of a metallic oxide such as aluminum oxide or
lanthanum oxide on the top of the wafer surface, on the side or
wall of the contact opening, and on the exposed silicon-
containing source or drain region of an NFET or PFET.
Although Alptekin teaches that "[i]n order to have a sufficiently wide
opening within the contact to receive metal fill, the original opening must be
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Application 14/457,370
wider to accommodate the layer of a ( e.g., ALD deposited) metallic oxide on
the sidewall" (id.), the reference contemplates depositing aluminum oxide or
lanthanum oxide on the top of the wafer surface. In this regard, Zhu
demonstrates that metallic oxides such as aluminum oxide or lanthanum
oxide may be deposited selectively by ALD onto a short channel active
region 104 on a semiconductor substrate 100 (Zhu ,r 23; Fig. 7).
Given the collective teachings found in the prior art references, we
discern no reversible error in the Examiner's conclusion that a person having
ordinary skill in the art would have found it obvious to implement a selective
ALD technique in Alptekin to deposit a metallic oxide such as aluminum
oxide or lanthanum oxide on top of a semiconductor substrate through a
contact opening as an alternative to Alptekin's metal stack diffusion
technique. KSR Int 'l Co. v. Teleflex Inc., 550 U.S. 398, 417 (2007) ("If a
person of ordinary skill can implement a predictable variation, § 103 likely
bars its patentability. ").
Although Alptekin's metal stack diffusion technique may be
advantageous for certain structures having particular dimensions or sizes,
that fact does not establish that a selective ALD technique would be
unsuitable for all purposes. Indeed, claim 1 on appeal does not specify any
particular dimensions for the contact structure, and, therefore, the claimed
method would not be expected to be immune from any potential drawback
that may result from such a selective ALD technique. In re Fulton, 391 F.3d
1195, 1200 (Fed. Cir. 2004) ("[C]ase law does not require that a particular
combination must be the preferred, or the most desirable, combination
described in the prior art in order to provide [the] motivation [ or reason] for
the current invention."); In re Gurley, 27 F.3d 551, 553 (Fed. Cir. 1994)
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("Even reading [ the prior art]' s description as discouraging use of epoxy for
this purpose, Gurley asserted no discovery beyond what was known to the
art.").
The Appellant appears to be arguing that claim 1 excludes layers such
as silicide layer 645 and metal layer 650 as shown in Alptekin's Figure 6
(Reply Br. 5 ( citing, e.g., Alptekin ,r 48)). Alptekin teaches "a metallic
oxide 640 that rests on the exposed silicon-containing region 610 of a
semiconductor substrate 605" (Alptekin ,r 48). The Appellant fails to
explain why layers 645 and 650 on top of metal oxide 640 would be
precluded by the language recited in claim 1.
For these reasons, we uphold the Examiner's rejection.
Rejections B-D. The Appellant relies on the same arguments offered
against Rejection A, adding only that the additional references do not cure
the perceived deficiencies in Rejection A (Appeal Br. 9-11). Because no
reversible error has been identified for Rejection A, we uphold Rejections
B-D for the same reasons.
IV. SUMMARY
Rejections A through Dare sustained. Therefore, the Examiner's
final decision to reject claims 1-10 and 16-25 is affirmed.
No time period for taking any subsequent action in connection with
this appeal may be extended under 37 C.F.R. § 1.136(a).
AFFIRMED
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