Ex Parte Jeong et al

Patent Trial and Appeal Board

Mar 12, 2013

11527330 (P.T.A.B. Mar. 12, 2013)

UNITED STATES PATENT AND TRADEMARK OFFICE
____________

BEFORE THE PATENT TRIAL AND APPEAL BOARD
____________

Ex parte JAE-KYEONG JEONG, HYUN-SOO SHIN,
and YEON-GON MO
____________

Appeal 2011-002173
Application 11/527,330
Technology Center 2800
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Before ROBERT E. NAPPI, HUNG H. BUI, and LYNNE E. PETTIGREW,
Administrative Patent Judges.

PETTIGREW, Administrative Patent Judge.

DECISION ON APPEAL
This is an appeal under 35 U.S.C. § 134(a) from a final rejection of
claims 1, 4, 5, 8, 11, 12, and 29-31.1 We have jurisdiction under 35 U.S.C.
§ 6(b).
We affirm.

1 Claims 6, 7, 9, 10, and 13-28 have been withdrawn from consideration.
Ans. 2. Claims 2 and 3 have been cancelled. Id.
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STATEMENT OF THE CASE
Introduction
According to Appellants, their invention relates to a transparent thin
film transistor (TFT) and its method of manufacture.
Claim 1 is illustrative of the invention (disputed limitation in italics):
1. A transparent Thin Film Transistor (TFT)
comprising:
transparent source and drain electrodes;
a transparent semiconductor activation layer arranged to
contact the source and drain electrodes and having source and
drain regions arranged therein; and
a doping section arranged between the transparent source
and drain electrodes and the transparent semiconductor
activation layer and having the same doping type as that of the
source and drain regions and having a doping concentration
different from that of the source and drain regions,
wherein the doping section comprises regions of the
transparent semiconductor activation layer including a surface
contacting the source and drain electrode,
wherein the doping section comprises doping layers
interposed between and in contact with both the source and
drain electrodes and the transparent semiconductor activation
layer.
Rejection on Appeal
The Examiner rejected claims 1, 4, 5, 8, 11, 12, and 29-31 under 35
U.S.C. § 103(a) as being unpatentable over Yamazaki (US 6,849,872 B1,
Feb. 1, 2005). Ans. 4-12.
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Issue on Appeal
Based on Appellants’ arguments, the issue on appeal is whether
Yamazaki teaches or suggests a doping section that “comprises doping
layers interposed between and in contact with both the source and drain
electrodes and the transparent semiconductor activation layer,” as recited in
claim 1.
ANALYSIS
We have reviewed the Examiner’s rejections in light of Appellants’
contentions that the Examiner has erred. We disagree with Appellants’
conclusions. We adopt as our own the findings and reasoning set forth in the
Examiner’s Answer. We highlight and address the following findings and
arguments for emphasis.
The Examiner finds that Yamazaki describes a TFT with doping
layers interposed between and in contact with source and drain electrodes
and the semiconductor activation layer, as recited in claim 1. Ans. 4-5, 12-
19. The Examiner refers to Figure 4 of Yamazaki. Figure 4(C) of Yamazaki
is reproduced below:

Figure 4(C) shows a partially formed TFT with source
regions 407a and 407b and drain regions 409a and 409b.

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The Examiner finds that regions 407a and 409a in Figure 4(C)
(formed within source and drain regions 407 and 409) correspond to the
claimed “doping layers” and are in contact with source and drain regions
407b and 409b (the remaining portions of source and drain regions 407 and
409), which are within the semiconductor activation layer. Ans. 4-5;
Yamazaki, col. 6, ll. 36-53. Thus, Yamazaki teaches “doping layers” in
contact with the semiconductor activation layer, as recited in claim 1. Ans.
5.
While Figure 4 does not explicitly show source and drain electrodes,
the Examiner finds that Yamazaki describes adding them to the TFT shown
in Figure 4(D) in such a way that doping layers 407a and 409a are
interposed between and in contact with the source and drain electrodes and
the semiconductor activation layer, as recited in claim 1. Ans. 4.
Specifically, after the structure in Figure 4(D) is obtained (by adding a
silicon nitride film 405 to the surface of the structure in Figure 4(C)),
Yamazaki explains that a phosphosilicate glass (PSG) film is formed on the
surface “and a hole for an electrode [is] made to form an aluminum
electrode[] in a source region and a drain region.” Ans. 4; Yamazaki, col.
10, ll. 24-26; see also Yamazaki, col. 8, ll. 31-33 (describing another
example in which “a hole [is] made to provide an aluminum electrode[] in
the source and the drain regions”). Based on this description, the Examiner
finds that Yamazaki teaches source and drain electrodes formed through the
outer layer to contact source and drain regions 407a and 409a (i.e., the
doping layers). Ans. 4, 13-14. The Examiner notes that the electrodes must
contact source and drain regions 407a and 409a (the doping layers) rather
than source and drain regions 407b and 409b because “otherwise, such
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electrodes would go through the side wall spacers 414 (fig. 4C), which
would lead to short-circuit problems with the gate 410.” Ans. 14. As the
Examiner properly finds, the result of such formation of electrodes in source
and drain regions 407a and 409a, as shown in Figure 4(D), is that doping
layers 407a and 409a are interposed between and in contact with both the
source and drain electrodes and the semiconductor activation layer, as
recited in claim 1. Ans. 14.
We are not persuaded by Appellants’ arguments to the contrary. First,
Appellants’ arguments regarding Figure 3 of Yamazaki (App. Br. 12-13;
Reply Br. 12) are unpersuasive as the Examiner relies on the configuration
shown in Figure 4 rather than Figure 3. Second, we do not agree with
Appellants’ assertion that Yamazaki “actually teaches that in Figure 4 the
electrodes do not adjoin the source/drain regions.” App. Br. 14 (emphasis
in original); see also Reply Br. 12. Appellants cite the following from
Yamazaki (col. 6, ll. 63-65): “In the example of FIG. 4, a silicon nitride film,
a gate electrode, and a source or a drain region do not adjoin . . . .” App. Br.
13; Reply Br. 12. That statement refers only to a gate electrode, and
therefore is not pertinent to whether Figure 4 of Yamazaki teaches doping
layers in contact with source and drain electrodes, as recited in claim 1. See
Ans. 17-18.
Finally, we are not persuaded by Appellants’ argument that Yamazaki
does not teach or suggest source and drain electrodes in contact with doping
layers 407a and 409a. Reply Br. 14. Appellants allege that electrodes could
be formed through side walls 414 (presumably to contact source and drain
regions 407b and 409b) because “[m]easures to insulate any cavity in the
side walls 410 [sic] are known in the art.” Id. Yamazaki, however, only
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describes making holes for providing electrodes in outer layers, not creating
cavities in the side walls that insulate the gate and forming electrodes within
those cavities. See Yamazaki, col. 8, ll. 31-33; col. 10, ll. 24-26. Therefore,
we concur with the Examiner’s reading of Yamazaki as teaching source and
drain electrodes formed through outer layers to contact doping layers 407a
and 409a, thus meeting the limitation of “doping layers interposed between
and in contact with both the source and drain electrodes and the transparent
semiconductor activation layer,” as recited in claim 1.
For at least these reasons, we sustain the Examiner’s § 103(a)
rejection of claim 1 as well as claims 4, 5, 8, 11, 12, and 29-31, for which
Appellants have not made separate, detailed arguments.
CONCLUSION
The Examiner has not erred in rejecting claims 1, 4, 5, 8, 11, 12, and
29-31 as being unpatentable under 35 U.S.C. § 103(a).

DECISION
The Examiner’s rejection of claims 1, 4, 5, 8, 11, 12, and 29-31 is
affirmed.
No time period for taking any subsequent action in connection with
this appeal may be extended under 37 C.F.R. § 1.136(a)(1)(iv).

AFFIRMED

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