Ex Parte Ishikawa et al

Patent Trial and Appeal Board

Aug 9, 2016

11900493 (P.T.A.B. Aug. 9, 2016)

UNITED STA TES p A TENT AND TRADEMARK OFFICE
APPLICATION NO. FILING DATE
111900,493 09/10/2007
44765 7590 08/11/2016
INTELLECTUAL VENTURES - ISF
ATTN: DOCKETING, ISF
3150 - 139th Ave SE
Bldg.4
Bellevue, WA 98005
FIRST NAMED INVENTOR
Muriel Y. Ishikawa
UNITED STATES DEPARTMENT OF COMMERCE
United States Patent and Trademark Office
Address: COMMISSIONER FOR PATENTS
P.O. Box 1450
Alexandria, Virginia 22313-1450
www .uspto.gov
ATTORNEY DOCKET NO. CONFIRMATION NO.
1003-002-002B-DIV001 3359
EXAMINER
LIN, JERRY
ART UNIT PAPER NUMBER
1631
NOTIFICATION DATE DELIVERY MODE
08/11/2016 ELECTRONIC
Please find below and/or attached an Office communication concerning this application or proceeding.
The time period for reply, if any, is set in the attached communication.
Notice of the Office communication was sent electronically on above-indicated "Notification Date" to the
following e-mail address( es):
ISFDocketlnbox@intven.com
PTOL-90A (Rev. 04/07)
UNITED STATES PATENT AND TRADEMARK OFFICE
BEFORE THE PATENT TRIAL AND APPEAL BOARD
Ex parte MURIEL Y. ISHIKAWA,
EDWARD K.Y. JUNG, NATHAN P. MYHRVOLD,
RICHA WILSON, and LOWELL L. WOOD, JR. 1
Appeal2012-001612
Application 11/900,493
Technology Center 1600
Before LORA M. GREEN, ALLEN R. MacDONALD, and
JACQUELINE T. HARLOW, Administrative Patent Judges.
GREEN, Administrative Patent Judge.
DECISION ON APPEAL
This is a decision on appeal under 35 U.S.C. § 134 from the
Examiner's rejections of claims 94 and 108-120. We have jurisdiction
under 35 U.S.C. § 6(b).
We affirm. We also enter a new ground of rejection of claims 94 and
108-120 under 35 U.S.C. § 112, second paragraph, for indefiniteness.
1 According to Appellants, the Real Party in Interest is Searete LLC. (App.
Br. 3).
Appeal2012-001612
Application 11/900,493
STATEMENT OF THE CASE
Claim 94 is representative of the claims on appeal, and reads as
follows:
94. A system, comprising:
circuitry for designating one or more epitopes of at least one agent
associated with a progression of the at least one agent in a host; and
circuitry for designating an immune response component related to
treating the host in response to one or more aspects related to the
progression of the at least one agent in the host.
(App. Br. 48).
The following grounds of rejection are before us for review2:
I. Claims 94 and 108-120 stand rejected under 35 U.S.C. § 102(b) as
being anticipated by Chirino3 (Ans. 5).
II. Claims 94 and 108-120 stand provisionally rejected on the ground
of nonstatutory obviousness-type double patenting as being
unpatentable over claims 1, 30, and 40 ofUSSN 11/728,950 (Ans.
8).
III. Claims 94 and 108-120 stand provisionally rejected on the ground
of nonstatutory obviousness-type double patenting as being
unpatentable over claims 1, 19, and 37 ofUSSN 11/807,336 (Ans.
10).
2 The obviousness-type double patenting rejections over USSNs 10/925,905
(Ans. 7), 11/044,656 (Ans. 8), and 11/731,001 (Ans. 9), are moot in view of
the abandonment of those applications.
3 Chirino et al., US 2003/0022285 Al, published Jan. 30, 2003 ("Chirino").
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Application 11/900,493
IV. Claims 94 and 108-120 stand provisionally rejected on the ground
of nonstatutory obviousness-type double patenting as being
unpatentable over claims 1, 13, and 25 ofUSSN 11/807,337 (Ans.
11).
We affirm rejection III, but reverse rejection I. We do not reach the
merits of rejections II and IV. We enter also a new ground of rejection.
ISSUE (Rejection I)
Has the Examiner established by a preponderance of the evidence that
Chirino anticipates the claimed systems?
FINDINGS OF FACT
\Ve find that the following enumerated findings of fact (FF) are
supported by at least a preponderance of the evidence. Ethicon, Inc. v.
Quigg, 849 F.2d 1422, 1427 (Fed. Cir. 1988) (explaining the general
evidentiary standard for proceedings before the Office).
FF 1. The Examiner's statement of Rejection I may be found at page 5 of
the Answer.
FF 2. The Examiner finds Chirino's teaching of a computer at paragraph 20
anticipates the claimed systems because "[t]he language after the
word 'for' in the claims is interpreted as intended use, but not
necessarily as a limitation of the claims." (Ans. 5).
FF 3. According to Chirino:
In an additional aspect, the present invention provides methods
for generating a polypeptide exhibiting enhanced
immunogenicity comprising the steps of inputting a target
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Application 11/900,493
protein backbone structure with variable residue positions into a
computer, applying in any order at least one computational
protein design algorithm and at least one computational
immunogenicity filter and identifying at least one variant protein
with enhanced immunogenicity. This same method may be used
to generate polypeptides exhibiting reduced immunogenicity.
(Chirino i-f 20).
FF 4. The Specification teaches a method that includes:
designating one or more epitopes of at least one agent associated
with a progression of the at least one agent in a host; and
designating an immune response component related to treating
the host in response to one or more aspects related to the
progression of the at least one agent in the host.
(Spec. at 2).
FF 5. As to "systems" the Specification teaches (emphasis added):
In one or more various aspects, related systems include but
are not limited to circuitry and/or programmingfor effecting the
herein-referenced method aspects; the circuitry and/or
programming can be virtually any combination of hardware,
software, and/or firmware configured to effect the herein-
referenced method aspects depending upon the design choices of
the system designer.
(Id. at 3).
PRINCIPLES OF LAW
An intended use or purpose "usually will not limit the scope of the
claim because such statements usuallv do no more than define a context in ,;
which the invention operates." Boehringer Ingelheim Vetmedica, Inc. v.
Schering-Plough Corp., 320 F.3d 1339, 1345 (Fed. Cir. 2003).
In order for a prior art reference to serve as an anticipatory reference,
it must disclose every limitation of the claimed invention, either explicitly or
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Application 11/900,493
inherently. In re Schreiber, 128 F.3d 1473, 1477 (Fed. Cir. 1997). In order
to satisfy the functional limitations in an apparatus claim, however, the prior
art apparatus as disclosed must be capable of performing the claimed
function. Id. at 1478.
ANALYSIS
Appellants argue that "[t]he Examiner committed error by dismissing
the specific recitations of the claims as 'intended use, but not necessarily as
a limitation of the claims,"' and thus "clearly failed to establish a prima
facie case of anticipation in the record." (App. Br. 28).
We agree with Appellants that the Examiner's legal analysis
concerning intended use is improper. (Ans. 5). Although the Examiner is
correct that statements of intended use ordinarily do not limit the scope of a
claim - See Boehringer Ingelheim, 320 F.3d at 1345 - in certain
circumstances, functional language may be used to add limitations to an
apparatus claim, and must be analyzed just as any other limitation. See K-2
Corp. v. Salomon S.A., 191 F.3d 1356, 1363 (Fed. Cir. 1999); Wright Med.
Tech., Inc. v. Osteonics Corp., 122 F.3d 1440, 1443--44 (Fed. Cir. 1997).
Specifically, when functional language adds a structural limitation to
an apparatus claim, it does so because the language describes something
about the structure of the apparatus rather than merely listing its intended or
preferred uses. See, e.g., K-2, 191 F.3d at 1363. Further, when functional
language is associated with programming or some other structure required to
perform the function, that programming or structure must be present in order
to meet the clairn limitation. Typhoon Touch Techs., Inc. v. Dell, Inc., 659
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Appeal2012-001612
Application 11/900,493
F.3d 1376, 1380 (Fed. Cir. 2011) (discussing Microprocessor Enhancement
Corp. v. Texas Instruments, Inc., 520 F.3d 1367 (Fed. Cir. 2008)).
Appellants' claim 94 is directed to
A system, comprising:
circuitry for designating one or more epitopes of at least one agent
associated with a progression of the at least one agent in a host; and
circuitry for designating an immune response component related to
treating the host in response to one or more aspects related to the
progression of the at least one agent in the host.
(emphasis added).
According to Appellants' Specification, in order to perform the
functions of "designating one or more epitopes of at least one agent ... "and
"designating an immune response component ... "as claimed, "systems
include but are not limited to circuitry and/or programming for effecting the
herein-referenced method aspects" (see FFs 4 and 5).
Here, the Examiner does not explain how the Chirino reference
teaches or suggests the claimed functionality, much less how one of ordinary
skill in the art would program the computer disclosed by Chirino to perform
such functionality. Thus, we conclude that the Examiner has failed to
establish that Chirino anticipates the system of claim 94, and reverse the
rejection as to that claim. As claims 108-120 depend from claim 94, we
reverse the rejection as to those claims as well.
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Application 11/900,493
CONCLUSION OF LAW
We conclude that the Examiner has not established by a
preponderance of the evidence that Chirino anticipates the claimed systems.
Accordingly, we reverse the Examiner's anticipation rejection of claims 94
and 108-120.
ISSUE (Rejection III)
Has the Examiner established by a preponderance of the evidence that
claims 94 and 108-120 rejected in the provisional obviousness-type double
patenting rejection are rendered obvious by claims 1, 19, and 37 of
copending application USSN 11/807,336?
FINDINGS OF FACT
FF 6. The Examiner's statement of the rejection may be found at page 10 of
the Answer. We adopt the Examiner's findings and conclusions as our own.
ANALYSIS
Appellants argue that the Examiner's "allegations are based on a
misconstrued version of Appellant's independent claim 94," and are "based
on conclusory statements, without evidence or factual basis." (App. Br. 42).
We disagree, as the rejection explains the Examiner's reasoning as to
why the appealed claims are rendered obvious by the claims relied upon by
the Examiner in making the rejection. (Ans. 10). Specifically, the Examiner
indicates how the rejected claims recite systems with circuitry for
identifying an epitope of an agent and an immune response to the epitope,
and how such epitopes are computable. (Id.) The Examiner further notes
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Appeal2012-001612
Application 11/900,493
how claims 1, 19 and 37 ofUSSN 11/807,336 recite "circuitry to perform
the method that includes identifying the computable epitopes of one agent,
predicting changes to the epitope, and identifying [an] immune response
associated with the computable epitope." (Id.).
CONCLUSION OF LAW
We conclude that the Examiner established by a preponderance of the
evidence that claims 94 and 108-120 rejected in the provisional
obviousness-type double patenting rejection are rendered obvious by claims
1, 19, and 37 of copending application USSN 11/807,336. We thus affirm
Rejection III.
REJECTIONS II and IV
Claims 94 and 108-120 stand provisionally rejected on the ground of
nonstatutory obviousness=type double patenting as being unpatentable over
claims 1, 30, and 40 ofUSSN 11/728,950 (Ans. 8). Claim 30 of copending
application USSN 11/728,950, however, has been cancelled, and claims 1
and 40 ofUSSN 11/728,950 have been amended since the present appeal
was filed.
Claims 94 and 108-120 stand provisionally rejected on the ground of
nonstatutory obviousness-type double patenting as being unpatentable over
claims 1, 13, and25ofUSSN11/807,337 (Ans. 11). Claims 1, 13, and25
of copending USSN 11/807,337, however, have been amended since the
present appeal was filed. Therefore, we decline to reach the merits of the
Examiner's provisional obviousness type double patenting rejections over
copending applications USSN 11/728,950 and USSN 11/807,337, as the
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Application 11/900,493
claims are no longer the same as those originally considered by the
Examiner. ExparteJerg, 2012 WL 1375142 at *3 (BPAI2012)
(informative) ("Panels have the flexibility to reach or not reach provisional
obviousness-type double-patenting rejections.") (citing Ex parte Moncla, 95
USPQ2d 1884 (BP AI 2010) (precedential) ).
NEW GROUND OF REJECTION
Pursuant to our authority under 37 C.F.R. § 41.50(b), we enter a new
ground of rejection for claims 94 and 108-120 under 35 U.S.C. § 112,
second paragraph, for indefiniteness.
Specifically, we construe each of the "circuitry for" limitations recited
in independent claim 94 as "means-plus-function" limitations subject to 35
U.S.C. § 112, sixth paragraph, and conclude that claim 94 and each of its
dependent claims are rendered indefinite under 35 U.S.C. § 112, second
paragraph, due to the Specification's failure to disclose corresponding
structure for performing either of the recited functions.
Claims 108-1204 are dependent on claim 94, and, thus, those claims
are rejected as well.
4 We note that the dependent claims 108-111, 114, 116, and 118, also
contain "circuitry for" limitations, but determine there is no need to
separately address those added limitations for purposes of this new ground
of rejection.
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Application 11/900,493
FINDINGS OF FACT
FF 7. The Specification teaches that the "application relates, in general, to
detection and/or treatment" (Spec. 2).
FF 8. As to "systems" the Specification teaches (emphasis added):
In one or more various aspects, related systems include but
are not limited to circuitry and/or programming for effecting the
herein-referenced method aspects; the circuitry and/or
programming can be virtually any combination of hardware,
software, and/or firmware configured to effect the herein-
referenced method aspects depending upon the design choices of
the system designer.
(Id. at 3).
FF 9. The Specification teaches (emphasis added):
The foregoing detailed description has set forth various
embodiments of the devices and/or processes via the use of block
diagrams, flowcharts, and/or examples. Insofar as such block
diagrams, flowcharts, and/or examples contain one or more
functions and/or operations, it will be understood by those
within the art that each function and/or operation within such
block diagrams, flowcharts, or examples can be implemented,
individually and/or collectively, by a wide range of hardware,
software, firmware, or virtually any combination thereof In one
embodiment, several portions of the subject matter described
herein may be implemented via Application Specific Integrated
Circuits (AS I Cs), Field Programmable Gate Arrays (FPGAs ),
digital signal processors (DSPs ), or other integrated formats.
However, those skilled in the art will recognize that some aspects
of the embodiments disclosed herein, in whole or in part, can be
equivalently implemented in standard integrated circuits, as one
or more computer programs running on one or more computers
(e.g., as one or more programs running on one or more computer
systems), as one or more programs running on one or more
processors (e.g., as one or more programs running on one or more
microprocessors), as firmware, or as virtually any combination
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Application 11/900,493
thereof, and that designing the circuitry and/or writing the code
for the software and or firmware would be well within the skill of
one of skill in the art in light of this disclosure.
(Id. at 35-36).
FF 10. The Specification teaches further (emphasis added):
In a general sense, those skilled in the art will recognize
that the various aspects described herein which can be
implemented, individually and/or collectively, by a wide range
of hardware, software, firmware, or any combination thereof can
be viewed as being composed of various types of "electrical
circuitry." Consequently, as used herein "electrical circuitry"
includes, but is not limited to, electrical circuitry having at least
one discrete electrical circuit, electrical circuitry having at least
one integrated circuit, electrical circuitry having at least one
application specific integrated circuit, electrical circuitry
forming a general purpose computing device configured by a
computer program (e.g., a general purpose computer configured
by a computer program which at least partially carries out
processes and/or devices described herein, or a microprocessor
configured by a computer program which at least partially carries
out processes and/or devices described herein), electrical
circuitry forming a memory device (e.g., forms of random access
memory), and/or electrical circuitry forming a communications
device (e.g., a modem, communications switch, or optical-
electrical equipment).
(Id. at 36-37).
FF 11. The Specification teaches further (emphasis added):
Those skilled in the art will recognize that it is common
within the art to describe devices and/or processes in the fashion
set forth herein, and thereafter use standard engineering
practices to integrate such described devices and/or processes
into data processing systems. That is, at least a portion of the
devices and/or processes described herein can be integrated into
a data processing system via a reasonable amount of
experimentation. Those having skill in the art will recognize that
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Application 11/900,493
a typical data processing system generally includes one or more
of a system unit housing, a video display device, a memory such
as volatile and non-volatile memory, processors such as
microprocessors and digital signal processors, computational
entities such as operating systems, drivers, graphical user
interfaces, and applications programs, one or more interaction
devices, such as a touch pad or screen, and/or control systems
including feedback loops and control motors .... A typical data
processing system may be implemented utilizing any suitable
commercially available components, such as those typically
found in data computing/communication and/or network
computing/ communication systems.
(Id. at 37).
FF 12. The Specification teaches further (emphasis added):
The herein described aspects depict different components
contained within, or connected with, different other components.
It is to be understood that such depicted architectures are merely
exemplary, and that in fact many other architectures can be
implemented which achieve the same functionality. In a
conceptual sense; any arrangement of components to achieve the
same functionality is effectively "associated" such that the
desired functionality is achieved. Hence, any two components
herein combined to achieve a particular functionality can be seen
as "associated with" each other such that the desired
functionality is achieved, irrespective of architectures or
intermedial components. Likewise, any two components so
associated can also be viewed as being "operably connected", or
"operably coupled", to each other to achieve the desired
functionality, and any two components capable of being so
associated can also be viewed as being "operably couplable", to
each other to achieve the desired functionality.
(Id. at 37-38).
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Application 11/900,493
FF 13. Figure 14 is reproduced below:
·-:~~=;~~~.
i
14i0
1400
""'J , I A computer sys!em
A computer program
.--- .. ~· ,_.'. ·-· '•· .-. - ·--~- ,_-' ----------- .. ···-·
HbUi
a first set cf instructions for !
designating one or more
•.!i!R!.i.9P.§~~--9.f