Ex Parte Iben

Board of Patent Appeals and Interferences

Jun 15, 2009

10897275 (B.P.A.I. Jun. 15, 2009)

UNITED STATES PATENT AND TRADEMARK OFFICE
____________

BEFORE THE BOARD OF PATENT APPEALS
AND INTERFERENCES
____________

Ex parte ICKO ERIC TIMOTHY IBEN
____________

Appeal 2009-002064
Application 10/897,275
Technology Center 2800
____________

Decided:1 June 17, 2009
____________

Before JOSEPH F. RUGGIERO, ROBERT E. NAPPI,
and KARL D. EASTHOM, Administrative Patent Judges.

EASTHOM, Administrative Patent Judge.

DECISION ON APPEAL

1 The two-month time period for filing an appeal or commencing a civil
action, as recited in 37 C.F.R. § 1.304, begins to run from the decided date
shown on this page of the decision. The time period does not run from the
Mail Date (paper delivery) or Notification Date (electronic delivery).
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STATEMENT OF THE CASE
Appellant appeals under 35 U.S.C. § 134 from the final rejection of
claims 1-25, the only claims pending (App. Br. 5).2 We have jurisdiction
under 35 U.S.C. § 6(b).
We affirm.
Appellant’s claimed device is for protecting electronic components,
such as magnetoresisitive (MR) sensors in a tape head or disk head, from
electrostatic discharge (ESD) and electrical overstress (EOS) damage. The
protective device comprises multiple sets of crossed diodes on a substrate.
The substrate can be coupled to a cable. (Abstract; Spec. 2:12-13).
Exemplary claims 1 and 21 follow:
1. A device for protecting an electronic device from
electrostatic discharge (ESD), comprising:
a substrate adapted for coupling to at least one of a multi-
element tape drive head and a cable coupled to an electronic
device;
multiple sets of crossed diodes coupled to the substrate, each set
of crossed diodes being coupled to a unique pair of leads; and
contact leads coupled to the substrate, the contact leads being in
electrical communication with the sets of diodes.
21. A device for protecting an electronic device from
electrostatic discharge (ESD), comprising:
a chip adapted for coupling to a cable;
the chip having multiple sets of crossed diodes, each set of
diodes being for providing ESD protection to an individual
component of an electronic device coupled to the cable;

2 The Appellant’s Brief (filed Jan. 14, 2008) (“App. Br.”) and Reply Brief
(filed June 26, 2008) (“Reply Br.”) and the Examiner’s Answer (mailed Apr.
29, 2008) (“Ans.”) detail the respective positions of the parties.
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the chip having contact leads in electrical communication with
the sets of diodes, the electrical leads which can be electrically
connected to conductors of the cable.
The Examiner relies on the following prior art references:
Day US 4,475,140 Oct. 2, 1984
Curtis US 5,198,965 Mar. 30, 1993
Murdock US 5,748,412 May 5, 1998
Jiang US 6,288,885 B1 Sep. 11, 2001
Carr US 6,607,923 B2 Aug. 19, 2003
Rathweg US 6,914,748 B2 Jul. 5, 2005
(filed Jun. 5, 2002)
Smith US 7,027,275 B2 Apr. 11, 2006
(filed Jan. 10, 2003)
The Examiner rejected:
Claim 21 as anticipated under 35 U.S.C. § 102(b) by Murdock;
Claims 1-5 and 11-16 as obvious under 35 U.S.C. § 103(a) based on
Murdock and Carr;
Claim 6 as obvious under 35 U.S.C. § 103(a) based on Murdock, Carr,
and Smith;
Claims 7-10 and 17 as obvious under 35 U.S.C. § 103(a) based on
Murdock, Carr, and Day;
Claims 13, 19, 22, and 23 as obvious under 35 U.S.C. § 103(a) based
on Murdock, Carr, and Jiang;
Claim 20 as obvious under 35 U.S.C. § 103(a) based on Murdock,
Carr, and Curtis; and
Claims 18, 24, and 25 as obvious under 35 U.S.C. § 103(a) based on
Murdock and Rathweg.

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ISSUES
Appellant’s arguments (App. Br. 10; Reply Br. 3) with respect to the
anticipatory rejection of claim 21 assert the failure of Murdock to disclose a
cable and multiple diode sets. Appellant’s arguments present the following
issue:
Did Appellant show that the Examiner erred in finding that Murdock
discloses “a chip adapted for coupling to a cable; the chip having multiple
sets of crossed diodes” as recited in claim 21?
Appellant’s arguments (App. Br. 11-13) with respect to the
obviousness rejection based on Murdock and Carr focus on claims 1, 4, and
5. Appellant’s arguments present the following issues:
Did Appellant demonstrate that the Examiner erred in finding that
Murdock and Carr collectively teach 1) multiple sets of crossed diodes each
coupled to a unique pair of leads as set forth in claim 1; 2) wherein each set
of crossed diodes in claim 1 includes multiple diodes aligned in series in
each direction as required by dependent claim 4; and 3) wherein for each set
of crossed diodes in claim 4, the number of diodes in one bias direction is
different than a number of diodes in another bias direction as required by
dependent claim 5?
Finally, with respect to claims 7-10 and 17, Appellant asserts (App.
Br. 14) that Day is nonanalogous art. Thus, the final issue presented is:
Is Day nonanalogous art?

FINDINGS OF FACT (FF)
Appellant’s Disclosure
1. Appellant does not provide a definition for a cable.
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2. Appellant refers to a cable 504 and Figure 5 for support of the
cable limitation in claims 1 and 21 (App. Br. 7 (citing Spec. 19:14 et seq.;
Fig. 5)).
3. Figure 7 depicts, according to the Specification, “conductive wire
traces 612 in the upper metallized layer” of cable 606 (Spec. 20:21-23).
Insulative layers and chips may be bonded to the cable (Spec. 21:8-19).
4. Appellant states that “since modern tape heads have multiple read
elements, it can be expensive to add packages containing individual diodes
or pairs of diodes for each element, particularly when the head and cable are
scrapped during the testing phase” (Spec. 5:8-10).
5. Appellant employs a resistor “as an option,” which can be
“connected to each end of the MR sensor and to ground to discharge any
common mode charge built up on the leads” (Spec. 13:12-14).
Murdock
6. Murdock discloses protecting, preferably with diodes having a
nonlinear resistance (col. 2, ll. 28-47), a head assembly comprising a
magnetoresistive sensor connected via “at least two electrical conductors” to
detection circuitry (col. 1, ll. 18-21). Murdock discloses “additional reading
or writing sensor/transducers” in a head 28 connected in the same manner to
the detection circuitry 16 (col. 3, ll. 60-64).
7. Murdock describes the conductors as follows:
first and second conductors electrically connecting the
magnetoresisitive sensor element and the detection circuitry
typically comprise conductive traces, bonding pads and
electrical wires . . . . The bonding pads provide a surface by
which electrical conductors such as wire may be attached to
electrically connect detection circuitry and the
magnetoresisitive sensor. The wires are typically tacked or
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bonded to the bonding pads and to at least one surface of the
slider. The wires further extend along the gimbal, the load
beam and the arm to the detection circuitry.
(Col. 1, ll. 51-65 (emphasis added)).
8. Murdock also depicts and describes conductive traces 44a-44d:
fabricated or deposited upon a dielectric material such as a
polyimide . . . which is preferably flexible to form a flex circuit
50. Conductive traces 44a-44d preferably extend beyond the
dielectric material of flex circuit 50 in the form of flying leads
49 . . . . Flex circuit 50 is adhesively secured to suspension 24 .
. . . Flex circuit 50 and conductive traces 44a-44d extend along
support arm 22 and actuator arm 20 (shown in FIG. 1) to
detection circuitry 16.
(Col. 4, l. 64 to col. 5, l. 15 (emphasis added); see also Figs. 1, 2).
9. “[B]undled wires or other conventional conducting interconnects
may be used in lieu of the flexible circuit 50 and conductive traces 44 for
providing an electrical connection between magnetoresisitive sensor element
34 and detection circuitry 16.” (Col. 5, ll. 24-29).
10. Murdock depicts and describes crossed diodes comprising three
or more diodes 70 in one series branch connected in parallel to three or more
oppositely directed diodes 72 in another series branch. Both diode branches
constitute a diode package 30, which protectively shunts magnetoresistive
sensor 34. (Figs. 2, 3c; col. 7, ll. 6-18).
11. Figure 2 depicts diode package 30 connected to the
magnetoresistive sensor 34 through the flex circuit 50 traces 44a and 44b at
contact pads 42a and 42b (col. 4, ll. 54-63). Figure 8 depicts a similar diode
package 230, which “may have any one of the circuit configurations 30a-30f
illustrated in FIGS. 3a-3f” (col. 11, ll. 42-44). Diode assembly “preferably
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includes at least one small surface packaged diode chip die mounted to bond
pads . . .” (col. 11, ll. 27-28).
12. “Although depicted as electrically interconnecting contact pads
42a and 42b of electrical conductors 18a and 18b, respectively, diode
assembly 30 may be positioned across electrically conductors 18a and 18b
anywhere between magnetoresistive sensor element 34 and detection
circuitry 16” (col. 6, ll. 21-25).
13. Murdock also discloses diode sets described as assemblies and
arrays 30 and 130 each mounted on individual magnetoresistive sensor
sliders 34 of a plurality of such sliders in a wafer to protect the slider sensors
from electrostatic discharge during handling (col. 8, ll. 26-47). Figures 6
and 7 depict exposed conductors 206 of diodes 200 and 202 on the wafer
(see also col. 8, ll. 48-63). As an alternative to the direct diode fabrication
on sliders 34, separate diodes or diode arrays 30 or 130 in “[s]mall surface
mount diode chips, or preferably their even smaller unpackaged dies, may be
bonded onto and across portions of the electrical conductors 18a and 18b,
such as conductive traces 40a and 40b or contact pads 42a and 42b, on slider
32” (col. 8, ll. 43-47).
14. “As can be appreciated, the voltage-current characteristics of
diode assembly 30 must be tailored to the operation conditions of
magnetoresistive sensor element 34 and the level of electrostatic discharge
protection required” (col. 6, ll. 31-34). As examples, Murdock discloses
different diode configurations of varying numbers of parallel and series
diodes in Figures 3a-3d for different diode packages 30. Figure 3d shows a
single Zener diode providing asymmetric overvoltage protection relative to
the polarity of voltage spikes (i.e., the Zener diode turns on and thereby
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shunts lesser magnitudes of negative pulses as compared to positive pulses).
(See col. 7, ll. 19-40).
Carr
15. Carr depicts three separate crossed diode sets each connected to a
different set of leads to protect an MR component 12: crossed diodes D1, D2
connected to leads R+ and R-; crossed diodes D3 and D4 connected to lead
R+ and an implied lead on shield 118; and crossed diodes D5 and D6
connected to lead R- and another implied lead on shield 118. The R- lead
connects directly to ground. (Fig. 12).
16. Carr’s “slider 13 supports one or more magnetic read/write
transducers 21, also referred to as MR read/inductive heads . . .” (col. 5, ll.
27-28). “[E]ach actuator may support a number of sliders” (col. 6, l. 2).
Carr’s system applies to both disk and tape storage systems (col. 5, ll. 18-
22).
Day
17. Day discloses providing a path to ground from a diode 35 through
a “leakage resistor 37” in the low voltage control portion (e.g., 8 volts) of a
circuit (col. 3, ll. 3-6; col. 4, ll. 23-25; see also Fig.; Abstract). Day explains
the reason for the leakage resistor: “This resistor prevents stray voltage
build-up in the floating control circuit due to voltage induced into the probe
circuitry by stray magnetic fields or like influences on the probe lead” (col.
4, ll. 25-29).

PRINCIPLES OF LAW
“[T]he examiner bears the initial burden, on review of the prior art or
on any other ground, of presenting a prima facie case of unpatentability.” In
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re Oetiker, 977 F.2d 1443, 1445 (Fed. Cir. 1992). Under § 102, Appellant
may sustain this burden by showing that the prior art reference relied upon
by the Examiner fails to disclose an element of the claim. “It is axiomatic
that anticipation of a claim under § 102 can be found only if the prior art
reference discloses every element of the claim.” See In re King, 801 F.2d
1324, 1326 (Fed. Cir. 1986) (citing Lindemann Maschinenfabrik GMBH v.
Am. Hoist & Derrick Co., 730 F.2d 1452, 1457 (Fed. Cir. 1984)). “A
reference anticipates a claim if it discloses the claimed invention ‘such that a
skilled artisan could take its teachings in combination with his own
knowledge of the particular art and be in possession of the invention.’” In re
Graves, 69 F.3d 1147, 1152 (Fed. Cir. 1995) (quoting In re LeGrice, 301
F.2d 929, 936 (CCPA 1962)) (emphasis deleted).
Under § 103, a holding of obviousness can be based on a showing that
“there was an apparent reason to combine the known elements in the fashion
claimed.” KSR Int’l Co. v. Teleflex Inc., 550 U.S. 398, 418 (2007). Such a
showing requires:
“some articulated reasoning with some rational underpinning to
support the legal conclusion of obviousness” . . . . [H]owever,
the analysis need not seek out precise teachings directed to the
specific subject matter of the challenged claim, for a court can
take account of the inferences and creative steps that a person
of ordinary skill in the art would employ.
Id. (citation omitted).
If the Examiner makes such a showing, the burden then shifts to
Appellant to overcome the prima facie case with argument and/or evidence.
Obviousness is then determined on the basis of the evidence as a whole and
the relative persuasiveness of the arguments. See Oetiker, 977 F.2d at 1445.
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“In order to rely on a reference as a basis for rejection of the
applicant’s invention, the reference must either be in the field of the
applicant’s endeavor, or, if not, then be reasonably pertinent to the particular
problem with which the inventor was concerned.” Id. at 1447.

ANALYSIS
ANTICIPATION
Murdock
Claim 21
Appellant’s argument (App. Br. 10) that Murdock’s “conductive
traces are not a cable, but rather [are] formed on a slider” because “the
conductive traces are fabricated on the slider 32, preferably deposited on a
wafer containing a plurality of sliders,” lacks merit. Murdock’s chip 30, for
example, comprising diode arrays with multiple sets of crossed diodes, is
connected to the cable of flex circuit 50 (FF 6-13), as the Examiner found
(Ans. 3, 4), or to Murdock’s “bundled wires or other conventional
conducting interconnects” (FF 9). Appellant’s reference to other
embodiments notwithstanding, Murdock discloses connecting the chip diode
array package anywhere along the cable (FF 12). Moreover, claim 21
merely requires “a chip adapted for coupling to a cable.” In other words, the
claim does not recite an affirmative cable connection.
Even if claim 21 requires a cable connection, Appellant’s assertion
that Murdock’s wires do not constitute a cable connection (App. Br. 10) fails
to explain how any cable connection recited in claim 1 is patentably distinct
from Murdock’s disclosed cable connections described above and by the
Examiner (Ans. 3-4). Murdock’s flex cable 50 comprising conductive
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traces, and conventional bundled wires, appear similar to Appellant’s
disclosed cables (compare FF 7-9 with FF 1-4).
Appellant shifts the argument in the Reply Brief (Reply Br. 3) and
asserts for the first time that Murdock’s diodes in Figure 3c do not comprise
“multiple sets of crossed diodes, each set of diodes being for providing ESD
protection to an individual component of an electronic device . . . .”
According to Appellant (id.), Murdock only discloses a “single set” of
crossed diodes that protects a single device 34, because “Murdock is
directed to a disk drive system, which has only one MR [magnetoresistive]
element in the head.”
Appellant’s argument is not persuasive for several reasons. First,
Murdock discloses “additional reading or writing sensor/transducers” in a
head (FF 6). As such, skilled artisans would recognize that Murdock
implicitly discloses protecting all such sensors (see Graves, 69 F.3d at
1152). Second, as the Examiner implicitly found, claim 21 does not require
protection for more than one “individual component,” even though the claim
requires multiple sets of diodes to protect that one component. “Construing
claims broadly during prosecution is not unfair to the applicant . . . because
the applicant has the opportunity to amend the claims to obtain more precise
claim language.” In re Am. Acad. of Sci. Tech Ctr., 367 F.3d 1359, 1364
(Fed. Cir. 2004).
Finally, as Appellant notes (see supra citing (App. Br. 10)), Murdock
discloses a wafer containing a plurality of sliders. Additionally, Murdock
discloses a diode set mounted on each slider in the wafer (FF 13).
Murdock’s wafer with multiple sets of diodes each protecting a separate MR
slider component (FF 13) constitutes the claimed chip. That is, Murdock
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refers to a “small surface packaged diode chip die” (FF 11) and “[s]mall
surface mount diode chips, or preferably their even smaller unpackaged
dies” (FF 13), thus Murdock’s wafer reasonably constitutes an unpackaged
chip die – i.e., a chip. Claim 21 recites “a chip adapted for coupling to a
cable . . . [and chip diodes] for providing ESD protection to an individual
component of an electronic device coupled to the cable.” As noted above,
the claim merely specifies an intended use for the chip – an intention to
eventually attach it to a cable. Therefore, Murdock’s wafer chip meets claim
21 because the chip, carrying multiple sets of diodes each shunting an
individual MR sensor, is “adapted for coupling to a cable” at, for example,
the exposed conductors 206 (i.e., “contact leads”) of the wafer (FF 12).
Accordingly, we will sustain the Examiner’s rejection of claim 21.
OBVIOUSNESS
Murdock and Carr
Claims 1-3 and 11-16
Appellant argues (App. Br. 11), with respect to claim 1, that each
diode set in Figure 12 of Carr (D1-D2, D3-D4, D5-D6) “is in actuality
coupled to the same pair of leads.” The argument lacks merit. Carr
discloses each of the three different diode sets connected to a unique set of
leads (FF 14) as the Examiner found (Ans. 5, 13-14).
Appellant also asserts (App. Br. 12) that the Examiner’s logic for
modifying Murdock based on Carr, i.e., to protected different elements, is
erroneous because Carr’s Figure 12 only depicts protection of one element.
This argument does not address the Examiner’s additional rationale (Ans.
15) of “redundant protection for the same element by providing multiple
short circuit path[s] . . . .” The Examiner’s rationale, supported by Carr’s
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disclosure (see FF 15), constitutes “‘some articulated reasoning with some
rational underpinning to support the legal conclusion of obviousness,’”
which Appellant has not rebutted. See KSR, 550 U.S. at 418 (citation
omitted). Additionally, Murdock and Carr each disclose multiple sensors
each having unique leads and suggest protection thereof (see FF 6, 7, 13,
15).
Therefore, we will sustain the Examiner’s rejection of claim 1. For
the same reasons, we will also sustain the Examiner’s rejection of claims 2,
3 and 11-16, which depend from claim 1, because Appellant relies on the
same arguments presented for claim 1 (see App. Br. 12).
Claims 4 and 5
Appellant argues (App. Br. 13) with respect to claim 4 that “Murdock
only discloses a single set of crossed diodes having multiple diodes in series
(Fig. 3c).” The Examiner’s rejection, based on obviousness, posits that
Murdock discloses multiple sets of diodes, whereas Carr discloses
connecting similar such crossed diode sets each to a unique set of leads
(Ans. 5-6). As such, it would have been obvious to substitute Murdock’s
crossed set of series diodes (FF 10) for each of Carr’s sets of single crossed
diodes at each unique lead (FF 15) to tailor the diode protection to each
sensor as Murdock teaches (FF 10, 14). Additionally, as noted above,
Murdock and Carr each disclose multiple sensors each implicitly having
unique leads and diode protection (see FF 6, 16).
With respect to claim 5, Appellant’s arguments notwithstanding (App.
Br. 13), Murdock does suggest altering the number of diodes in each branch
for asymmetrical protection depending on the relative polarity and strength
of anticipated undesired voltage spikes. For example, Figure 3d shows
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asymmetric protection based on different polarities of voltage spikes and
Murdock teaches tailoring protection to each sensor (FF 14). Murdock’s
Figure 3d discloses one diode in one branch and zero in the other. As such,
altering the number of series diodes in each branch of a diode set having
multiple diodes (FF 10; see Murdock, Fig. 3c) to correspond to the different
levels of negative and positive spikes shorted according to Murdock’s
teachings of asymmetrical protection (see FF 14; Murdock, Fig. 3d) would
have been obvious. Appellant has not presented evidence or argument to
show that such a modification would have been “uniquely challenging or
difficult for one of ordinary skill in the art” or would have “represented an
unobvious step over the prior art.” Leapfrog Enters., Inc. v. Fisher-Price,
Inc., 485 F.3d 1157, 1162 (Fed. Cir. 2007).
Appellant’s arguments, apparently based on a lack of anticipation (see
App. Br. 13), fail to demonstrate Examiner error. Therefore, we will also
sustain the Examiner’s rejection of claims 4 and 5.
Murdock, Carr, and Day
Claims 7-10 and 17
Appellant’s argument (App. Br. 14) with respect to claim 7, that Day
is not analogous art, also fails to demonstrate Examiner error. As the
Examiner found: “The leakage resistor of Day, solves the same problem as
the invention: to prevent stray/unwanted voltage buildup to protect a device
(see Day, Column 4, lines 23-29) by providing a path for the residual charge
to escape to ground, and therefore, Day reference is analogous art” (Ans. 16-
17). Appellant asserts that “applicant’s endeavor” and “particular problem”
of concern are “providing ESD protection for a tape drive head or an
electronic device” (App. Br. 14).
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This assertion does not demonstrate error. The argument improperly
merges the two prongs of the analogous art test, see Oetiker, 977 F.2d at
1447, into one prong, and accordingly, lacks a legal basis. Day is concerned
with dissipating, and thereby preventing, charge build up in low voltage
circuits (FF 17). Thus, Day’s disclosure pertains to one of Appellant’s
specific problems of preventing charge build-up and also pertains to
Appellant’s general field of endeavor of preventing damage to components
caused by the subsequent discharge of any such charge build-up. Appellant
and Day solve the specific problem of charge build-up in the same manner,
by providing a leakage resistor path to ground (see FF 5, 17). As such, Day
is at least “reasonably pertinent to the particular problem with which the
inventor was concerned.” Oetiker, 977 F.2d at 1447.
Appellant’s related arguments (Reply Br. 11), inter alia, that Day is
not concerned with preventing a voltage spike, that Day does not provide
crossed diodes, and that Day’s resistor “in the escape path” of Murdock’s
protective diode assembly “would slow such escape,” do not address the
“leakage” resistor’s particular purpose of dissipating charge prior to a need
for the charge escape – i.e., eliminating the charge necessary for a
discharge–the same purpose for which Appellant provides a leakage resistor
(see FF 5). As long as the diodes shunt the MR sensor, as occurs in
Murdock and Carr, providing Day’s leakage resistor path from the shunt to
ground, as set forth in claim 7 and as generally proposed by the Examiner
(see Ans. 8), does not defeat the purpose of the shunt or slow any diode
conduction, contrary to Appellant’s arguments (Reply Br. 11). Further,
Murdock’s or Carr’s parallel diodes themselves inherently include parallel
nonlinear resistance (see FF 6, 9), and one of Carr’s diode sets connects to a
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lead which connects directly to ground (FF 15); therefore, additional
resistors would not thwart the diode circuits’ protective function.
Accordingly, we will sustain the Examiner’s rejection, based on
Murdock, Carr, and Day, of claim 7, and of claims 8-10 and 17, which were
not separately argued.
Murdock, Carr, and either Smith, Jiang, or Curtis
Claims 6, 133, 19, 20, 22, and 23
For the reasons above, we will also sustain the rejections of claim 6,
based on the added teaching of Smith; claims 13, 19, 22, and 23, based on
the added teaching of Jiang; and claim 20, based on the added teaching of
Curtis. Appellant relies on arguments presented for claims 1 and 21, which
are not persuasive of Examiner error for reasons discussed above. (See App.
Br. 9, 12-15).
Murdock and Rathweg
Claims 18, 24, and 25
We will also sustain the rejection of claim 24, which depends from
claim 21, because Appellant relies on arguments presented for claim 21,
which are not persuasive of Examiner error as explained above.
We will also sustain the rejection of independent claim 25, and of
dependent claim 18 which depends from claim 1. Appellant relies on
arguments presented for claim 1, rejected based on Murdock and Carr,
which are not persuasive of Examiner error for reasons explained above.
Moreover, the Examiner relies on a different combination of references,
Murdock and Rathweg, to teach the limitations of claims 18 and 25 (Ans.

3 The rejection of claim 13, separately rejected without Jiang, was sustained
above.
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10-12). As such, Appellant’s arguments based on any alleged shortcomings
of the combination of Murdock and Carr with respect to claim 1 fail to
demonstrate error with respect to the rejection of dependent claim 18 and
independent claim 25 based on the combination of Murdock and Rathweg
(see Ans. 10-12). For example, the Examiner makes unchallenged findings
based on the latter combination (Ans. 10-12) to support the obviousness of
multiple sets of crossed diodes.
With further respect to independent claim 25, Appellant, relying on
arguments presented for claim 1, asserts (App. Br. 16) that Murdock’s
Figure 3c fails to show “multiple sets of crossed diodes.” However, claim
25 does not recite “a unique pair of leads” as claim 1 recites, so that
Appellant’s reliance on arguments presented for claim 1 fails to demonstrate
error. Thus, as the Examiner found (Ans. 10), any pair of two crossed
diodes in Murdock’s Figure 3c constitutes one set of a plurality (see FF 9)
with multiple such sets bolstered further by the Examiner’s findings
referenced supra as based on the combination of Murdock and Rathweg.
Additionally, as noted above, Murdock discloses multiple sensors each
implicitly having unique leads and diode protection (see FF 6).
Accordingly, we will sustain the Examiner’s rejection, based on
Murdock and Rathweg, of claims 18, 24, and 25.

CONCLUSION
Appellant did not show that the Examiner erred in finding that
Murdock discloses the cable recited in claim 21. Appellant also did not
demonstrate that the Examiner erred in finding that Murdock and Carr
collectively teach 1) multiple sets of crossed diodes each coupled to a unique
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pair of leads as set forth in claim 1; 2) wherein each set of crossed diodes in
claim 1 includes multiple diodes aligned in series in each direction as
required by dependent claim 4; and 3) wherein for each set of crossed diodes
in claim 4, the number of diodes in one bias direction is different than a
number of diodes in another bias direction as required by dependent claim 5.
Finally, with respect to claims 7-10 and 17, Day is analogous art.

DECISION
We affirm the Examiner’s decision rejecting claims 1-25.
No time period for taking any subsequent action in connection with
this appeal may be extended under 37 C.F.R. § 1.136(a)(1)(iv).

AFFIRMED

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