Ex Parte Huang et alDownload PDFPatent Trial and Appeal BoardJul 12, 201813276143 (P.T.A.B. Jul. 12, 2018) Copy Citation UNITED STA TES p A TENT AND TRADEMARK OFFICE APPLICATION NO. FILING DATE 13/276,143 10/18/2011 43859 7590 07/16/2018 SLATER MATSIL, LLP/TSMC 17950 PRESTON ROAD, SUITE 1000 DALLAS, TX 75252 FIRST NAMED INVENTOR Kuei-Wei Huang UNITED STATES DEPARTMENT OF COMMERCE United States Patent and Trademark Office Address: COMMISSIONER FOR PATENTS P.O. Box 1450 Alexandria, Virginia 22313-1450 www .uspto.gov ATTORNEY DOCKET NO. CONFIRMATION NO. TSMll-0765 8249 EXAMINER GORDON,MATTHEWE ART UNIT PAPER NUMBER 2892 NOTIFICATION DATE DELIVERY MODE 07/16/2018 ELECTRONIC Please find below and/or attached an Office communication concerning this application or proceeding. The time period for reply, if any, is set in the attached communication. Notice of the Office communication was sent electronically on above-indicated "Notification Date" to the following e-mail address(es): docketing@slatermatsil.com PTOL-90A (Rev. 04/07) UNITED STATES PATENT AND TRADEMARK OFFICE BEFORE THE PATENT TRIAL AND APPEAL BOARD Exparte KUEI-WEI HUANG, WEI-HUNG LIN, CHIH-WEI LIN, CHUN-CHENG LIN, MENG-TSE CHEN, MING-DA CHENG and CHUNG-SHI LIU Appeal 2017-011694 Application 13/276,143 Technology Center 2800 Before JEFFREY T. SMITH, N. WHITNEY WILSON, and LILAN REN, Administrative Patent Judges. WILSON, Administrative Patent Judge. DECISION ON APPEAL Appellants 1 appeal under 35 U.S.C. § 134(a) from the Examiner's November 21, 2013 decision finally rejecting claims 1-20 ("Final Act."). We have jurisdiction over the appeal under 35 U.S.C. § 6(b ). We affirm. 1 The real party in interest is identified as Taiwan Semiconductor Manufacturing Company, Ltd. (Br. 2). Appeal 2017-011694 Application 13/276,143 CLAIMED SUBJECT MATTER Appellants' disclosure is directed to a method for packaging a semiconductor device which includes providing a workpiece including a plurality of packaging substrates, removing a portion of the workpiece between the packaging substrates, and attaching a die to each of the packaging substrates (Abstract). Details of the claimed invention may be found in representative claim 8, which is reproduced below from the claims appendix of the Appeal Brief: 8. A method of packaging a semiconductor device, the method compnsmg: providing a workpiece, the workpiece comprising a plurality of packaging substrates; forming a dielectric material over the workpiece; forming a solder mask over the dielectric material; removing at least the solder mask between adjacent ones of the plurality of packaging substrates; attaching a die to each of the plurality of packaging substrates, the die including a plurality of bumps disposed thereon; and electrically coupling the plurality of bumps of the die to the plurality of packaging substrates. 2 Appeal 2017-011694 Application 13/276,143 REJECTIONS I. Claims 1---6 are rejected under 35 U.S.C. § I02(b) as anticipated by Lu. 2 II. Claims 7-20 are rejected under 35 U.S.C. § I03(a) as unpatentable over Lu in view Homma. 3 DISCUSSION Appellants do not argue the anticipation rejection over Lu of claims 1---6 (see Br. 6-124). Accordingly, we summarily affirm this rejection. With regards to Rejection II, the Examiner finds that, as shown in FIG. 6A, Lu teaches a method of packaging a semiconductor device which comprises providing a workpiece 44 with a plurality of packaging substrates 46, forming a dielectric material 54 over the workpiece, and then forming a dielectric layer 56 over dielectric material 54 (Final Act. 5, citing Lu, FIG. 6A, if 29): 2 Lu et al., US 2007 /0246821 Al, published October 25, 2007. 3 Homma et al., US 2011/0233786 Al, published September 29, 2011. 4 We note that Appellants Appeal Brief, filed July 10, 2014, was deemed non-compliant. A corrected version of the Appeal Brief was filed on August 18, 2014. The corrected Appeal Brief appears to be a supplement to the original July 10, 2014 Appeal Brief because the corrected Appeal Brief only contains modifications to the Claims Appendix and Summary of Claimed Subject Matter. The arguments in rebuttal to the appealed rejections appear only in the July 10, 2014 Appeal Brief. Accordingly, our references in this Decision to arguments presented by Appellants are to the July 10, 2014 Appeal Brief. 3 Appeal 2017-011694 Application 13/276,143 56 40 / 64 '72 ,,......'.:....:.~"4--~~~~.....4-...,....+i~~~~-,.>;,-r-f,'.P"'-'j....,-~ --60 : , , -60 60 : 58 ' I I ,___ _ _...._I_·I_ i1 I tr i \ i 52 { 48 \ 52 FIG. 6.A \ \ l j 52 1 150 46 J Lu's FIG. 6A shows a stage in the manufacture of a flip-chip package according to Lu's invention. The Examiner further finds that Lu teaches removing at least the dielectric layer 56 between adjacent ones of the plurality of packaging substrates (at portions 72), attaching a die 40 to each of the plurality of packaging substrates 46, where the die 40 includes a plurality of bumps 42 disposed thereon, and then electrically coupling the bumps 42 of the die to the packaging substrates 46 (id.). The Examiner finds that Lu does not teach that dielectric layer 56 is a solder mask (id.), but finds that Homma discloses a method of packaging a semiconductor device which includes forming an organic insulating film 4B (id., citing Homma, FIGS. 5A-C and ,r 28). The Examiner finds - and Appellants do not dispute (Br. 7) - that a person of skill in the art would have interpreted Homma's "organic insulating film" as a "solder mask" (id.). The Examiner determines that it would have been obvious to form Lu's insulating layer 56 using a solder mask "because Homma demonstrates 4 Appeal 2017-011694 Application 13/276,143 that such a feature is an art recognized equivalent for the same purpose of forming solder connections in a semiconductor chip package" (id.). Appellants make two principal arguments urging reversal of the rejection. Having reviewed these arguments and the evidence supporting them, we determined that based on a preponderance of the evidence of record, Appellants have not shown reversible error in the obviousness rejection of claims 7-20 over Lu in view of Homma. First, Appellants argue that the combination of Lu and Homma is "improper" (Br. 6). Appellants contend that Lu's layer 56, which the Examiner finds, in combination with Homma, corresponds to the claimed solder mask, is a dielectric layer for forming metallization interconnects (Br. 7, citing Lu ,r 30). Appellants further argue that Lu's dielectric layer 56 is made of entirely different materials than Homma's organic insulating film, and that the two layers are used for different purposes (Br. 7-8). Therefore, according to Appellants, the Examiner's stated reason to combine the teachings of the references (that Homma demonstrates that both the solder mask and Lu's layer 56 are art recognized equivalent for the same purpose of forming solder connections in a semiconductor chip package) is not supported by the evidence of record. This argument is not persuasive. As found by the Examiner, Lu's FIG. 6A shows that its dielectric layer 56 electrically isolates conductive patterns 60/62 so that solder connections 42 may be formed thereon (Ans. 2). 5 Therefore, the Examiner finds, Lu's dielectric layer 56 and Homma's solder mask 4B are used for the same purpose of forming solder connections 5 Moreover, as may be seen in Lu's FIG. 6A, bumps 42 are supported on layer 56. 5 Appeal 2017-011694 Application 13/276,143 on a semiconductor package (Ans. 2-3). Appellants do not persuasively challenge these findings. Accordingly, Appellants have not demonstrated reversible error in the Examiner's determination that Lu and Homma are properly combined in the rejection. Appellants also argue that even if the references are combined, they do not teach each of the limitations of claim 8, in particular the step of "removing at least the solder mask between adjacent ones of the plurality of packaging substrates" (Br. 9). Appellants argue that Homma teaches that its organic layer 4B (solder mask) is not formed between the plurality of the packaging substrates and, therefore, cannot be removed from that location (id.). Thus, Appellants argue that if Lu and Homma were combined as suggested by the Examiner, the combination would not include a step of "removing at least the solder mask between adjacent ones of the plurality of packaging substrates" (Br. 10). However, as explained by the Examiner (Ans. 4), using Homma's solder mask 4B in place of layer 56 of Lu would result in a solder mask which would need to be removed from between the packaging substrates, as taught by Lu. In essence, Appellants are arguing the references individually, but have not adequately addressed the combined teachings of the references. Such an argument is not persuasive. In re Keller, 642 F.2d 413, 426 (CCPA 1981) ( cannot show non-obviousness by attacking references individually when the rejection is based on a combination of references). Accordingly, Appellants have not shown reversible error in the rejection of claim 8 over Lu in view of Homma. Appellants advance the 6 Appeal 2017-011694 Application 13/276,143 same arguments in connection with the rejection of the other independent claim (claim 14) (Br. 11-12). These arguments are similarly unpersuasive. CONCLUSION We AFFIRM the rejection of claims 1-6 under 35 U.S.C. § 102(b) as anticipated by Lu. We AFFIRM the rejection of claims 7-20 under 35 U.S.C. § 103(a) as unpatentable over Lu in view Homma. No time period for taking any subsequent action in connection with this appeal may be extended under 37 C.F.R. § 1.136(a). AFFIRMED 7 Copy with citationCopy as parenthetical citation