Ex Parte Howson

Patent Trial and Appeal Board

Apr 24, 2017

13066957 (P.T.A.B. Apr. 24, 2017)

United States Patent and Trademark Office
UNITED STATES DEPARTMENT OF COMMERCE
United States Patent and Trademark Office
Address: COMMISSIONER FOR PATENTS
P.O.Box 1450
Alexandria, Virginia 22313-1450
www.uspto.gov
APPLICATION NO. FILING DATE FIRST NAMED INVENTOR ATTORNEY DOCKET NO. CONFIRMATION NO.
13/066,957 04/28/2011 John William Howson 070852.000100 3282
125968 7590 04/26/2017
Vorys, Sater, Seymour and Pease LLP
(ImgTec)
1909 K St., N.W.
Ninth Floor
Washington, DC 20006
EXAMINER
BADER, ROBERT N.
ART UNIT PAPER NUMBER
2614
NOTIFICATION DATE DELIVERY MODE
04/26/2017 ELECTRONIC
Please find below and/or attached an Office communication concerning this application or proceeding.
The time period for reply, if any, is set in the attached communication.
Notice of the Office communication was sent electronically on above-indicated "Notification Date" to the
following e-mail address(es):
patlaw @ vorys. com
vmdeluc a @ vorys. com
rntisdale@vorys.com
PTOL-90A (Rev. 04/07)
UNITED STATES PATENT AND TRADEMARK OFFICE
BEFORE THE PATENT TRIAL AND APPEAL BOARD
Ex parte JOHN WILLIAM HOWSON
Appeal 2017-000367
Application 13/066,957
Technology Center 2600
Before ST. JOHN COURTENAY III, JOHN A. EVANS, and SCOTT E.
BAIN, Administrative Patent Judges.
EVANS, Administrative Patent Judge.
DECISION ON APPEAL
Appellant1 seeks our review under 35 U.S.C. § 134(a) of the
Examiner’s Final Rejection of Claims 1—3 and 5—20. App. Br. 1. We have
jurisdiction under 35 U.S.C. § 6(b).
We REVERSE.2
1 The Appeal Brief identifies Imagination Technologies Limited, as the real
party in interest. App. Br. 1.
2 Rather than reiterate the arguments of Appellant and the Examiner, we
refer to the Appeal Brief (filed January 28, 2016, “App. Br.”), the Reply
Brief (filed September 28, 2016, “Reply Br.”), the Examiner’s Answer
(mailed July 28, 2016, “Ans.”), the Final Action (mailed July 29, 2015,
“Final Act.”), and the Amended Specification (filed May 4, 2015, “Spec.”)
for their respective details.
Appeal 2017-000367
Application 13/066,957
STATEMENT OF THE CASE
The claims relate to a method and apparatus for tessellating patches of
surfaces in a tile based three dimensional computer graphics rendering
system. See Abstract.
INVENTION
Claims 1,10, and 19 are independent. An understanding of the
invention can be derived from a reading of exemplary Claim 1, which is
reproduced below:
1. A method for processing tessellated patches of surfaces
in a tile-based three-dimensional graphics rendering system
comprising:
deriving, in a tiling unit, a per-tile list of primitive indices
for tessellated primitives produced from a higher-order surface
patch;
using the per-tile list of primitive indices for each tile to
identify visible tessellated primitives for that tile;
deriving domain points for the tessellated primitives that
were identified as being visible;
deriving attributes for the tessellated primitives that were
identified as being visible using data defining the higher order
surface patch; and
shading, by a programmable shading unit, the tessellated
primitives that were identified as being visible using the derived
attributes for the visible tessellated primitives.
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Appeal 2017-000367
Application 13/066,957
References and Rejections
Kajiya, et al., US 5,864,342 Jan. 26, 1999
Anjul Patney and John D. Owens, Real-Time Reyes-Style Adaptive
Surface Subdivision, 27 ACM Transactions on Graphics (Proceedings of
ACM SIGGRAPH Asia) 143:1-143:8 (December 2008)
Christian Eisenacher, et al., Real-Time View-Dependent Rendering of
Parametric Surfaces, Assn, for Comp. Mach., Inc. 137—144 (2009).
The claims stand rejected as follows:
1. Claims 1—3, 5—9, 19, and 20 stand rejected under pre-AIA 35 U.S.C.
§ 103(a) as being unpatentable over Eisenacher and Patney. Final
Act. 5-29.
2. Claims 10-18 stand rejected under pre-AIA 35 U.S.C. § 103(a) as
being unpatentable over Eisenacher and Kajiya. Final Act. 29-42.
ANALYSIS
We have reviewed the rejections of Claims 1—3 and 5—20 in light of
Appellant’s arguments that the Examiner erred. We consider Appellant’s
arguments seriatim, as they are presented in the Appeal Brief, pages 6—12.
Claims 1-3, 5-9,19, and 20: Obviousness over Eisenacher and Patney
Appellant argues these claims as a group in view of the limitations of
Claim 1. App. Br. 6.
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Appeal 2017-000367
Application 13/066,957
Deriving aper-tile list of primitive indices
The Examiner finds Eisenacher substantially teaches the limitations of
Claim 1 except Eisenacher fails to teach the limitation ‘“in a tile based three-
dimensional graphics rendering system.’” Final Act. 5. The Examiner finds
Patney teaches this limitation by disclosing: “‘Regardless of visibility, on­
screen Reyes primitives cannot be discarded until transparency and blending
have been resolved. To reduce this problem of potentially unbounded data,
most implementations divide the screen into screen-space tiles.’” Id.
(quoting Patney, §3.2,12).
Appellant contends neither Eisenacher, nor Patney, nor any
combination thereof, teaches “deriving, in a tiling unit, a per-tile list of
primitive indices for tessellated primitives produced from a higher-order
surface patch,” as recited in Claim 1. App. Br. 6.
The Examiner finds “Appellant’s argument that because Eisenacher’s
description of Patney does not include screen-space tiling, it would not be
obvious to one of ordinary skill in the art to modify Eisenacher’s system to
perform screen-space tiling as taught by Patney, is a piecemeal analysis of
the rejection.” Ans. 9.
Appellant replies Eisenacher’s “‘subdivision of patches’” is a much
broader concept than deriving the claimed “per-tile list of primitive indices.”
Reply Br. 3.
Our review of the Record fails to find where either Eisenacher or
Patney teaches the claimed “per-tile list of primitive indices.” Nor does the
Examiner direct our attention to such teaching in the prior art. To meet the
prima facie burden of production, the Examiner must set forth the statutory
basis of the rejection and the reference or references relied upon in a
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Appeal 2017-000367
Application 13/066,957
sufficiently articulate and informative manner as to meet the notice
requirement of 35 U.S.C. § 132(a). See In re Jung, 637 F.3d 1356, 1363
(Fed. Cir. 2011). For us to affirm the Examiner’s rejection on this record
would require speculation on our part. We decline to engage in speculation.
Because we do not sustain the Examiner’s rejection for the reasons
discussed herein, we need not address Appellant’s further arguments. See
Beloit Corp. v. Valmet Oy, TVW742 F.2d 1421, 1423 (Fed. Cir. 1984)
(finding an administrative agency is at liberty to reach a decision based on “a
single dispositive issue”).
Claims 10-18: Obviousness over Eisenacher and Kajiya.
Appellant contends neither Eisenacher nor Kajiya teach “deriving, in a
tiling unit, a per-tile list of primitive indices for tessellated primitives
produced from a higher-order surface patch,” as claimed. App. Br. 11.
The Examiner finds the “per-tile list of primitives” limitation is not
present in independent Claim 10, which only requires “means for performing
hidden surface removal on the patch.”
Contrary to the Examiner, Claim 10 explicitly recites “means for
deriving a per tile list of primitive indices for tessellated primitives produced
from a patch.” As discussed above, the Examiner has not directed our
attention to a teaching of such limitation in the prior art.
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Application 13/066,957
DECISION
The rejections of Claims 1—3 and 5—20 under 35 U.S.C. § 103(a) are
REVERSED.
REVERSED
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