Ex Parte HORLEY et alDownload PDFPatent Trial and Appeal BoardDec 21, 201813968991 (P.T.A.B. Dec. 21, 2018) Copy Citation UNITED STA TES p A TENT AND TRADEMARK OFFICE APPLICATION NO. FILING DATE 13/968,991 08/16/2013 73459 7590 12/26/2018 NIXON & V ANDERHYE, P.C. 901 NORTH GLEBE ROAD, 11 TH FLOOR ARLINGTON, VA 22203 FIRST NAMED INVENTOR John Michael HORLEY UNITED STATES DEPARTMENT OF COMMERCE United States Patent and Trademark Office Address: COMMISSIONER FOR PATENTS P.O. Box 1450 Alexandria, Virginia 22313-1450 www .uspto.gov ATTORNEY DOCKET NO. CONFIRMATION NO. JRL-550-1644 4643 EXAMINER AGUILERA, TODD ART UNIT PAPER NUMBER 2196 NOTIFICATION DATE DELIVERY MODE 12/26/2018 ELECTRONIC Please find below and/or attached an Office communication concerning this application or proceeding. The time period for reply, if any, is set in the attached communication. Notice of the Office communication was sent electronically on above-indicated "Notification Date" to the following e-mail address(es): PTOMAIL@nixonvan.com pair_nixon@firsttofile.com PTOL-90A (Rev. 04/07) UNITED STATES PATENT AND TRADEMARK OFFICE BEFORE THE PATENT TRIAL AND APPEAL BOARD Ex parte JOHN MICHAEL HORLEY, SIMON JOHN CRASKE, MICHAEL JOHN GIBBS, and PAUL ANTHONY GILKERSON 1 Appeal2017-002330 Application 13/968,991 Technology Center 2100 Before HUNG H. BUI, IRVINE. BRANCH, and AARON W. MOORE, Administrative Patent Judges. MOORE, Administrative Patent Judge. DECISION ON APPEAL 1 This paper is captioned by inventor name according to our pre-AIA convention. The Applicant, Appellant, and real party in interest is ARM Limited. (See App. Br. 3.) Appeal2017-002330 Application 13/968,991 STATEMENT OF THE CASE Appellant appeals under 35 U.S.C. § 134(a) from a Final Rejection of claims 1-16, 20, and 23, which are all of the pending claims. We have jurisdiction under 35 U.S.C. § 6(b). We affirm-in-part. THE INVENTION The application is directed to "tracing processing operations performed by a processing apparatus, and analysing the trace data produced during tracing." (Spec. 1: 10-11.) Claim 1, reproduced below, exemplifies the subject matter on appeal: 1. A processing apparatus comprising: processing circuitry configured to perform processmg operations in response to program instructions; a condition status storage location configured to store at least one condition flag indicating a property of a previous processing result; and trace circuitry configured to generate trace data elements indicative of said processing operations performed by said processing circuitry in response to said program instructions; wherein: said processing circuitry is responsive to at least one conditional instruction to perform a conditional operation in dependence on a current value of a subset of said at least one condition flag; and said trace circuitry is configured, in response to said processing circuitry processing at least one of said at least one conditional instruction, to generate a trace data element including a traced condition value indicative of at least said subset of said at least one condition flag, said traced condition value providing information for determining a processing outcome of said at least one conditional instruction. 2 Appeal2017-002330 Application 13/968,991 THE REFERENCES The prior art relied upon by the Examiner in rejecting the claims on appeal is: Boudreau US 4,503,495 Mar. 5, 1985 Bishop et al. US 5,784,552 July 21, 1998 DeWitt, Jr. et al. US 2003/0135719 Al July 17, 2003 Ashfield et al. US 2007 /0294592 Al Dec. 20, 2007 Cortex-MO Devices Generic User Guide: Jan. 8, 2016 3.3.6. Conditional execution ("ARM") THE REJECTIONS 1. Claims 1-5, 7-9, 12-15, 20, and 23 stand rejected under 35 U.S.C. § I03(a) as unpatentable over DeWitt and ARM. (See Final Act. 6- 17.) 2. Claim 6 stands rejected under 35 U.S.C. § I03(a) as unpatentable over DeWitt, ARM, and Ashfield. (See Final Act. 17-18.) 3. Claim 10 stands rejected under 35 U.S.C. § I03(a) as unpatentable over DeWitt, ARM, and Bishop. (See Final Act. 18-19.) 4. Claim 11 stands rejected under 35 U.S.C. § I03(a) as unpatentable over DeWitt, ARM, and Boudreau. (See Final Act. 19-21.) 5. Claim 16 stands rejected under 35 U.S.C. § I03(a) as unpatentable over De Witt and Ashfield. (See Final Act. 21-24. 2) 2 The Examiner has indicated that claims 17 and 18, which depend from claim 16, are allowable. (See Final Act. 3.) 3 Appeal2017-002330 Application 13/968,991 BACKGROUND The Invention The Specification describes how "[i]n a processing apparatus, a trace circuit may be provided for monitoring processing operations performed by a processing circuit and generating trace data indicative of the processing operations performed." (Spec. 1: 14--16.) "A processing apparatus may execute conditional instructions which specify an associated condition" and "[t]he processing outcome of a conditional instruction is dependent on whether the associated condition is satisfied at the time of execution of the conditional instruction." (Id. at 1:21-24.) "When execution of a conditional instruction is traced by a trace circuit, then the trace circuit may generate trace data including an indication of whether or not the condition was passed or failed" so that "[ w ]hen analysing the trace data then the pass/fail indication can be used to determine the outcome of the conditional instruction." (Id. at 1:24--27.) The Specification further explains that "when tracing some advanced processors, the pass/fail result of a conditional result can be difficult to obtain," for example, because processors "may comprise processing pipelines having multiple execution stages in parallel with one another" or "may perform out-of-order execution of instructions to improve performance." (Spec. 1:29-2: 1.) Appellant's "technique recognises that the values of the condition flags are typically more easily available than the pass/fail result of the conditional instruction," because they "are often part of the architectural state of the processing apparatus, and so ... can be read at an early stage of a processing pipeline without needing to monitor when, and at which stage 4 Appeal2017-002330 Application 13/968,991 of the pipeline, the execution result of the instruction becomes available." (Spec. 3:7-12.) Thus, according to Appellant, "by tracing the condition flag values rather than the pass/fail result, the configuration of the trace circuitry is simplified." (Id. at 3:12-13.) The Re} ection The Examiner finds that DeWitt teaches the majority of the subject matter of claim 1, but "does not explicitly disclose a condition status storage location configured to store at least one condition flag indicating a property of a previous processing result." (Final Act. 7.) The Examiner further finds, however, that "ARM discloses a condition status storage location configured to store at least one condition flag indicating a property of a previous processing result" and that "[i]t would have been obvious ... to modify the method of De Witt, which executes conditional instructions based on flags in a register, by incorporatingjlags in a register indicating a property of a previous processing result, as taught by ARM, as ARM would provide the advantages of a means for instructions to control the conditional execution of other instructions." (Id. at 7-8, emphasis added and omitted.) ANALYSIS Claims 1-15, 20, and 23 Appellant argues that "[w]hen claim 1 is (a) read as a whole and (b) read in light of the specification and figures," one skilled in the art would have understood that it "requires 'a trace data element including a traced condition value indicating at least said subset of said at least one condition flag' which indicates 'a property of a previous processing result."' (App. Br. 13.) Appellant also argues that "[n]either DeWitt nor the ARM document teaches the claimed trace data element" because neither "teaches generating 5 Appeal2017-002330 Application 13/968,991 a trace data element including a traced condition value that indicates a property of the previous processing result based on at least a subset of the at least one condition flag." (Id. at 13, 14.) Appellant further argues that "[ e ]ven if one could combine the APSR from the ARM document in the De Witt system ... , De Witt's modified system would not teach generating 'a trace data element including a traced condition value indicative of at least said subset of the said one a condition flag' where the condition flag indicates 'a property of a previous processing result."' (App. Br. 14--15). The fundamental problem, according to Appellant, is that the modified system "would still use a conventional technique for tracing conditional instructions that requires an indication of whether the condition was passed or failed for a given conditional instruction." (App. Br. 15, emphasis omitted.) "In other words," Appellant maintains, "the pass/fail result ... would be traced rather than tracing an indication of a property of a previous processing result indicated by the condition flag." (Id.) The Examiner responds that "[n]owhere does the claim recite 'a trace data element including a traced condition value indicating at least said subset of said at least one condition flag which indicates a property of a previous processing result.'" (Ans. 3.) The Examiner asserts that "the 'claimed' trace data element ... is not actually claimed" and "[t]hus ... cannot distinguish the claimed invention from DeWitt or ARM." (Id.) The Examiner further responds that "De Witt merely does not disclose that the 'at least one condition flag' indicates a property of a previous processing result," but that "ARM does disclose 'at least one condition flag' that indicates a property of a previous proceeding result as set forth in the 6 Appeal2017-002330 Application 13/968,991 final Office action," and that "it would have been obvious to modify DeWitt by including at least one condition flag which 'indicates a property of a previous processing result.'" (Id. at 3-4.) Regarding claim construction, Appellant argues that the Examiner "fails account for the word 'said' in 'said at least one condition flag,' which means that the condition flag indicated in the traced condition value is the same condition flag previously defined as indicating a property of the previous processing result." (Reply Br. 3.) Appellant further argues the Examiner "misunderstands the argument in part B.2 of the Appeal Brief," which is "not about whether it is obvious to combine De Witt and ARM ... but about whether such DeWitt-ARM modified system would result in what is claimed." (Id.) "Ultimately," Appellant argues, "the modification of DeWitt based on ARM does not result in claim 1 because the DeWitt-ARM combination ... would not have trace circuitry which generates a trace data element with a traced condition value indicative of a condition flag which indicates a property of a previous processing result." (Id. at 5---6.) We agree with Appellant on the claim construction issue. The claim recites "at least one condition flag indicating a property of a previous processing result" and, subsequently, "generat[ing] a trace data element including a traced condition value indicative of at least said subset of said at least one condition flag." By long established convention, "said at least one condition flag" refers to the antecedent "at least one condition flag." The second limitation, therefore, is functionally the same as "generat[ing] a trace data element including a traced condition value indicative of at least said subset of said [ at least one condition flag indicating a property of a previous processing result]." The claim thus requires that the trace data element 7 Appeal2017-002330 Application 13/968,991 include a traced condition value that is indicative of a subset of condition flags indicating a property of a previous processing result. Resolution of the claim construction issue that way compels us also to find for Appellant on obviousness. The Examiner finds that "De Witt does not explicitly disclose ... [ storing] at least one condition flag indicating a property of a previous processing result," but that ARM does, and that it would have been obvious to use ARM' s flags in De Witt to "provide the advantages of a means for instructions to control the conditional execution of other instructions." (Final Act. 7-8.) We agree with Appellant, however, that showing it would have been obvious to use a flag indicate a property of a previous result is insufficient to also show that it would have been obvious to generate a trace data element including a traced condition value indicative of the flag, as recited in claim 1. The Examiner has not made the further finding that, once a person of skill in the art determined to use flags for the processing, it also would have obvious to record the flags as part of the tracing. Because we find the Examiner has not established that the combination would have taught or suggested generating a trace data element including a traced condition value indicative of a condition flag indicating a property of a previous processing result, we do not sustain the obviousness rejection of (a) claim 1 and its dependent claims 2-12 and 23, or (b) independent claim 13 and its dependent claims 14, 15, and 20, which include the same condition flag language. Claim 16 Independent claim 16 recites "at least one condition flag indicating a condition of said processing apparatus" instead of "at least one condition 8 Appeal2017-002330 Application 13/968,991 flag indicating a property of a previous processing result." The Examiner rejects this claim as obvious in view of De Witt and Ashfield. (See Final Act. 21-24.) However, Appellant does not present any argument to show that the Examiner's rejection is in error. As such, we sustain the Examiner's obviousness rejection of claim 16. DECISION The rejections of claims 1-15, 20, and 23 are reversed. The rejection of claim 16 is affirmed. No time period for taking any subsequent action in connection with this appeal may be extended under 37 C.F.R. § 1.136(a)(l )(iv). AFFIRMED-IN-PART 9 Copy with citationCopy as parenthetical citation