11952527 (B.P.A.I. May. 23, 2012)

Ex Parte Heying et al

Board of Patent Appeals and InterferencesMay 23, 2012

11952527 (B.P.A.I. May. 23, 2012)

UNITED STATES PATENT AND TRADEMARKOFFICE UNITED STATES DEPARTMENT OF COMMERCE United States Patent and Trademark Office Address: COMMISSIONER FOR PATENTS P.O. Box 1450 Alexandria, Virginia 22313-1450 www.uspto.gov APPLICATION NO. FILING DATE FIRST NAMED INVENTOR ATTORNEY DOCKET NO. CONFIRMATION NO. 11/952,527 12/07/2007 Benjamin Heying NGC-00121(001971-804) 1422 64728 7590 05/24/2012 MILLER IP GROUP, PLC NORTHROP GRUMMAN CORPORATION 42690 WOODWARD AVENUE SUITE 200 BLOOMFIELD HILLS, MI 48304 EXAMINER NIESZ, JAMIE C ART UNIT PAPER NUMBER 2822 MAIL DATE DELIVERY MODE 05/24/2012 PAPER Please find below and/or attached an Office communication concerning this application or proceeding. The time period for reply, if any, is set in the attached communication. PTOL-90A (Rev. 04/07) UNITED STATES PATENT AND TRADEMARK OFFICE ________________ BEFORE THE BOARD OF PATENT APPEALS AND INTERFERENCES ________________ Ex parte BENJAMIN HEYING, LOULIA SMORCHKOVA, VINCENT GAMBIN, and ROBERT COFFIE ________________ Appeal 2010-002401 Application 11/952,527 Technology Center 2800 ________________ Before BRADLEY W. BAUMEISTER, ERIC B. CHEN, and GLENN J. PERRY, Administrative Patent Judges. PERRY, Administrative Patent Judge. DECISION ON APPEAL Appeal 2010-002401 Application 11/952,527 2 SUMMARY Appellants appeal under 35 U.S.C. Â§ 134(a) from the Examinerâ€™s rejection of claims 1-22. These claims stand rejected under 35 U.S.C. Â§ 103(a) as obvious over Sheppard (US 2006/0255366 A1; Nov. 16, 2006) in view of Xiang (US 6,657,267 B1; Dec. 2, 2003). We reverse. Pursuant to our authority under 37 C.F.R. 41.50(b), we reject claim 1 under 35 U.S.C. Â§ 102(e) as being anticipated by Okamoto et al (U.S. Patent No. 7,973,335 B2; issued July 5, 2011 (PCT parent filed Dec. 15, 2003)). STATEMENT OF CASE Appellants describe the present invention as a nitride-based field effect transistor (FET) possessing reduced electron trapping and gate current leakage. A relatively thick passivation layer reduces traps caused by device processing. A thin passivation layer below the gate terminal reduces a gate current leakage. The device structure comprises semiconductor device layers deposited on a substrate. A plurality of passivation layers are deposited on the semiconductor device layers. At least two of the passivation layers are made of a different dielectric material, so that one or more passivation layers can be removed using the interfaces between the different materials as etch stops. By this technique, the distance between the gate terminal and the semiconductor device layers can be tightly controlled and made very thin to increase device performance and reduce gate current leakage. See generally Abstract, Summary. Appeal 2010-002401 Application 11/952,527 3 Independent claim 1 is illustrative: 1. A field effect transistor device comprising: a substrate: a plurality of semiconductor device layers deposited on the substrate; a plurality of dielectric passivation layers deposited on the semiconductor device layers; a source terminal deposited directly on and in contact with the semiconductor device layers; a drain terminal deposited directly on and in contact with the semiconductor device layers; and a gate terminal deposited on at least one of the passivation layers, wherein at least two of the passivation layers are made of a different dielectric material and wherein the thickness of the passivation layers between the source terminal and the gate terminal and the drain terminal and the gate terminal is greater than the thickness of the one or more passivation layers between the gate terminal and the semiconductor device layers so that passivation layers are provided at sides of the gate terminal. CONTENTIONS The Examiner finds all of the elements of independent claim 1, for example, in the combined teachings of Sheppard and Xiang. Ans. 3. For convenience, Figure 1F of Sheppard is reproduced below: App App Figu mob elect barri barri Shep relie para eal 2010-0 lication 11 re 1F of Sh ility field e rodes. Ea er layer, th Accordin er layer 22 pardâ€™s bar s upon She graphs rea [0046] A The chan bandgap also hav barrier la certain e 22 is AlN between 02401 /952,527 eppard de ffect trans ch electrod e barrier l g to the E , cap laye rier layer ppard par d as follow barrier la nel layer of the bar e a larger e yer 22 ma mbodimen , AlInN, about 0.1 picts an A istor (HEM e is space ayer havin xaminer, S r 24, and p 22 is a pas agraphs [0 s: yer 22 is p 20 may ha rier layer 2 lectron af y be depo ts of the p AlGaN or nm and ab 4 lGaInN-b T) that in d apart fro g a wider heppard t assivation sivation la 046] and [ rovided o ve a bandg 2 and the finity than sited on th resent inv AlInGaN out 10 nm ased (or II cludes so m the cha bandgap t eaches thr layer 34. yer, the Ex 0047]. An n the chan ap that is channel la the barrie e channel ention, the with a thic . Example I-N) high urce, gate, nnel layer han the ch ee passiva To establi aminer pr s. 10. Th nel layer 2 less than t yer 20 ma r layer 22. layer 20. I barrier la kness of s of layers electron and drain by a annel. tion layers sh that imarily ese 0. he y The n yer : Appeal 2010-002401 Application 11/952,527 5 according to certain embodiments of the present invention are described in United States Patent Publication No. 2002/0167023A1, to Smorchkova et al., entitled "GROUP-III NITRIDE BASED HIGH ELECTRON MOBILITY TRANSISTOR (HEMT) WITH BARRIER/SPACER LAYER" the disclosure of which is incorporated herein by reference as if set forth fully herein. In particular embodiments of the present invention, the barrier layer 22 is thick enough and has a high enough Al composition and doping to induce a significant carrier concentration at the interface between the channel layer 20 and the barrier layer 22 through polarization effects when the barrier layer 22 is buried under ohmic contact metal. Also, the barrier layer 22 should be thick enough to reduce or minimize scattering of electrons in the channel due to ionized impurities deposited at the interface between the barrier layer 22 and a second cap layer 24 (FIG. 1B). [0047] The barrier layer 22 may be a Group III-nitride and has a bandgap larger than that of the channel layer 20 and a smaller electron affinity than the channel layer 20. Accordingly, in certain embodiments of the present invention, the barrier layer 22 is AlGaN, AlInGaN and/or AlN or combinations of layers thereof. The barrier layer 22 may, for example, be from about 0.1 nm to about 10 nm thick, but is not so thick as to cause cracking or substantial defect formation therein. In certain embodiments of the present invention, the barrier layer 22 is undoped or doped with an n-type dopant to a concentration less than about 1019 cm-3. In some embodiments of the present invention, the barrier layer 22 is AlxGa1-xN where O