Ex Parte Haney et al

Patent Trial and Appeal Board

Jun 1, 2017

13783644 (P.T.A.B. Jun. 1, 2017)

United States Patent and Trademark Office
UNITED STATES DEPARTMENT OF COMMERCE
United States Patent and Trademark Office
Address: COMMISSIONER FOR PATENTS
P.O.Box 1450
Alexandria, Virginia 22313-1450
www.uspto.gov
APPLICATION NO. FILING DATE FIRST NAMED INVENTOR ATTORNEY DOCKET NO. CONFIRMATION NO.
13/783,644 03/04/2013 Sarah Kay Haney 1194-132 1011
27820 7590 06/05/2017
WITHROW & TERRANOVA, P.L.L.C.
106 Pinedale Springs Way
Cary, NC27511
EXAMINER
DINKE, BITEW A
ART UNIT PAPER NUMBER
2823
NOTIFICATION DATE DELIVERY MODE
06/05/2017 ELECTRONIC
Please find below and/or attached an Office communication concerning this application or proceeding.
The time period for reply, if any, is set in the attached communication.
Notice of the Office communication was sent electronically on above-indicated "Notification Date" to the
following e-mail address(es):
patents @ wt-ip.com
PTOL-90A (Rev. 04/07)
UNITED STATES PATENT AND TRADEMARK OFFICE
BEFORE THE PATENT TRIAL AND APPEAL BOARD
Ex parte SARAH KAY HANEY, BRETT HULL,
and DANIEL NAMISHIA
Appeal 2016-005098
Application 13/783,644
Technology Center 2800
Before TERRY J. OWENS, JAMES C. HOUSEL, and
MERRELL C. CASHION JR., Administrative Patent Judges.
OWENS, Administrative Patent Judge.
DECISION ON APPEAL
STATEMENT OF THE CASE
The Appellants appeal under 35 U.S.C. § 134(a) from the Examiner’
rejection of claims 1—24. We have jurisdiction under 35 U.S.C. § 6(b).
The Invention
The Appellants claim a semiconductor die and a method for
fabricating a semiconductor device. Claim 1 is illustrative:
1. A semiconductor die on which a semiconductor device is
fabricated, comprising:
a substrate comprising an active area and a control contact area;
a first bond pad on at least a portion of the active area;
a floating control bond pad over the control contact area and
laterally extending over a portion of the first bond pad; and
Appeal 2016-005098
Application 13/783,644
a polyimide dielectric layer between the portion of the first
bond pad and the floating control bond pad.
The References
Osada US 2008/0252254 A1 Oct. 16,2008
Grivna US 2011/0136310 A1 June 9,2011
The Rejections
Claims 1—24 stand rejected under 35 U.S.C. § 103 over the
Appellants’ admitted prior art (AAPA) in view of Grivna and Osada.
OPINION
We affirm the rejection.
The Appellants argue the claims as a group (App. Br. 3—7). We
therefore limit our discussion to one claim, i.e., claim 1. Claims 2—24 stand
or fall with that claim. See 37 C.F.R. § 41.37(c)(l)(iv) (2012).
AAPA discloses a semiconductor die comprising a substrate (22)
having an active area (14) and a control contact area (16), and a first bond
pad (source bond pad 18) on a portion of the active area (14) (| 22; Fig. 1C).
Grivna discloses a semiconductor die comprising a substrate (13)
having an active area (280) and a control contact area (termination or edge
area 290), a first bond pad (contact structure 107) on at least a portion of the
active area (280), a floating control bond pad (conductive layer 110) over the
control contact area (290) and laterally extending over a portion of the first
bond pad (107), and dielectric layers (817, 818) between the portion of the
first bond pad (107) and the floating control bond pad (110) flflf 25, 47, 48;
Fig. 19). In one embodiment dielectric layer 817 is a deposited oxide and
dielectric layer 818 is a deposited nitride (148).
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Appeal 2016-005098
Application 13/783,644
Osada discloses a semiconductor die comprising insulating films over
semiconductor films, gate electrodes and the like (1165). The exemplified
insulating film materials include silicon oxide, silicon nitride and polyimide
(id.).
The Appellants provide no argument that given Osada’s disclosure,
one of ordinary skill in the art would not have used polyimide as an
alternative to Grivna’s oxide and/or nitride. The Appellants assert that
unlike Grivna’s vertical device wherein “since the source and drain regions
are vertically separated, additional components may be placed in the area
between the source and drain regions without increasing the amount of space
occupied in a semiconductor die” (App. Br. 5), Osada’s device is a
horizontal device wherein “an insulating layer must be used to physically
separate the source and drain, where the insulating layer occupies space on
the semiconductor die” (id.). Due to that difference, the Appellants argue,
one of ordinary skill in the art would not have looked to Osada and,
therefore, would not have been aware of Osada’s disclosure (App. Br. 5—6;
Reply Br. 3—4).
The Appellants provide no evidence, or even argument, that the
configurational difference between vertical and horizontal semiconductor
devices affects the suitability of those devices’ insulating material
compositions. The insulating layer appears to function the same way in both
of those configurations, so the suitable insulating material compositions for
those configurations appear to be the same. Consequently, one of ordinary
skill in the art, through no more than ordinary creativity, given Osada’s
indication that polyimide is a suitable alternative to semiconductor device
oxide and nitride insulating layer materials (1165), would have used
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Appeal 2016-005098
Application 13/783,644
polyimide as an alternative to Grivna’s oxide and/or nitride insulating layer
materials. See KSRInt’l Co. v. Teleflex Inc., 550 U.S. 398, 418 (2007) (in
making an obviousness determination one “can take account of the
inferences and creative steps that a person of ordinary skill in the art would
employ”).
Accordingly, we are not persuaded of reversible error in the rejection.
DECISION/ORDER
The rejection of claims 1—24 under 35 U.S.C. § 103 over the
Appellants’ admitted prior art in view of Grivna and Osada is affirmed.
It is ordered that the Examiner’s decision is affirmed.
No time period for taking any subsequent action in connection with
this appeal may be extended under 37 C.F.R. § 1.136(a)(l)(iv).
AFFIRMED
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