Ex Parte Hamilton et alDownload PDFPatent Trial and Appeal BoardAug 3, 201612949405 (P.T.A.B. Aug. 3, 2016) Copy Citation UNITED STA TES p A TENT AND TRADEMARK OFFICE APPLICATION NO. FILING DATE 12/949,405 11/18/2010 60501 7590 08/05/2016 LENOVO COMPANY (LENOVO-KLS) c/o Kennedy Lenart Spraggins LLP 8601 Ranch Road 2222 Ste. 1-225 AUSTIN, TX 78730 FIRST NAMED INVENTOR Jeffrey R. Hamilton UNITED STATES DEPARTMENT OF COMMERCE United States Patent and Trademark Office Address: COMMISSIONER FOR PATENTS P.O. Box 1450 Alexandria, Virginia 22313-1450 www .uspto.gov ATTORNEY DOCKET NO. CONFIRMATION NO. XRPS920100092US 1 5746 EXAMINER KROFCHECK, MICHAEL C ART UNIT PAPER NUMBER 2138 NOTIFICATION DATE DELIVERY MODE 08/05/2016 ELECTRONIC Please find below and/or attached an Office communication concerning this application or proceeding. The time period for reply, if any, is set in the attached communication. Notice of the Office communication was sent electronically on above-indicated "Notification Date" to the following e-mail address( es): office@klspatents.com kate@klspatents.com hanna@klspatents.com PTOL-90A (Rev. 04/07) UNITED STATES PATENT AND TRADEMARK OFFICE BEFORE THE PATENT TRIAL AND APPEAL BOARD Ex parte JEFFREY R. HAMIL TON, MELBA I. LOPEZ, ROSS L. MICKENS, and MARKESHA F. PARKER Appeal2015-002072 Application 12/949,405 Technology Center 2100 Before JOSEPH L. DIXON, JAMES R. HUGHES, and ERIC S. FRAHM, Administrative Patent Judges. DIXON, Administrative Patent Judge. DECISION ON APPEAL STATEMENT OF THE CASE Appellants appeal under 35 U.S.C. § 134(a) from a Final Rejection of claims 11-13 and 15-19. We have jurisdiction under 35 U.S.C. § 6(b). We affirm. The invention relates to backup memory administration (Spec. 1: 11- 12). Claim 11, reproduced below, is illustrative of the claimed subject matter: Appeal2015-002072 Application 12/949,405 11. A system for backup memory administration, the system compnsmg: random access memory; a memory backup controller coupled to the random access memory, wherein the memory backup controller is configured to: store in an active memory device blocks of computer data received from the random access memory, wherein the active memory device comprises a first flash memory and is communicably coupled to the memory backup controller via a memory device adapter by a first connector connecting the active memory device to the memory device adapter; record in a change log identifications of each block of computer data that is stored in the active memory device; detect a backup trigger event; and responsive to the detecting of the backup trigger event: copy from the active memory device, to a backup memory device, the blocks of data identified in the change log, wherein the backup memory device comprises a second flash memory and is communicably coupled to the memory backup controller via the memory device adapter by a second connector connecting the backup memory device to the memory device adapter, wherein the first connector and the second connector are independent of each other; and clear the change log, wherein the backup trigger event is triggered in response to one of a change in a power state of a processor and a change in the power state of the memory backup controller. 2 Appeal2015-002072 Application 12/949,405 REFERENCES The prior art relied upon by the Examiner in rejecting the claims on appeal is: Prabhu Innan Kawamura Shin Okada Harari Sela US 2003/0056062 Al US 2003/0088592 Al US 2005/0240637 Al US 2006/0069931 Al US 2007/0266215 Al US 7,362,618 B2 US 2010/0030982 Al REJECTIONS The Examiner made the following rejections: Mar. 20, 2003 May 8, 2003 Oct. 27, 2005 Mar. 30, 2006 Nov. 15, 2007 Apr. 22, 2008 Feb.4,2010 Claims 11 and 17 stand rejected under 35 U.S.C § 103(a) as being unpatentable over Kawamura, Prabhu, Sela, and Shin. Claims 12, 13, 18, and 19 stand rejected under 35 U.S.C § 103(a) as being unpatentable over Kawamura, Prabhu, Sela, Shin, Harari, and Okada. Claims 15 and 16 stand rejected under 35 U.S.C § 103(a) as being unpatentable over Kawamura, Prabhu, Sela, Shin, and Innan. Claims 11-13 and 15-19 stand provisionally rejected under the non- statutory ground of obviousness-type double patenting over claims 1-3 and 8-9 of U.S. Patent Application 13/494,382 to Hamilton et al. ANALYSIS The Obviousness Rejections Appellants contend "[t]he backup target DB region of Kawamura does not disclose the active memory device of the claims and is not analogous to the active memory device in any way" (Br. 6). Appellants also contend "[i]t is unclear what the Examiner contends discloses the claimed device adapter, 3 Appeal2015-002072 Application 12/949,405 or the claimed first and second connectors, but Sela merely discloses that two card readers are connected to a host device by two communication lines" (Br. 7). We disagree with Appellants. Kawamura discloses a backup processing system that updates data in a backup target DB region 111 in a storage device 110 (see Kawamura, i-fi-1 28-31). We are not persuaded by Appellants' argument that Kawamura's backup target DB region fails to disclose the claimed "active memory device" (see Br. 6). The Examiner finds "[t]he term 'active' is not specially defined within the current specification and it does not hold a special meaning in the computer memory art. Any memory device that is in use and not turned off, can be an 'active memory device."' (Ans. 4). Absent a Reply Brief rebutting the Examiner's broad, but reasonable interpretation of the claim language "active memory device," we agree with the Examiner that Kawamura's backup target DB region meets this limitation (id.). Further, to the extent Appellants argue Kawamura's backup target DB region is not a flash memory, as recited in claim 1, we note the Examiner relies on Sela, not Kawamura, for this feature (see Final Act. 5). We are also not persuaded by Appellants' argument that the Examiner failed to identify where the claimed "memory device adapter," "first connector," and "second connector" can be found in Sela (see Br. 7). The Examiner provides a clear mapping of the claimed elements to Sela's teachings as follows: "Looking at figure 3, ... [h]ost device (320) is analogous to the claimed memory device adaptor .... Card reader (340) and communication line (3 65) makeup the second connector . . . . The claimed first connector is the card reader (330) and the communication line (355) .... " Ans. 5---6. Appellants have not specifically explained why the 4 Appeal2015-002072 Application 12/949,405 identified components of Sela's Figure 3 fail to disclose the claimed "memory device adapter," "first connector," and "second connector." We are, therefore, not persuaded the Examiner erred in rejecting claim 11, and claim 17 not specifically argued separately. Although claims 12, 13, 15, 16, 18, and 19 are nominally argued separately, Appellants rely on the same arguments as discussed above regarding claim 11 (Br. 8). We thus also sustain the Examiner's rejections of claims 12, 13, 15, 16, 18, and 19. The Double Patenting Rejection Appellants provide no specific arguments regarding the non-statutory obviousness-type double patenting rejection. We, thus, proforma affirm the Examiner's double patenting rejection. CONCLUSIONS Under 35 U.S.C. § 103(a), the Examiner did not err in rejecting claims 11-13 and 15-19. Under the doctrine of non-statutory obviousness-type double patenting, Appellants have not shown error in the Examiner's rejection of claims 11-13 and 15-19. DECISION For the above reasons, the Examiner's decision rejecting claims 11-13 and 15-19 is affirmed. No time period for taking any subsequent action in connection with this appeal may be extended under 37 C.F.R. § 1.136(a)(l )(iv). AFFIRMED 5 Copy with citationCopy as parenthetical citation