Ex Parte Hakura et al

Patent Trial and Appeal Board

Feb 28, 2018

14045361 (P.T.A.B. Feb. 28, 2018)

United States Patent and Trademark Office
UNITED STATES DEPARTMENT OF COMMERCE
United States Patent and Trademark Office
Address: COMMISSIONER FOR PATENTS
P.O.Box 1450
Alexandria, Virginia 22313-1450
www.uspto.gov
APPLICATION NO. FILING DATE FIRST NAMED INVENTOR ATTORNEY DOCKET NO. CONFIRMATION NO.
14/045,361 10/03/2013 Ziyad S. HAKURA NVDA/SC-13-0114-US1 1445
102324 7590 03/02/2018
Arte.ois T aw Omim T T P/NVTDTA
EXAMINER
7710 Cherry Park Drive Suite T #104
Houston, TX 77095
LIU, GORDON G
ART UNIT PAPER NUMBER
2612
NOTIFICATION DATE DELIVERY MODE
03/02/2018 ELECTRONIC
Please find below and/or attached an Office communication concerning this application or proceeding.
The time period for reply, if any, is set in the attached communication.
Notice of the Office communication was sent electronically on above-indicated "Notification Date" to the
following e-mail address(es):
kcruz @ artegislaw.com
ALGdocketing @ artegislaw.com
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PTOL-90A (Rev. 04/07)
UNITED STATES PATENT AND TRADEMARK OFFICE
BEFORE THE PATENT TRIAL AND APPEAL BOARD
Ex parte ZIYAD S. HAKURA, CYNTHIA ANN EDGEWORTH
ALLISON, DALE L. KIRKLAND, ANDREI KHODAKOVSKY, and
JEFFREY A. BOLZ
Appeal 2017-009301
Application 14/045,3611
Technology Center 2600
Before THU A. DANG, MATTHEW J. McNEILL, and
SCOTT E. BAIN, Administrative Patent Judges.
DANG, Administrative Patent Judge.
DECISION ON APPEAL
1 According to Appellants, the real party in interest is NVIDIA Corporation.
App. Br. 3.
Appeal 2017-009301
Application 14/045,361
I. STATEMENT OF THE CASE
Appellants appeal under 35 U.S.C. § 134(a) from the Examiner’s
Final Rejection of claims 1—22, which constitute all the claims pending in
this application. We have jurisdiction under 35 U.S.C. § 6(b).
We reverse.
A. INVENTION
According to Appellants, the invention relates to “techniques for
managing graphics processing resources in a tile-based architecture” (Spec.
12).
B. ILLUSTRATIVE CLAIM
Claim 1 is exemplary and is reproduced below:
1. A computer-implemented method for managing graphics
processing resources in a tile-based architecture, the method
comprising:
storing a first release packet associated with a graphics
processing resource in a buffer;
initiating a replay of one or more graphics primitives stored in
the buffer and associated with the graphics processing resource; and
for each tile included in a plurality of tiles and processed during
the replay:
reading the first release packet from the buffer;
determining whether the tile is a last tile to be processed
during the replay; and
determining not to transmit the first release packet to a
screen-space pipeline and continuing to read graphics data
stored in the buffer if the tile is not the last tile to be processed
during the replay, or transmitting the first release packet to the
screen-space pipeline if the tile is the last tile to be processed
during the replay.
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Appeal 2017-009301
Application 14/045,361
C. REJECTIONS
Claims 1—10, 12—19, 21, and 22 stand rejected under 35 U.S.C.
§ 103(a) as being unpatentable over Rubinstein (US 7,102,646 Bl; issued
Sept. 5, 2006), and Purcell (US 8,605,102 Bl; issued Dec. 10, 2013).
Claims 11 and 20 stand rejected under 35 U.S.C. § 103(a) as being
unpatentable over Rubinstein, Purcell, and Zhu (US 6,323,860 Bl; issued
Nov. 27, 2001).
II. ISSUES
The dispositive issues before us are whether the Examiner has erred in
finding the combination of Rubinstein and Purcell teaches or suggests
“initiating a replay of one or more graphics primitives,” and “for each tile
. . . processed during the replay”: “reading the first release packet from the
buffer;” and “determining whether the tile is a last tile to be processed
during the replay” (claim 1).
III. ANALYSIS
Appellants contend “the portion of Purcell cited by the Examiner fails
to disclose any techniques that include, for each tile, reading a release packet
from a buffer and determining whether to transmit the release packet to a
screen-space pipeline based on whether the tile is the last tile to be processed
during a replay” (App. Br. 10—11, emphasis omitted). According to
Appellants, the Examiner “fails to map the release packet recited in claim 1
to any specific data structure disclosed by Purcell” {id. at 12).
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Appeal 2017-009301
Application 14/045,361
We have considered all of Appellants’ arguments and evidence
presented. We agree with Appellants that the preponderance of evidence on
this record does not support the Examiner’s finding that claim 1 would have
been obvious over Rubinstein in view of Purcell.
The Examiner finds that Purcell’s “geometry data packet is
corresponding to the release packet” (Ans. 4), wherein “the geometry data
packet is read in, the geometry data and the pointers are saved in the circular
buffer, and when it is a last tile and the data is processed, output the data to
the screen-space” {id. 5). We, however, cannot find, nor has the Examiner
clearly identified, any teaching or suggestion in the cited sections of “for
each tile . . . processed during the replay”: “reading the first release packet
from the buffer;” and “determining whether the tile is a last tile to be
processed during the replay” as required by claim 1. In particular, the
Examiner does not provide a clear mapping of the step of reading the first
release packet “for each tile” processed “during the replay” as required in
claim 1 to any portion in Purcell. (Final Act. 4—5, Ans. 4—9). In fact, we are
unsure as to what portion of Purcell the Examiner relies upon as teaching or
suggesting a “replay” of “graphics primitives stored in the buffer,” such that
a “release packet” is read “for each tile” processed “during the replay.” Id.
Because the Examiner has not fully developed the record to establish
how Purcell, when combined with Rubenstein, teaches or suggests the
disputed limitation, we find speculation would be required to affirm the
Examiner on this record. We decline to engage in speculation. “A rejection
. . . must rest on a factual basis . . . .” In re Warner, 379 F.2d 1011, 1017
(CCPA 1967). “The Patent Office has the initial duty of supplying the
factual basis for its rejection. It may not. . . resort to speculation, unfounded
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Application 14/045,361
assumptions or hindsight reconstruction to supply deficiencies in its factual
basis.” Id.
Therefore, on this record, we find a preponderance of the evidence
supports Appellants’ contention (App. Br. 21) that the Examiner has not
identified a teaching or suggestion of the limitations of claim 1. The
Examiner has not fully developed the record to show unpatentability of
claim 1 pursuant to 35 U.S.C. § 103(a). Therefore, we are constrained to
reverse the Examiner’s rejection of independent claim 1, independent claims
12 and 21 reciting substantially similar limitations (App. Br. 13), and claims
2—10, 13—19, and 21, depending respectively from claims 1 and 12, over
Rubinstein in view of Purcell. For similar reasons, we also reverse the
Examiner’s rejection of claims 11 and 20 over Rubinstein and Purcell, in
further view of Zhu.
V. CONCLUSION AND DECISION
The Examiner’s rejections of claims 1—22 under 35 U.S.C.
§ 103(a), are reversed.
REVERSED
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