Ex Parte Gschwind et al

Patent Trial and Appeal Board

Aug 13, 2018

14576710 (P.T.A.B. Aug. 13, 2018)

UNITED STA TES p A TENT AND TRADEMARK OFFICE
APPLICATION NO. FILING DATE FIRST NAMED INVENTOR
14/576,710 12/19/2014 Michael Karl Gschwind
46296 7590 08/15/2018
MARTIN & ASSOCIATES, LLC
P.O. BOX548
CARTHAGE, MO 64836-0548
UNITED STATES DEPARTMENT OF COMMERCE
United States Patent and Trademark Office
Address: COMMISSIONER FOR PATENTS
P.O. Box 1450
Alexandria, Virginia 22313-1450
www .uspto.gov
ATTORNEY DOCKET NO. CONFIRMATION NO.
ROC920140136US1 6198
EXAMINER
CHEN,ZHAN
ART UNIT PAPER NUMBER
2194
NOTIFICATION DATE DELIVERY MODE
08/15/2018 ELECTRONIC
Please find below and/or attached an Office communication concerning this application or proceeding.
The time period for reply, if any, is set in the attached communication.
Notice of the Office communication was sent electronically on above-indicated "Notification Date" to the
following e-mail address(es):
derekm@ideaprotect.com
PTOL-90A (Rev. 04/07)
UNITED STATES PATENT AND TRADEMARK OFFICE
BEFORE THE PATENT TRIAL AND APPEAL BOARD
Ex parte MICHAEL KARL GSCHWIND, JIN SONG JI,
RONALD I. MCINTOSH, and WILLIAM J. SCHMIDT 1
Appeal2018-000450
Application 14/576,7102
Technology Center 2100
Before ST. JOHN COURTENAY III, JAMES R. HUGHES, and
LINZY T. McCARTNEY, Administrative Patent Judges.
HUGHES, Administrative Patent Judge.
DECISION ON APPEAL
1 According to Appellants, the real party in interest is International Business
Machines Corporation. Appeal Br. 1.
2 The application on appeal has an effective filing date of Dec. 19, 2014.
Therefore, the Leahy-Smith America Invents Act (AIA) amendments to the
U.S. Code(§§ 102, 103) are applicable. See Manual of Patent Examining
Procedure (MPEP) § 2159.02 (The amended sections "apply to any patent
application that contains or contained at any time a claim to a claimed
invention that has an effective filing date that is on or after March 16,
2013.").
Appeal2018-000450
Application 14/576,710
STATEMENT OF THE CASE
Appellants seek our review under 35 U.S.C. § 134(a) of the
Examiner's Final Rejection of claims 9--17. Claims 1-8 have been canceled.
Final Act. 1-2. 3 We have jurisdiction under 35 U.S.C. § 6(b).
We reverse.
Appellants 'Invention
The invention at issue on appeal generally concerns computer systems
and, more specifically, "compilers that generate code for computer systems"
(Spec. ,r 3) and methods for processing, utilizing a compiler, instructions in a
computer program (Spec. ,r 8). The method specifies a code generation
endian preference, determines when a vector load instruction does not satisfy
the code generation endian preference, and adds a vector element reverse
instruction after the vector load instruction to correct the mismatch between
an endian bias of the vector load instruction and the code generation endian
preference. Spec. ,r 8; Abstract.
Illustrative Claim
Independent claim 9, reproduced below with key disputed limitations
emphasized, further illustrates the invention:
9. A computer-implemented method executed by at
least one processor for a compiler to process a plurality of
3 We refer to Appellants' Specification ("Spec.") filed Dec. 19, 2014;
Appeal Brief ("Appeal Br.") filed Apr. 14, 2017; and Reply Brief ("Reply
Br.") filed Oct. 18, 2017. We also refer to the Examiner's Final Office
Action (Final Rejection) ("Final Act.") mailed Oct. 14, 2016, and the
Examiner's Answer ("Ans.") mailed Aug. 18, 2017.
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Appeal2018-000450
Application 14/576,710
instructions in a computer program, the method comprising the
steps of:
specifying to the compiler a code generation endian
preference;
the compiler reading the plurality of instructions;
the compiler selecting a vector instruction in the plurality
of instructions;
the compiler determining when the vector instruction
generates a vector load instruction that does not satisfy the code
generation endian preference; and
when the vector instruction is a vector load instruction
that does not satisfy the code generation endian preference, the
compiler adding to the plurality of instructions in the computer
program at least one vector element reverse instruction after the
vector load instruction to correct a mismatch between an endian
bias of the vector load instruction and the code generation
endian preference.
Rejections on Appeal
1. The Examiner rejects claims 9-11, 13, and 15-17 under
35 U.S.C. § 103 as being unpatentable over Rice et al. (US 2011/0154303
Al, published June 23, 2011) ("Rice") and Smith (US 2003/0182650 Al,
published Sept. 25, 2003).
2. The Examiner rejects claims 12 and 14 under 35 U.S.C. § 103
as being unpatentable over Rice, Smith, and Wilson et al. (US 2007 /0226469
Al, published Sept. 27, 2007) ("Wilson").
ISSUE
Based upon our review of the record, Appellants' contentions, and the
Examiner's findings and conclusions, the issue before us follows:
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Appeal2018-000450
Application 14/576,710
Did the Examiner err in finding that the combination of Rice and
Smith would have collectively taught or suggested "determining when ... a
vector load instruction [is generated] that does not satisfy the code
generation endian preference" and "the compiler adding ... at least one
vector element reverse instruction after the vector load instruction to correct
a mismatch between an endian bias of the vector load instruction and the
code generation endian preference" within the meaning of Appellants' claim
9 and the commensurate limitations of claim 17?
ANALYSIS
The Examiner rejects independent claim 9 (and independent claim 17)
as being obvious in view of Rice and Smith. See Final Act. 2-5; Ans. 14--
17. In particular, the Examiner relies on Rice to teach the disputed features
of a vector load instruction and adding a vector element reverse instruction
(see Final Act. 3--4; Ans. 14--17 (citing Rice ,r,r 9, 10, 23, 25; Fig. 1)), and
the Examiner relies on Smith to teach the disputed features of the compiler
determining when a vector load instruction is generated that does not satisfy
the code generation endian preference (see Final Act. 4 ( citing Smith ,r,r 15,
57)). Initially, the Examiner proposes Smith describes the compiler
determining a vector load instruction with an endian mismatch (see Final
Act. 3--4 ), but changes the mapping in the Examiner's Answer, proposing
that Rice teaches this feature (see Ans. 16-17).
Appellants contend that neither Rice nor Smith teaches the disputed
features of claim 1. See Appeal Br. 4--9; Reply Br. 2-9. Specifically,
Appellants contend, inter alia, that
Rice has no mention of vector load instructions .... [Instead,]
Rice deals with the endianness of pointers, and changing the
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Appeal2018-000450
Application 14/576,710
endian format of variables .... Rice has no teachings regarding
vector instructions of any kind. As a result, Rice does not teach
a vector load instruction, as claimed, and does not teach
performing the recited steps when the vector instruction is a
vector load instruction, as claimed.
Appeal Br. 4. More specifically, Appellants contend Rice does not describe
"single instructions that operate on multiple data elements, which would
allow interpreting the instructions in Rice as vector instructions." Reply Br.
4.
We agree with Appellants that Rice does not explicitly disclose vector
load instructions and that the Examiner does not clearly map the disputed
claim elements to disclosures in Rice, or sufficiently explain how Rice's
loading of a singular data element into a variable (variable g) describes a
vector load instruction. 4 As explained by Appellants, "the instructions in
code 111 and code 170 in FIG. 1 of Rice" (cited by the Examiner as
describing vector instructions (see Ans. 15)) "operate on a single integer
data element shown in 170." Reply Br. 4. The Examiner may be correct
that "[l]oading a single data integer value into variable g is ... a load
instruction. But it is not a vector load instruction because it operates on a
single integer value instead of operating on multiple data elements in a
vector register." Reply Br. 4.
Without further explanation, we are left to speculate on how Rice
describes the disputed features of claim 1. Consequently, we are constrained
4 See 37 C.F.R. § 1.104(c)(2) ("When a reference is complex or shows or
describes inventions other than that claimed by the applicant, the particular
part relied on must be designated as nearly as practicable. The pertinence of
each reference, if not apparent, must be clearly explained and each rejected
claim specified." ( emphasis added.).
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Appeal2018-000450
Application 14/576,710
by the record before us to find that the Examiner erred in concluding that the
combination of Rice and Smith renders obvious Appellants' claim 9.
Independent claim 1 7 includes limitations of commensurate scope.
Dependent claims 10, 11, 13, 15, and 16 depend from and stand with claim
9.
The Examiner rejects dependent claims 12 and 14 as being obvious in
view of Rice, Smith, and Wilson. See Final Act. 12-14. The Examiner
relies on the same reasoning as claim 1 (supra) for rejecting claims 12 and
14. See id. The Examiner does not suggest, and has not established on this
record, that the additionally cited Wilson reference overcomes the
aforementioned deficiencies of Rice. Accordingly, we do not sustain the
Examiner's obviousness rejection of claims 12 and 14.
CONCLUSION
Appellants have shown the Examiner erred in rejecting claims 9-17
under 35 U.S.C. § 103.
DECISION
We reverse the Examiner's rejections of claims 9-17.
REVERSED
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