Ex Parte Fujimoto et alDownload PDFPatent Trial and Appeal BoardSep 28, 201712592747 (P.T.A.B. Sep. 28, 2017) Copy Citation United States Patent and Trademark Office UNITED STATES DEPARTMENT OF COMMERCE United States Patent and Trademark Office Address: COMMISSIONER FOR PATENTS P.O.Box 1450 Alexandria, Virginia 22313-1450 www.uspto.gov APPLICATION NO. FILING DATE FIRST NAMED INVENTOR ATTORNEY DOCKET NO. CONFIRMATION NO. 12/592,747 12/01/2009 Tatsuo Fujimoto 52433/1043 6267 2292 7590 10/02/2017 BIRCH STEWART KOLASCH & BIRCH, LLP 8110 Gatehouse Road Suite 100 East FALLS CHURCH, VA 22042-1248 EXAMINER LANGMAN, JONATHAN C ART UNIT PAPER NUMBER 1784 NOTIFICATION DATE DELIVERY MODE 10/02/2017 ELECTRONIC Please find below and/or attached an Office communication concerning this application or proceeding. The time period for reply, if any, is set in the attached communication. Notice of the Office communication was sent electronically on above-indicated "Notification Date" to the following e-mail address(es): mailroom @ bskb. com PTOL-90A (Rev. 04/07) UNITED STATES PATENT AND TRADEMARK OFFICE BEFORE THE PATENT TRIAL AND APPEAL BOARD Ex parte TATSUO FUJIMOTO, NOBORU OHTANI, MASAKAZU KATSUNO, MASASHINAKABAYASHI, and HIROKATSU YASHIRO Appeal 2016-007527 Application 12/592,747 Technology Center 1700 Before ADRIENE LEPIANE HANLON, GEORGE C. BEST, and JEFFREY R. SNAY, Administrative Patent Judges. BEST, Administrative Patent Judge. DECISION ON APPEAL The Examiner finally rejected claims 1-10 and 12-15 of Application 12/592,747 under 35 U.S.C. § 103(a) as obvious. Final Act. (May 7, 2015). Appellants1 seek reversal of these rejections pursuant to 35 U.S.C. § 134(a). We have jurisdiction under 35 U.S.C. § 6. For the reasons set forth below, we reverse. 1 Nippon Steel & Sumitomo Metal Corp. of Japan is identified as the real party in interest. Appeal Br. 1. Appeal 2016-007527 Application 12/592,747 BACKGROUND The ’747 Application describes a low resistivity silicon carbide single crystal wafer that can be used to fabricate high-performance electronic devices. Spec. 1. Claim 1 is representative of the ’747 Application’s claims and is reproduced below from the Claims Appendix. 1. A low resistivity silicon carbide single crystal wafer having a specific volume resistance of 0.001 Q cm to 0.012 Q cm, wherein 90% or greater of the entire wafer surface area over both sides of the wafer has a surface roughness (Ra) of 1.0 nm or less, wherein the basal plane stacking fault density in the wafer after high-temperature annealing at 1000 °C to 1800 °C is 30 cm-1 or less. Appeal Br. Claims App. 1 (emphasis added). REJECTIONS On appeal, the Examiner maintains the following rejections: 1. Claims 1, 2, 4-6, 9, 10, 12, 13, and 15 are rejected under 35 U.S.C. § 103(a) as unpatentable over the combination of Nakamura,2 Maruyama,3 Kerr,4 and Hirooka.5 Answer 2. 2 US 2007/0243722 Al, published October 18, 2007. 3 US 2008/0032880 Al, published February 7, 2008. 4 US 2008/0261401 Al, published October 23, 2008. 5 US 2004/0134418 Al, published July 15, 2004. 2 Appeal 2016-007527 Application 12/592,747 2. Claims 3, 7, and 8 are rejected under 35 U.S.C. § 103(a) as unpatentable over the combination of Nakamura, Maruyama, Kerr, Hirooka, and Shimoida.6 Id. at 8. 3. Claim 14 is rejected under 35 U.S.C. § 103(a) as unpatentable over the combination of Nakamura, Maruyama, Kerr, Hirooka, and Simin.7 Id. at 9. DISCUSSION Appellants present a single argument for reversal of all three pending rejections. See Appeal Br. 2-8. This argument focuses upon the limitations of claim 1, which is the sole independent claim on appeal. Id. at 8 (“For at least the above reasons, claim 1, as well as any claim which depends therefrom, are [sic] not obvious over Nakamura, Maruyama, Kerr, Hirooka, Shimoida, and Simin, either individually or combined, and the rejections under 35 U.S.C. § 103(a) should be withdrawn.”). Accordingly, we limit our discussion to the rejection of claim 1. Appellants argue that the rejection of claim 1 should be reversed because, inter alia, the Examiner has not established a prima facie case of obviousness. In particular, “Appellants respectfully note that the Examiner has not given a reason as to why one skilled in the art would be motivated to combine the respective constituent elements of the references. Appellants 6 US 2004/0031971 Al, published February 19, 2004. 7 G. Simin et al., 7.5 kW/mm2 current switch using AlGaN/GaNmetal-oxide semiconductor heterostructure field effect transistors on SiC substrates, 36 Electronics Letts. 2043^14 (2000). 3 Appeal 2016-007527 Application 12/592,747 respectfully submit that the Examiner’s combination is based on hindsight reconstruction.” Appeal Br. 3. For the following reasons, we are persuaded by Appellants’ argument and reverse the rejection of claim 1. In relevant part, claim 1 requires that at least 90% of the surface area of the wafer be polished on both sides such that it has a surface roughness of 1.0 nm or less. The Examiner relies upon Hirooka as describing polishing of a silicon carbide wafer on both sides: Kerr et al. are silent [as] to which the sides of the wafer are polished, specifically that both sides undergo the polishing as claimed. Hirooka teaches methods of forming flats looking carbide wafers were one surface is mirror finished ([0058]-[0062]). Final Act. 5. The record also teaches that mere: polishing entails CMP methods, which achieve a roughness of less than 1 nm ([0055]). Hirooka teaches that[,] while only one side is mirror polished in their embodiments, . . . the other surface may also be mirror finished by performing CMP ([0068]). Thus[,] Hirooka teaches the polishing either one or both sides of the wafer[] is well known in the art. It would have been obvious to one of ordinary skill in the art at the time of the present invention to apply the CMP technique of Kerr et al., to either one or both sides of the low resistivity SiC wafer of Nakamura et al., as this is an obvious design choice when CMP finishing SiC wafers to a roughness of less than 1 nm. Id. at 5-6. As the Federal Circuit has explained, “rejections on obviousness grounds cannot be sustained by mere conclusory statements; instead, there must be some articulated reasoning with some rational underpinning to 4 Appeal 2016-007527 Application 12/592,747 support the legal conclusion of obviousness.” In re Kahn, 441 F.3d 977, 988 (Fed. Cir. 2006). In this case, the Examiner has not provided an adequate explanation or reason for a person of ordinary skill in the art at the time of the invention to have chosen to polish both sides of the silica and carbide wafer described or suggested by the combination of Nakamura, Maruyama, and Kerr. Final Act. 6. The Examiner merely asserts that it is a matter of routine design choice to choose whether to polish one side or both sides of the wafer. Id. This argument is not compelling. As Appellants explain, choosing to polish both sides of a silicon carbide wafer adds extra steps and expenses to the manufacturing process. The Examiner has not explained why a person having ordinary skill in the art would be motivated to incur the additional processing steps and associated cost as a matter of design choice. In the absence of such an explanation supported by adequate evidence, we determine that the Examiner has not identified an adequate reason for a person of ordinary skill in the art to have been motivated to form the silicon carbide wafer with both sides polished to a very high degree of smoothness. We, therefore, conclude that the Examiner made improper use of hindsight reconstruction in arriving at the rejection set forth in the Final Action. Thus, we reverse the rejection of claim 1. CONCLUSION For the reasons set forth above, we reverse the rejection of claims 1- 10 and 12-15 of the ’747 Application. REVERSED 5 Copy with citationCopy as parenthetical citation