Ex Parte Elwood et alDownload PDFBoard of Patent Appeals and InterferencesApr 19, 201011095655 (B.P.A.I. Apr. 19, 2010) Copy Citation UNITED STATES PATENT AND TRADEMARK OFFICE ____________________ BEFORE THE BOARD OF PATENT APPEALS AND INTERFERENCES ____________________ Ex parte MATTHEW PAUL ELWOOD, DAVID JOHN BUTCHER, and RICHARD ROY GRISENTHWAITE ____________________ Appeal 2009-014139 Application 11/095,655 Technology Center 2100 ____________________ Decided: April 20, 2010 ____________________ Before JOHN A. JEFFERY, THU A. DANG, and JAMES R. HUGHES, Administrative Patent Judges. DANG, Administrative Patent Judge. DECISION ON APPEAL Appeal 2009-014139 Application 11/095,655 I. STATEMENT OF THE CASE Appellants appeal from the Examiner’s final rejection of claims 1-22 under 35 U.S.C. § 134(a) (2002). We have jurisdiction under 35 U.S.C. § 6(b). An Oral Hearing regarding this appeal was conducted on April 13, 2010. We reverse. A. INVENTION According to Appellants, the invention relates to data processing supporting multiple program instruction sets (Spec. 2, ll. 5-7). B. ILLUSTRATIVE CLAIM Claim 1 is exemplary and is reproduced below: 1. Apparatus for processing data, said apparatus comprising: an instruction decoder configured in a first state to decode program instructions to generate control signals which control the apparatus to perform data processing operations in accordance with an instruction encoding of a first instruction set and in a second state to decode program instructions to generate control signals which control the apparatus to perform data processing operations in accordance with an instruction encoding of a second instruction set; wherein at least conditional branch instructions of said first instruction set and conditional branch instructions of said second instruction set share a same instruction encoding, 2 Appeal 2009-014139 Application 11/095,655 wherein each instruction encoding is a specific pattern of binary numbers that identifies the instruction and distinguishes the instruction from other instructions. C. REJECTIONS The prior art relied upon by the Examiner in rejecting the claims on appeal is: Blomgren US 5,781,750 Jul. 14, 1998 Poplingher US 6,021, 489 Feb. 1, 2000 Chauvel US 2004/002499 A1 Feb. 5, 2004 Claims 1-4, 9-14, and 19-22 stand rejected under 35 U.S.C. § 103(a) over the teachings of Blomgren in view of Chauvel. Claims 5-8 and 15-18 stand rejected under 35 U.S.C. § 103(a) over the teachings of Blomgren in view of Chauvel and Poplingher. II. ISSUE Has the Examiner erred in holding that Blomgren in view of Chauvel would have taught or suggested “at least conditional branch instructions of said first instruction set and conditional branch instructions of said second instruction set share a same instruction encoding” (claim 1), as Appellants contend? III. FINDINGS OF FACT The following Findings of Fact (FF) are shown by a preponderance of the evidence. 3 Appeal 2009-014139 Application 11/095,655 Blomgren 1. Blomgren discloses a central processing unit (CPU) that can execute both reduced instruction set computer (RISC) and complex instruction set computer (CISC) instructions, wherein Instruction Decode Unit (ID 36) is composed of a sub-block for decoding CISC instructions and another for decoding RISC instructions (col. 6, ll. 16-17; Fig. 2). 2. RISC instruction set includes bcx branch conditional instructions (col. 19, l. 9) while CISC instruction set includes x86 JZ conditional instructions (col. 15, l. 13). Chauvel 3. Chauvel discloses a decode logic for decoding instructions in two modes, wherein the first mode is for instructions of a first instruction set such as standard Java instruction set, and the second mode is for instructions of a second instruction set such as C-ISA (p. 4, ¶ [0027]; Fig. 4). 4. Systems commands may be the same for both instruction sets, wherein a common opcode may be utilized in both instructions sets to specify the system commands (id. at ¶ [0032]). IV. PRINCIPLES OF LAW 35 U.S.C. § 103 In rejecting claims under 35 U.S.C. § 103, it is incumbent upon the Examiner to establish a factual basis to support the legal conclusion of obviousness. See In re Fine, 837 F.2d 1071, 1073 (Fed. Cir. 1988). In so doing, the Examiner must make the factual determinations set forth in Graham v. John Deere Co., 383 U.S. 1, 17 (1966). “[T]he examiner bears 4 Appeal 2009-014139 Application 11/095,655 the initial burden, on review of the prior art or on any other ground, of presenting a prima facie case of unpatentability.” In re Oetiker, 977 F.2d 1443, 1445 (Fed. Cir. 1992). V. ANALYSIS Claims 1-4, 9-14, and 19-22 Appellants contend that “[t]he Examiner admits that Blomgren fails to teach at least conditional branch instructions of the first instruction set and conditional branch instructions of the second instruction set sharing a same instruction encoding” of claim 1 (App. Br. 12). Appellants further contend that Chauvel does not disclose the missing feature because “[t]he processor in Chauvel executes Java Bytecodes in a first mode and executes instructions of a complementary instruction set architecture (C-ISA) in a second mode” wherein “the two complementary instruction sets are used with different computer architectures and have very different requirements” (App. Br. 13). That is, “branch commands, being in a different class from Chauvel’s system commands, are not included” and it does not “appear that the system commands are natively part of the Java Bytecodes” (App. Br. 14). Thus, Appellants contend that “the combination of references applied in the final rejection does not teach all the features recited in the independent claims” (Reply Br. 2). The Examiner admits that “Blomgren does not disclose that at least conditional branch instructions of said first instruction set and conditional branch instructions of said second instruction set share a same instruction encoding” (Ans. 6). However, the Examiner finds that “Chauvel discloses … specifying instructions that are present in different instruction sets with a 5 Appeal 2009-014139 Application 11/095,655 common opcode” and that “system commands may be the same for both instruction sets” (id.). The Examiner further finds that, in Chauvel, “the decoder may be decoding an instruction from a first instruction set… e.g. a branch instruction… and points to a predetermined prefix… indicating the succeeding instruction is a system command from a second instruction set” and thus “Chuavel’s [sic] teaching eliminates the need to switch between the decode logic modes” (Ans. 7). The Examiner then concludes that “it would have been obvious to one of ordinary skill in the art at the time of the invention to combine the teaching of Chauvel with the invention of Blomgren in order to eliminate the need to switch between the decode logic modes” (id.). Accordingly, an issue we address on appeal is whether Blomgren in view of Chauvel teaches or would have suggested “at least conditional branch instructions of said first instruction set and conditional branch instructions of said second instruction set share a same instruction encoding” (claim 1), as Appellants contend. After reviewing the record on appeal, we agree with Appellants. Though we agree with the Examiner that Blomgren discloses decoding instructions (and conditional instructions included therein) of two separate instruction sets in separate sub-blocks (FF 1-2) and that Chauvel discloses decoding instructions of two separate instruction sets (FF 3) wherein “system commands may be the same for both instruction sets” (FF 4), we cannot find any teaching of conditional branch instructions of a first instruction set and conditional branch instructions of a second instruction set that share a same instruction encoding, as required by claim 1, in the sections referenced by the Examiner. That is, the sections in Chauvel 6 Appeal 2009-014139 Application 11/095,655 referenced by the Examiner merely indicate that the instructions sets comprise “a common opcode” and that “system commands may be the same for both instruction sets” (Ans. 6), but is silent as to any conditional branch instruction having a same instruction encoding. Thus, though we agree with the Examiner that “Blomgren does not disclose that at least conditional branch instructions of said first instruction set and conditional branch instructions of said second instruction set share a same instruction encoding” (id.), we find that Chauvel does not cure the deficiencies of Blomgren. We agree with Appellants that “the two complementary instruction sets [of Chauvel] are used with different computer architectures and have very different requirements” (App. Br. 13), and that “branch commands, being in a different class from Chauvel’s system commands, are not included” (App. Br. 14). As such, we will reverse the rejection of representative claim 1, independent claims 11, 21 and 22 standing therewith, and 2-4, 9-14, 19 and 20 depending respectively from claims 1 and 11, over Blomgren in view of Chauvel. Claims 5-8 and 15-18 We also find that Poplingher does not cure these deficiencies of Blomgren and Chauvel. As such, we will reverse the rejection of claims 5-8 and 15-18 over Blomgren in view of Chauvel and Poplingher. VI. CONCLUSION Appellants have shown that the Examiner erred in holding claims 1-4, 9-14, and 19-22 unpatentable over the teachings of Blomgren in view of Chauvel, and in holding claims 5-8 and 15-18 unpatentable over the 7 Appeal 2009-014139 Application 11/095,655 teachings of Blomgren in view of Chauvel and Poplingher under 35 U.S.C. § 103(a). VII. DECISION We have not sustained the Examiner's rejection with respect to any claim on appeal. Therefore, the Examiner’s decision rejecting claims 1-22 is reversed. REVERSED peb NIXON & VANDERHYE, PC 901 NORTH GLEBE ROAD, 11TH FLOOR ARLINGTON, VA 22203 8 Copy with citationCopy as parenthetical citation